EE247 Lecture 12 • Administrative Issues § Midterm Exam Oct

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EE247 Lecture 12 • Administrative Issues § Midterm Exam Oct EE247 Lecture 12 • Administrative issues § Midterm exam Oct. 20th o You can only bring one 8x11 paper with your own written notes (please do not copy) o No books, class or any other kind of handouts/notes, calculators, computers, PDA, cell phones.... o Midterm includes material covered to end of lecture 14 – EE247 final exam date has changed to: December 13th, 12:30-3:30 pm (group 2)- please check your other class finals to ensure no conflict EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 1 EE247 Lecture 12 Today: – Summary switched-capacitor filters – Comparison of various filter topologies – Data converters EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 2 SC Filter Summary ü Pole and zero frequencies proportional to – Sampling frequency fs – Capacitor ratios Ø High accuracy and stability in response Ø Long time constants realizable without large R, C ü Compatible with transconductance amplifiers – Reduced circuit complexity, power dissipation ü Amplifier bandwidth requirements less stringent compared to CT filters (low frequencies only) L Issue: Sampled-data filters à require anti-aliasing prefiltering EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 3 Summary Filter Performance versus Filter Topology Max. Usable SNDR Freq. Freq. Bandwidth tolerance tolerance w/o tuning + tuning Opamp-RC ~10MHz 60-90dB +-30-50% 1-5% Opamp- ~ 5MHz 40-60dB +-30-50% 1-5% MOSFET-C Opamp- ~ 5MHz 50-90dB +-30-50% 1-5% MOSFET-RC Gm-C ~ 100MHz 40-70dB +-40-60% 1-5% Switched ~ 10MHz 40-90dB <<1% _ Capacitor EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 4 Data Converters EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 5 Material Covered in EE247 ü Filters – Continuous-time filters • Biquads & ladder type filters • Opamp-RC, Opamp-MOSFET-C, gm-C filters • Automatic frequency tuning – Switched capacitor (SC) filters • Data Converters – D/A converter architectures – A/D converter • Nyquist rate ADC- Flash, Pipeline ADCs,…. • Oversampled converters • Self-calibration techniques • Systems utilizing analog/digital interfaces – Wireline communication systems- ISDN, XDSL… – Wireless communication systems- Wireless LAN, Cellular telephone,… – Disk drive electronics – Fiber-optics systems EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 6 Data Converter Topics • Basic Operation of Data Converters – Uniform sampling and reconstruction – Uniform amplitude quantization • Characterization and Testing • Common ADC/DAC Architectures • Selected Topics in Converter Design – Practical Implementations – Desensitization to Analog Circuit Non-Idealities • Figures of Merit and Performance Trends EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 7 Suggested Reference Texts • R. v. d. Plassche, CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters, 2nd ed., Kluwer, 2003. • B. Razavi, Data Conversion System Design, IEEE Press, 1995. • S. Norsworthy et al (eds), Delta-Sigma Data Converters, IEEE Press, 1997. Extensive treatment of oversampled converters including stability, tones, bandpass converters. • J. G. Proakis, D. G. Manolakis, Digital Signal Processing, Prentice Hall, 1995. EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 8 Converter Applications EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 9 Example: Typical Cell Phone Contains in integrated form: • 4 Rx filters • 4 Tx filters Dual Standard, I/Q • 4 Rx ADCs • 4 Tx DACs • 3 Auxiliary ADCs Audio, Tx/Rx power control, Battery charge • 8 Auxiliary DACs control, display, ... Total: Filters à 8 ADCs à 7 DACs à 12 EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 10 Data Converter Basics Analog Input Analog • DSP is wonderful, but... Preprocessing Filters • Real world signals are analog: A/D ? – Continuous time Conversion – Continuous amplitude 000 DSP ...001... • DSP can only process: 110 – Discrete time D/A Conversion ? – Discrete amplitude à Need for data conversion from Analog Postprocessing Filters analog to digital and digital to analog Analog Output EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 11 A/D & D/A Conversion A/D Conversion D/A Conversion EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 12 Data Converters • Stand alone data converters – Used in variety of systems – Example: Analog Devices AD9235 12bit/ 65Ms/s ADC- Applications: • Ultrasound equipment • IF sampling in wireless receivers • Hand-held scopemeters • Low cost digital oscilloscopes EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 13 Data Converters • Embedded data converters – Cost, reliability, and performance à integration of data conversion interfaces along with DSPs – Main challenges • Feasibility of integrating sensitive analog functions in technologies optimized for digital performance • Down scaling of supply voltage • Interference & spurious signal pick-up from on-chip digital circuitry • Portable applications dictate low power consumption EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 14 D/A Converter Transfer Characteristics MSB LSB • For an ideal digital-to-analog converter with uniform, binary b1 b2 b3 bn ……..… digital encoding & a unipolar output range from 0 to VFS V D/A 0 NNbi V=V=Dbi´=2Ni- ,bi0or1 0FSååi i==12 i1 whereN= #ofbits Example:N3= VFS = fullscaleoutput 210 D= LSBstepsize V0 =D(b1.2++b2.2b3.2 ) V D= FS 2N Note:VV0(bi= 1,alli) =FS -D æö1 =VFS ç÷1- èø2N EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 15 Ideal D/A Transfer Characteristic Analog • Ideal DAC Output VFS introduces Ideal Response no error! • One-to-one mapping from input VFS /2 to output Step Height (1LSB=D) VFS /8 Digital Input 001 010 011 100 101 110 111 Code EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 16 A/D Converter Transfer Characteristic • For an ideal analog-to-digital MSB LSB converter with uniform, binary b1 b2 b3 bm digital encoding & a unipolar ……..… input range for 0 to VFS V A/D in wherem= #ofbits VFS = fullscaleoutput D=stepsize V D= FS 2m Note:DV(bi= 1,alli) ®FS -D æö1 ®VFS ç÷1- èø2m EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 17 Ideal A/D Transfer Characteristic Digital Output • Ideal ADC introduces error àmax error = 111 (+ -1/2D) 110 m D= VFS /2 101 m= # of bits 100 • This error is 011 called 010 ``quantization 001 error`` 1LSB Analog 000 input D 2D 3D 4D 5D 6D 7D EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 18 Data Converter Performance Metrics • Data Converters are typically characterized by static, time-domain, & frequency domain performance metrics : – Static • Monotonicity • Offset • Full-scale error • Differential nonlinearity (DNL) • Integral nonlinearity (INL) – Dynamic • Delay, settling time • Aperture uncertainty • Distortion- harmonic content • Signal-to-noise ratio (SNR), Signal-to-(noise+distortion) ratio (SNDR) • Idle channel noise • Dynamic range & spurious-free dynamic range (SFDR) EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 19 What is a discrete time signal? qA signal that changes only at discrete time instances? qA continous time signal time multiplied with a train of infinitely narrow unit pulses? qA vector whose element indices correspond to discrete [1.2 2.0 2.5 0.1 ...] instances in time? qAll of the above? EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 20 Discrete Time Signals • A sequence of numbers (or vector) with discrete index time instants • Intermediate signal values not defined (not the same as equal to zero!) • Mathematically convenient, non-physical • We will use the term "sampled data" for related signals that occur in real, physical interface circuits EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 21 Typical Sampling Process CT Þ SD Þ DT Continuous time Time Physical Signals Sampled Data (e.g. T/H signal) Clock "Memory Discrete Time Content" EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 22 Uniform Sampling y(kT)=y(k) t= 1T 2T 3T 4T 5T 6T ... k= 1 2 3 4 5 6 ... • Samples spaced T seconds in time • Sampling Period T Û Sampling Frequency fs=1/T • Problem: Multiple continuous time signals can yield exactly the same discrete time signal (aliasing) EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 23 Summary Data Converters • ADC/DACs need to sample/reconstruct to convert from continuous time to discrete time signals and back • We distinguish between purely mathematical discrete time signals and "sampled data signals" that carry information in actual circuits • Question: How do we ensure that sampling/reconstruction fully preserve information? EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 24 Aliasing • The frequencies fx and Nfs ± fx, N integer, are indistinguishable in the discrete time domain • Undesired frequency interaction and translation due to sampling is called aliasing • If aliasing occurs, no signal processing operation downstream of the sampling process can recover the original continuous time signal! • Let's look at this in the frequency domain... EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 25 Sampling Sine Waves Time domain fs = 1/T Voltage time y(nT) Frequency domain fs - fin fs + fin Amplitude f f fin s 2fs … EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 26 Frequency Domain Interpretation Signal scenario Continuous before sampling Time Amplitude f in fs /2 fs 2fs …….. f Signal scenario after sampling à DT àSignals @ Discrete Time nfS ± fmax__signal fold back into band of interest àAliasing Amplitude 0.5 f/fs EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 27 Brick Wall Anti-Aliasing Filter Amplitude Filter Continuous Time 0 fs 2fs ... f Discrete Time 0 0.5 f/fs Sampling at Nyquist rate (fs=2fsignal) à required brick-wall anti-aliasing filters EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 28 How to Avoid Aliasing • Must obey sampling theorem: fmax_Signal < fs/2 • Two possibilities: 1. Sample fast enough to cover all spectral components, including "parasitic" ones outside band of interest 2. Limit fmax_Signal through filtering EECS 247 Lecture 12: Data Converters © 2005 H.
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