EE247 Lecture 12 • Administrative Issues § Midterm Exam Oct

Home , Aliasing, Oversampling, Signal processing, Undersampling

EE247 Lecture 12 • Administrative issues § Midterm exam Oct. 20th o You can only bring one 8x11 paper with your own written notes (please do not copy) o No books, class or any other kind of handouts/notes, calculators, computers, PDA, cell phones.... o Midterm includes material covered to end of lecture 14

– EE247 final exam date has changed to: December 13th, 12:30-3:30 pm (group 2)- please check your other class finals to ensure no conflict

EE247 Lecture 12 Today: – Summary switched-capacitor filters – Comparison of various filter topologies – Data converters

ü Pole and zero frequencies proportional to

– Sampling frequency fs – Capacitor ratios Ø High accuracy and stability in response Ø Long time constants realizable without large R, C ü Compatible with transconductance amplifiers – Reduced circuit complexity, power dissipation ü Amplifier bandwidth requirements less stringent compared to CT filters (low frequencies only) L Issue: Sampled-data filters à require anti-aliasing prefiltering

Summary Filter Performance versus Filter Topology

Max. Usable SNDR Freq. Freq. Bandwidth tolerance tolerance w/o tuning + tuning Opamp-RC ~10MHz 60-90dB +-30-50% 1-5%

Opamp- ~ 5MHz 40-60dB +-30-50% 1-5% MOSFET-C Opamp- ~ 5MHz 50-90dB +-30-50% 1-5% MOSFET-RC Gm-C ~ 100MHz 40-70dB +-40-60% 1-5%

Switched ~ 10MHz 40-90dB <<1% _ Capacitor

Material Covered in EE247 ü Filters – Continuous-time filters • Biquads & ladder type filters • Opamp-RC, Opamp-MOSFET-C, gm-C filters • Automatic frequency tuning – Switched capacitor (SC) filters • Data Converters – D/A converter architectures – A/D converter • Nyquist rate ADC- Flash, Pipeline ADCs,…. • Oversampled converters • Self-calibration techniques • Systems utilizing analog/digital interfaces – Wireline communication systems- ISDN, XDSL… – Wireless communication systems- Wireless LAN, Cellular telephone,… – Disk drive electronics – Fiber-optics systems

EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 6 Data Converter Topics • Basic Operation of Data Converters – Uniform sampling and reconstruction – Uniform amplitude quantization • Characterization and Testing • Common ADC/DAC Architectures • Selected Topics in Converter Design – Practical Implementations – Desensitization to Analog Circuit Non-Idealities • Figures of Merit and Performance Trends

Suggested Reference Texts

• R. v. d. Plassche, CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters, 2nd ed., Kluwer, 2003.

• B. Razavi, Data Conversion System Design, IEEE Press, 1995.

• S. Norsworthy et al (eds), Delta-Sigma Data Converters, IEEE Press, 1997. Extensive treatment of oversampled converters including stability, tones, bandpass converters.

• J. G. Proakis, D. G. Manolakis, Digital Signal Processing, Prentice Hall, 1995.

Example: Typical Cell Phone

Contains in integrated form: • 4 Rx filters • 4 Tx filters Dual Standard, I/Q • 4 Rx ADCs • 4 Tx DACs • 3 Auxiliary ADCs Audio, Tx/Rx power control, Battery charge • 8 Auxiliary DACs control, display, ... Total: Filters à 8 ADCs à 7 DACs à 12

Analog Input

Analog • DSP is wonderful, but... Preprocessing Filters • Real world signals are analog: A/D ? – Continuous time Conversion – Continuous amplitude 000 DSP ...001... • DSP can only process: 110 – Discrete time D/A Conversion ? – Discrete amplitude à Need for data conversion from Analog Postprocessing Filters analog to digital and digital to

analog Analog Output

A/D & D/A Conversion

A/D Conversion

D/A Conversion

• Stand alone data converters – Used in variety of systems – Example: Analog Devices AD9235 12bit/ 65Ms/s ADC- Applications: • Ultrasound equipment • IF sampling in wireless receivers • Hand-held scopemeters • Low cost digital oscilloscopes

Data Converters • Embedded data converters – Cost, reliability, and performance à integration of data conversion interfaces along with DSPs – Main challenges • Feasibility of integrating sensitive analog functions in technologies optimized for digital performance • Down scaling of supply voltage • Interference & spurious signal pick-up from on-chip digital circuitry • Portable applications dictate low power consumption

MSB LSB • For an ideal digital-to-analog converter with uniform, binary b1 b2 b3 bn ……..… digital encoding & a unipolar output range from 0 to VFS V D/A 0 NNbi V=V=Dbi´=2Ni- ,bi0or1 0FSååi i==12 i1 whereN= #ofbits Example:N3= VFS = fullscaleoutput 210 D= LSBstepsize V0 =D(b1.2++b2.2b3.2 ) V D= FS 2N

Note:VV0(bi= 1,alli) =FS -D æö1 =VFS ç÷1- èø2N

Ideal D/A Transfer Characteristic Analog • Ideal DAC Output VFS introduces Ideal Response no error! • One-to-one mapping

from input VFS /2 to output Step Height (1LSB=D)

VFS /8

Digital Input 001 010 011 100 101 110 111 Code

• For an ideal analog-to-digital MSB LSB converter with uniform, binary b1 b2 b3 bm digital encoding & a unipolar ……..… input range for 0 to VFS V A/D in wherem= #ofbits VFS = fullscaleoutput D=stepsize V D= FS 2m

Note:DV(bi= 1,alli) ®FS -D æö1 ®VFS ç÷1- èø2m

Ideal A/D Transfer Characteristic Digital Output • Ideal ADC introduces error

àmax error = 111 (+ -1/2D) 110 m D= VFS /2 101 m= # of bits 100

• This error is 011 called 010 ``quantization 001 error`` 1LSB Analog 000 input D 2D 3D 4D 5D 6D 7D

• Data Converters are typically characterized by static, time-domain, & frequency domain performance metrics : – Static • Monotonicity • Offset • Full-scale error • Differential nonlinearity (DNL) • Integral nonlinearity (INL) – Dynamic • Delay, settling time • Aperture uncertainty • Distortion- harmonic content • Signal-to-noise ratio (SNR), Signal-to-(noise+distortion) ratio (SNDR) • Idle channel noise • Dynamic range & spurious-free dynamic range (SFDR)

What is a discrete time signal? qA signal that changes only at discrete time instances? qA continous time signal time multiplied with a train of infinitely narrow unit pulses? qA vector whose element indices correspond to discrete [1.2 2.0 2.5 0.1 ...] instances in time? qAll of the above?

EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 20 Discrete Time Signals • A sequence of numbers (or vector) with discrete index time instants • Intermediate signal values not defined (not the same as equal to zero!) • Mathematically convenient, non-physical • We will use the term "sampled data" for related signals that occur in real, physical interface circuits

Typical Sampling Process CT Þ SD Þ DT

Continuous time Time Physical Signals Sampled Data (e.g. T/H signal)

Clock

"Memory Discrete Time Content"

y(kT)=y(k)

t= 1T 2T 3T 4T 5T 6T ... k= 1 2 3 4 5 6 ... • Samples spaced T seconds in time

• Sampling Period T Û Sampling Frequency fs=1/T • Problem: Multiple continuous time signals can yield exactly the same discrete time signal (aliasing)

Summary Data Converters • ADC/DACs need to sample/reconstruct to convert from continuous time to discrete time signals and back • We distinguish between purely mathematical discrete time signals and "sampled data signals" that carry information in actual circuits • Question: How do we ensure that sampling/reconstruction fully preserve information?

• The frequencies fx and Nfs ± fx, N integer, are indistinguishable in the discrete time domain • Undesired frequency interaction and translation due to sampling is called aliasing • If aliasing occurs, no signal processing operation downstream of the sampling process can recover the original continuous time signal! • Let's look at this in the frequency domain...

Sampling Sine Waves Time domain

fs = 1/T Voltage

time y(nT)

Frequency domain

fs - fin fs + fin Amplitude f f fin s 2fs …

Signal scenario Continuous before sampling Time Amplitude f in fs /2 fs 2fs …….. f Signal scenario after sampling à DT

àSignals @ Discrete Time nfS ± fmax__signal fold back into band of interest àAliasing Amplitude 0.5 f/fs

Brick Wall Anti-Aliasing Filter

Amplitude Filter

Continuous Time

0 fs 2fs ... f

Discrete Time

0 0.5 f/fs

Sampling at Nyquist rate (fs=2fsignal) à required brick-wall anti-aliasing filters

• Must obey sampling theorem:

fmax_Signal < fs/2 • Two possibilities: 1. Sample fast enough to cover all spectral components, including "parasitic" ones outside band of interest

2. Limit fmax_Signal through filtering

How to Avoid Aliasing

1- Push Frequency domain sampling frequency to x2 of the highest freq. Amplitude fin f à Oversampled fs_old 2fs_old …….. s_new f converters almost!

2- Pre-filter signal to Frequency domain eliminate signals above 1/2 sampling Amplitude f frequency- then in fs /2 fs 2fs f sample

Amplitude Filter

Continuous Time

0 fs/2 fs 2fs ... f

• Practical filter: Nonzero "transition band" • In order to make this work, we need to sample faster than 2x the signal bandwidth • "Oversampling"

Practical Anti-Aliasing Filter

Desired Parasitic Signal Tone

Continuous Attenuation Time

0 B fs/2 fs-B fs ... f

Discrete Time

0 B/fs 0.5 f/fs

• fs > 2fmax Nyquist Sampling – "Nyquist Converters" – Actually always slightly oversampled

• fs >> 2fmax Oversampling – "Oversampled Converters" – Anti alias filtering is often trivial – Oversampling is also used to reduce quantization noise, see later in the course...

• fs < 2fmax Undersampling (sub-sampling)

Sub-Sampling Amplitude BP Filter Continuous Time

0 fs ... f

Discrete Time

0 0.5 f/fs • Sub-sampling à sampling at a rate less than Nyquist rate à aliasing • For signals centered @ an intermediate frequency à Not destructive! • Sub-sampling can be exploited to mix a narrowband RF or IF signal down to lower frequencies

• We now know how to Analog Anti-Aliasing Preprocessing Filter

preserve signal A/D Sampling information in CTàDT Conversion (+Quantization) 000 transition DSP ...001... 110 D/A Conversion ? • How do we go back Analog from DTà CT? Postprocessing Analog Output

Ideal Reconstruction x(k) x(t) Þ

• The DSP books tell us: ¥ sin(2pBt) x(t) = å x(k)× g(t - kT ) g(t) = k=-¥ 2pBt

• Unfortunately not all that practical...

1 • How about just creating 0.6 a staircase, i.e. hold each discrete time value 0.2 until new information becomes available Amplitude -0.2 • What does this do the frequency content of the -0.6 signal?

sampled data after ZOH -1 • Let's analyze this in two 0 1 2 3 -5 Time x 10 steps...

1) DTà CT: Infinite Zero Padding

Time Domain Frequency Domain

DT sequence ......

0.5 f/fs

Zero padded ...... DT sequence

0.5/i 1.5/i 2.5/i f/fs Infinite Interpolation: ...... CT Signal!

0.5fs 1.5fs 2.5fs f

......

Ts • Using the Fourier transform of a rectangular impulse we get: T sin(pfT ) H ( f ) = p p Ts pfTp

Hold Pulse Tp=Ts 1

0.9 Tp sin(pfTp ) 0.8 | H ( f ) |=

0.7 Ts pfTp

0.6

0.5 abs(H(f)) 0.4

0.3

0.2

0.1

0 0 0.5 1 1.5 2 2.5 3 f/fs

0.9 Tp sin(pfTp ) 0.8 | H ( f ) |=

0.7 Ts pfTp

0.6

0.5 abs(H(f)) 0.4

0.3

0.2

0.1

0 0 0.5 1 1.5 2 2.5 3 f/fs

ZOH Spectral Distortion 1

Continuous Time 0.5 X(k) Pulse Train Spectrum 0 0 0.5 1 1.5 2 2.5 3 1 ZOH Transfer Function 0.5 ZOH ("Sinc Distortion") 0 0 0.5 1 1.5 2 2.5 3 1 ZOH output, Spectrum of 0.5 Staircase Approximation 0 0 0.5 1 1.5 2 2.5 3

f/fs

0.4 • Oversampling 0.3 helps to 0.2 reduce filter 0.1 order 0 0 0.5 1 1.5 2 2.5 3

f/fs

Summary

• Sampling theorem fs > 2fmax, usually dictates anti-aliasing filter • If theorem is met, CT signal can be recovered from DT without loss of information • ZOH and smoothing filter reconstruct CT from DT signal • Oversampling helps reduce order & complexity of anti-aliasing & smoothing filters

Analog Input

Analog Anti-Aliasing • Done with Preprocessing Filter "Quantization in time" A/D Sampling Conversion (+Quantization) 000 DSP ...001... 110 • Next: Quantization in D/A D/A+ZOH amplitude Conversion Analog Smoothing Postprocessing Filter

Analog Output

Amplitude Quantization • Amplitude quantization à quantization “noise” • Static ADC/DAC performance measures – Offset – Gain – INL – DNL

A/D Characteristics [1] • Quantization step D (= 1 LSB) 7 ADC characteristics ideal converter 6 • E.g. N = 3 Bits 5 4 • Full-scale input range: 3 -0.5D … (2N-0.5)D 2 Digital Output Code 1 0

-1 0 1 2 3 4 5 6 7 8 • Quantization error: bounded by –D/2 … +D/2 1 for inputs within full-scale range 0.5

ADC Model 0 Vin Dout + -0.5 Quantization error [LSB]

-1 eq (Vin ) -1 0 1 2 3 4 5 6 7 8 ADC Input Voltage [1/D]

Quantization Error PDF

• Uniformly distributed from • Zero mean –D/2 … +D/2 provided that • Variance – Busy input +D /2e22D – Amplitude is many LSBs e2 ==ò de – No overload -D /2 D 12

• Not Gaussian! • Spectral density white if the joint pdf of the input at different Pdf 1/D sample times is smooth

Ref: W. R. Bennett, “Spectra of quantized signals,” Bell Syst. Tech. J., vol. 27, pp. 446-72, July 1988.

B. Widrow, “A study of rough amplitude quantization by means of Nyquist sampling -D/2 +D/2 error theory,” IRE Trans. Circuit Theory, vol. CT-3, pp. 266-76, 1956.

• If certain conditions are met (!) the quantization error can be viewed as being "random", and is often referred to as “noise” • In this case, we can define a peak “signal-to-quantization noise ratio”, SQNR, for sinusoidal inputs: 2 12æöN D e.g. N SQNR ç÷ 8 50 dB 22ç÷ SQNR=èø=´1.522N 12 74 dB D2 16 98 dB 20 122 dB 12 =+6.02N1.76 dBAccurate for N>3 • Actual converters do not quite achieve this performance due to other errors, including – Electronic noise – Deviations from the ideal quantization levels

Static, Ideal Macro Models

ADC V D in + out eq

DAC V Din out

ADC DAC V V in + out eq

DAC ADC D in D + out eq

Static Converter Errors

Deviations of characteristic from ideal – Offset – Full scale error – Differential nonlinearity, DNL – Integral nonlinearity, INL

Ref: “Understanding Data Converters,” Texas Instruments Application Report SLAA013, Mixed-Signal Products, 1995.

Full Scale Error ADC DAC Ideal full scale point Ideal full scale Actual full scale point point

Full scale error

Full scale error Actual full scale point

• Alternative specification in % Full Scale = 100% * (LSB value)/ 2N • Gain error can be extracted from offset & full scale error • Non-trivial to build a converter with extremely good gain/offset specs • Typically gain/offset is most easily compensated by the digital pre/post-processor • More interesting: Linearity àDNL, INL

Offset and Full-Scale Error

Note: ADC characteristics 7 ideal converter à For further measurements 6 Full-scale (DNL, INL) 5 error connecting the endpoints & 4

deriving ideal 3 codes based on the non-ideal Digital Output Code 2

endpoints 1 elliminates Offset error offset and full- 0

scale error -1 0 1 2 3 4 5 6 7 8 ADC Input Voltage [LSB]

ADC characteristics DNL = deviation 8 ideal converter of code width from 7 D (1LSB) -0.4 LSB DNL error 6

5 à Endpoints connected 4

à Ideal 3 characterisctics derived 2 0 LSB DNL error Digital Output Code

à DNL measured 1 +0.4 LSB DNL error 0

-1 0 1 2 3 4 5 6 7 8 9 ADC Input Voltage [D]

ADC Differential Nonlinearity Examples

ADC characteristics ADC characteristics 8 ideal converter 8 ideal converter

7 7

6 6

5 5

4 4

3 3

2 2

Missing code Digital Output Code

Digital Output Code Non-monotonic 1 (+0.5/-1 LSB DNL) 1 (> 1 LSB DNL) 0 0

-1 0 1 2 3 4 5 6 7 8 9 -1 0 1 2 3 4 5 6 7 8 9 ADC Input Voltage [D] ADC Input Voltage [D]

Impact of DNL on Performance

• Same as a somewhat larger quantization error, consequently degrades SQNR • How much – later in the course... • People sometimes speak of "DNL noise", i.e. "additional quantization noise due to DNL"

• A straight line through the 5 -1 LSB INL endpoints is usually used as reference, 4 i.e. offset and full scale errors are ignored in INL calculation 3 Digital Output Code • Ideal converter steps is found 2 for the endpoint line, then INL is measured 1

• Note that INL errors can be 0 much larger than DNL errors and vice-versa -1 0 1 2 3 4 5 6 7 8 ADC Input Voltage [D]

DAC Integral Nonlinearity

* Ref: “Understanding Data Converters,” Texas Instruments Application Report SLAA013, Mixed-Signal Products, 1995.

Example: INL & DNL

Large INL & Small DNL Large DNL & Small INL

EECS 247 Lecture 12: Data Converters © 2005 H. K. Page 64 Monotonicity • Monotonicity guaranteed if | INL | = 0.5 LSB The best fit straight line is taken as the reference for determining the INL. • This implies | DNL | = 1 LSB • Note: these conditions are sufficient but not necessary for monotonicity