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Part of the Requirements for Tfie Award of the Degree Of COMPUTER CONTROLLED AUTOMATIC TEST SYSTEM FOR TESTING INTEGRATED CIRCUITS Report an the abuue project as: part of the requirements for tfie award of The degree of MASTER OF ENGINEERING SCIENCE in ELECTRICRL ENGINEERING b'j ROBIN LESLIE ARTHUR WALTON B. Sc.[Tech] Superuiser Mr. F.Lewir. MARCH 1972 UNIVERSITY OF N.S.W. ^ 5 OCT 1987 Library CONTENTS List of Figures 3 Summary 5 Introduction 6 1 Philosophy of Automatic Testing 8 2 Example of Testing Problem 10 3 Selecting a Configuration 15 4 Selecting a Specification 17 5 System Specification 21 6 General Description 24 7 Details of Operation 28 8 Software 32 9 Programming Test Plans 35 10 Test Station 40 11 Multiplexer 47 12 Cross-point Matrix 50 13 Power Supplies 60 14 Measuring Unit 73 15 Controller 80 Conclusion 89 Acknowledgements 90 Bibliography 91 3 LIST OF FIGURES Fiq. Title Page 1.1 Simplified Auto-Test System 8 2.1 TTL Inverter 10 2.2 TTL Example Test Set-up 10 2.3 TTL Example Flow Chart 12 2.4 TTL Example Test Program 13 2.5 TTL Example Test Program Without Comments 14 3.1 Expanded Auto-Test System 15 6.1 Complete Test Set and Computer. Photograph 24A 6.2 Complete Test Set Block Diagram 27 7.1 'Test System Operation Flow Chart 31 8.1 System Software Core Allocation, Table 34 10.1 Test Station No 1. Photograph 40A 10.2 Test Deck Logic Diagram 43 10.3 Test Deck and Control Logic Diagram 46 11.1 Test Station Multiplexer Logic Diagram 48 12.1 Cross-Point Matrix and Multiplexer Front Panel 50A 12.2 Underside of Cross-point Matrix and Multiplexer 50A 12.3 Reed Relay Circuit 51 12.4 Simplified Cross-Point Logic Diagram 52 12.5 Current Distribution In Clock and Data Lines 53 12.6 Cross-Point Matrix Control Logic Diagram 56 12.7 Reed Relay Card Circuit Diagram 57 12.8 Reed Relay Card. Photograph 58 13.1 Power Supply Front Panel. Photograph 60A 13.2 Buffer Cell Logic Diagram 61 13.3 Mode Register Allocation 62 13.4 Simplified Power Supply Logic Diagram 63 13.5 Constant Current Mode Configuration 64 13.6 Constant Voltage Mode Configuration 64 13.7 Power Controller Circuit Diagram 66 13.8 Power Controller. Photograph 67 13.8A Power Controller Component Layout 68 13.9 12-Bit Store and Gate Card Logic Diagram 69 13.10 12-Bit Buffer and Gate. Photograph 70 13.11 Power Supply Complete Logic Diagram 71 14.1 Measuring Unit Front Panel. Photograph 73A 4 Fiq. Title Page 14.2 Absolute Magnitude Converter Modes 74 14.3 Measuring Unit Logic Diagram 76 14.4 Absolute Magnitude Converter Circuit Diagram 77 14.5 Absolute Magnitude Converter. Photograph 78 14.6 Conversion Done Flag and Miscellanious Gate Card 79 15.1 Computer I/O Simulator Logic Diagram 85 ' 15.2 Computer I/O Level Converter Logic Diagram 86 15.3 Test Set Interface and Address Register Logic Diagram 87 15.4 Layout of Modules in Interface and Power Supplies 88 5 SUMMARY This report describes a computer controlled test system to screen integrated circuits in a manufacturing environment. Integrated circuits are tested three times during the manufacturing cycle and each requires a large number of tests to ensure it functions correctly. The system provides a number of power - supplies, a measuring unit and a means of interconnecting these under external control. To facilitate the setting up of the various tests a software controller is used. This allows comparison of readings, conditional branching and data logging, to name a few features. The controller is a PDP8/I computer operated in a foreground/background mode with testing as the foreground task and program preparation a background task. Data logging is punched out on paper tape and processed on a larger PDPQ/l configuration with a 340 line/minute printer. The programmable power supplies provide plus and minus sixteen volts or plus or minus one hundred milliamps. The measurement unit measures voltages from twenty volts to two millivolt and currents from one hundred milliamps to twenty nanoamps. The system is multiplexed to four test stations which can each be operating on the same test plan or completely different plans. 6 INTRODUCTION The manufacture of integrated circuits produces wafers containing on average, 400 circuits. These circuits must be thoroughly tested before being separated and packaged because the cost of packaging is a major factor in the price of an I.C. This combined with, the fact that yields of 20/£ to 60/ are common, means accurate and complete wafer testing is essential. To test a circuit completely can take scores of tests with a figure of 25 being about average. This means about ten thousand tests a wafer must be performed, and connection made to some 10 or more pads. In a manufacturing environment, which is concerned essentially with custom designs, elaborate test jigs are too time consuming and uneconomical. For a stable processing line the D.C. parameters give an excellent measure of the circuits performance capabilities, thus 100^ D.C. testing with sample dynamic testing in a majority of cases will give good results. It was decided at the A.W.A. Microelectronics facility to acquire a flexible general test system. To meet the requirement of quick change-over and ease of operation a computer controlled system was decided upon. A survey of the available commercial equipment revealed that a few very expensive (greater than. $100000) systems were available. On reviewing the specifications of these machines the author, in consultation with Dr G. Rigby,drew up a cost estimate of designing our own system. This showed the following advant­ ages in building our own system. 1) Low cost (approximately half equivalent overseas) 2) Our specifications to suit our usage 3) Expertese gained in the exercise useful for further system design 4) Local maintenance and modification greatly simplified 7 The author was thus given the job of specifying, designing and constructing the computer controlled Test System described in the following report. The design is similar to most overseas units, as far as can be gathered from sales brochures. No detailed information on these proprietary systems is available, so any similarity is due to the similarity in goals. The major difference between this system and say Teradyne is the emphasis on data logging and acquisition on our systems as against go/no-go on the other systems. Because of this a hardware analogue to digital converter is used and go/no-go decisions made in the computer software. This gives a conversion time of 10 us against 10 mS when data logging is required. The Department of Supply, who have contracted A.W.A. to establish an integrated circuit facility, provided a PDP 8/l to run this test system. It was decided to use this machine, after careful consideration of those available. Factors taken into account include the precision required 10 - 12 bits, software back up, peripheral availability and the availability of similar modules to use in the Test Set proper. A considerable number of Digital Equipment Modules were suitable for this system. The author was originally to do the software as well as the hardware, but due to lack of time and an offer from the Department of Supply to issue a software support contract for the facility, this was not the case. Mr R.N. Walker of Technical Computing and Graphics has developed the software from the requirements set out by the author in consultation with other design engineers in the facility. These are shown in the following report. 0 CHAPTER 1 PHILOSOPHY OF AUTOMATIC TESTING 1.1 ’ The basis of any automatic testing system is a controller, some stimuli, sensors and a means of connecting these to the device under test. device STIMULI SWITCH - UNDER RND BOPRD TEST CONTROL SYSTEM SIMPLIFIED AUTO-TEST SYSTEM 1.2 The device under test (D.U.T.) is connected to the test svstsm via a switchboard. For each test this sets up the appropriate connections to the stimuli and sensors. This must be done without causing any significant change in the inherent properties of the D.U.T. or any loading or colouring of parameters being transmitted. The controller must be able to quickly alter this switchboard. 1.3 The stimuli must be such as to adequately exercise the D.U.T. in a way, that the sensors can measure the parameters desired, to ensure proper operation. These stimuli must be set in the correct mode and to the correct amplitude by the controller at a rate compatible with the overall testing speed required. The sensitivity and mode of the sensors must also be set by the controller. 1.4 At this stage a decision must be made as to whether the sensor readings are acceptable, and suitable action taken. In the case of a failure, this could be to abort or apply a different set of conditions, and re-test, or different limits. 9 1.5 If the sensors show a correct response, then the next test is initiated. This ability to make conditional variations in the test sequence is essential for classifying the devices under test into various categories. It also gives more realistic testing of overall operation, taking into account that it is generally the combination of parameters that determines the functional soundness of a device. 10 CHAPTER 2 EXAMPLE OF TESTING PROBLEM 2.1 Let us consider an example of a logic inverter, that has the following properties 1) xccH> FIG. 2.1 TTL INVERTER If V. = 4.5, V = 5.5 Volts, Z is r< the I must be <T4.3 mA l cc o cc V.
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