COMX-T2081 Installation and Use P/N: 6806800U66C December 2018 © 2019 SMART Embedded Computing™, Inc. All Rights Reserved.

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*For full legal terms and conditions, visit www.smartembedded.com/ec/legal Table of Contents

About this Manual ...... 11

Safety Notes...... 15

Sicherheitshinweise ...... 17

1 Introduction...... 21

1.1 Overview ...... 21 1.2 Features ...... 21 1.3 Standard Compliances ...... 22 1.4 Mechanical Data ...... 23 1.4.1 COMX-T2081 ...... 25 1.5 Ordering and Support Information ...... 26 1.6 Product Identification ...... 26 1.6.1 COMX-T2081 ...... 26

2 Hardware Preparation and Installation ...... 29

2.1 Overview ...... 29 2.2 Unpacking and Inspecting the Enclosure ...... 29 2.3 Environmental and Power Requirements ...... 30 2.3.1 Environmental Requirements...... 30 2.3.2 Thermal Requirements...... 30 2.3.3 Power Requirements ...... 32 2.3.4 Precautions ...... 32 2.4 COMX-T2081 Installation and Removal ...... 32 2.4.1 Heat Spreader/Sink Installation and Removal ...... 34 2.4.2 Module Installation and Removal on the Carrier Board ...... 37

3 Controls, LEDs, and Connectors ...... 41

3.1 Overview ...... 41 3.2 Connectors ...... 41 3.2.1 On-Board Connectors ...... 41 3.2.2 COMX AB-CD Connectors...... 42 3.2.3 COMX-CAR-P1 Connectors...... 65

COMX-T2081 Installation and Use (6806800U66C) 3 Table of Contents

3.3 LEDs ...... 66 3.3.1 On-Board POST LEDs ...... 66

4 Functional Description...... 67

4.1 Overview ...... 67 4.2 Block Diagram ...... 68 4.3 Processor Core and Cache Memory Complex ...... 69 4.4 Integrated Memory Controller ...... 70 4.5 Integrated Flash Controller Bus ...... 70 4.5.1 NOR Flash ...... 70 4.5.2 NAND Flash ...... 72 4.6 Board Reset Reason ...... 73 4.7 SerDes Block ...... 74 4.8 Thermal Management ...... 75 4.9 Main Memory ...... 76 4.9.1 Memory Interface ...... 76 4.10 GPIO ...... 76 4.11 eMMC ...... 77 4.12 SPI Interface ...... 77 4.13 LAN ...... 77 4.14 PHY ...... 78 4.14.1 10/100/1000 BASE T ...... 78 4.14.2 MDIO ...... 78 4.15 UART Interface ...... 78 4.16 Real Time Clock ...... 78 4.17 Watchdog ...... 79 4.17.1 Software Watchdog ...... 79 4.17.2 CPLD Watchdog ...... 79 4.18 USB ...... 79 4.19 I2C Interface ...... 80 4.19.1 I2C Device Voltage Monitor ...... 81 4.19.2 I2C User EEPROM ...... 81 4.19.3 I2C Device WDT ...... 82 4.19.4 I2C Device RTC ...... 82 4.19.5 I2C Device Clock Generators...... 82 4.20 CPLD Information ...... 82 4.20.1 CPLD Build Year and Month Code Register (0x00)...... 83 4.20.2 Control FPGA 1 Build Day and Sequence Code Register (0x02) ...... 83

4 COMX-T2081 Installation and Use (6806800U66C) Table of Contents

4.20.3 Module Variant and Revision Register (0x08) ...... 84 4.20.4 CPLD Reset Source Register (0x0C)...... 84 4.20.5 Reset Control Register (0x10) ...... 86 4.20.6 Boot Watchdog Control Register (0x14) ...... 87 4.20.7 Debug LED Control/Status Register (0x18) ...... 87 4.20.8 Flash Write Protect Register (0x1C) ...... 88 4.20.9 Boot Status Register (0x20) ...... 89 4.20.10Boot Control Register (0x24) ...... 90 4.20.11COMX Mode Control/Status Register (0x28)...... 90 4.20.12Interrupt Source Register (0x2C)...... 92 4.20.13Interrupt Source Mask Register (0x30) ...... 92 4.20.14LVDS Control Register (0x34) ...... 93 4.20.15RCW Configuration Source Register (0x38) ...... 95 4.20.16CPLD Program Control Register (0x80) ...... 95 4.21 Clock ...... 96

5 Software and Firmware ...... 97

5.1 Overview ...... 97 5.2 Setup Requirements ...... 97 5.3 U-Boot Commands ...... 98 5.4 Software Build Requirements ...... 110 5.4.1 Meta-Artesyn Layer Installation ...... 110 5.4.2 Building U-Boot and Linux images ...... 111 5.4.2.1 Built Images Directory ...... 114 5.4.3 Firmware Upgrade ...... 114 5.4.3.1 TFTP Server and Environment Set Up ...... 114 5.4.3.2 Upgrade NOR ...... 116 5.4.3.3 Upgrade NAND ...... 117 5.5 U-Boot Environment Variables ...... 118 5.5.1 Network Variables ...... 118 5.5.2 Filename Variables for BSP Components ...... 118 5.5.3 Address Variables for Software Components on NOR Flash ...... 119 5.5.4 Address Variables for the Boot Components in RAM ...... 119 5.5.5 Device Variables ...... 120 5.5.6 HWCONFIG Variable ...... 120 5.5.7 Bootargs Variables...... 121 5.5.8 Bootup Variables ...... 121 5.5.9 Update Variables ...... 122

COMX-T2081 Installation and Use (6806800U66C) 5 Table of Contents

5.6 Checking Firmware Versions ...... 122 5.7 Address Space ...... 124 5.8 DDR3 SDRAM ...... 125 5.9 Reset Configuration Word ...... 126 5.10 Built Images Directory ...... 127 5.11 Boot ...... 127 5.11.1 RAMboot ...... 127 5.11.2 NORboot ...... 128 5.11.3 NANDboot ...... 128 5.11.4 NFSboot ...... 128

A Related Documentation ...... 129

A.1 SMART Embedded Computing Documentation ...... 129

6 COMX-T2081 Installation and Use (6806800U66C) List of Figures

Figure 1-1 COMX-T2081 Top View ...... 23 Figure 1-2 COMX-T2081 Bottom View ...... 24 Figure 1-3 COMX-T2081 Mechanical Dimensions (top and side views) ...... 25 Figure 1-4 COMX-T2081 Assembly/Revision and Serial Number Location ...... 27 Figure 2-1 COMX-TXXX-HSP (Spreader/Sink showing M-point [thermocouple] Location) . . 33 Figure 2-2 COMX-TXXX-HSP (Heat Sink Mount Holes Location) ...... 33 Figure 2-3 COMX-TXXX-HTSNK (passive heat sink) ...... 34 Figure 2-4 COMX-TXXX-FANSNK (shown with fan attached) ...... 34 Figure 2-5 Thermal Pad Installation on PCB Assembly ...... 35 Figure 2-6 Heat Spreader/Sink Installation with optional standoffs (same for all variants) . . . 36 Figure 2-7 Heat Spreader/Sink Assembly ...... 37 Figure 2-8 Mounting Module on COMX-CAR-P1 Carrier Board ...... 39 Figure 4-1 COMX-T2081 Block Diagram ...... 68 Figure 4-2 GPIO CPU Assignment ...... 76 Figure 4-3 CPU I2C ...... 80

COMX-T2081 Installation and Use (6806800U66C) 7 List of Figures

8 COMX-T2081 Installation and Use (6806800U66C) List of Tables

Table 1-1 Standard Compliances ...... 22 Table 1-2 COMX-T2081 Module Dimensions ...... 26 Table 2-1 Environmental Requirements ...... 30 Table 2-2 Critical Temperature Spots ...... 31 Table 2-3 COMX-T2081 Power Consumption ...... 32 Table 3-1 T2081 COP Header Pinout ...... 41 Table 3-2 T2081 JTAG Header Pinout ...... 41 Table 3-3 COMX Row A Pin Assignments ...... 42 Table 3-4 COMX Row B Pin Assignments ...... 48 Table 3-5 COMX Row C Pin Assignments ...... 54 Table 3-6 COMX Row D Pin Assignments ...... 60 Table 3-7 COMX-T2081 Interfaces on COMX-CAR-P1 ...... 65 Table 3-8 On-board POST LEDs ...... 66 Table 4-1 NOR Flash Memory Map ...... 71 Table 4-2 NAND Flash Memory Map ...... 72 Table 4-3 Board Reset Reason bit values ...... 73 Table 4-4 COMX-T2081 SERDES Configuration ...... 74 Table 4-5 I2C Interface ...... 80 Table 4-6 Power rail Voltage Value ...... 81 Table 4-7 CPLD Register Map ...... 82 Table 4-8 Control Build Year and Month Code Register (0x00) ...... 83 Table 4-9 CPLD Build Day and Sequence Code Register (0x02) ...... 83 Table 4-10 Module Variant and Revision Register (0x08) ...... 84 Table 4-11 CPLD Reset Source Register (0x0C) ...... 84 Table 4-12 Reset Control Register (0x10) ...... 86 Table 4-13 Boot Watchdog Control Register (0x14) ...... 87 Table 4-14 Debug LED Control/Status Register (0x18) ...... 87 Table 4-15 Flash Write Protect Register (0x1c) ...... 88 Table 4-16 Boot Status Register – 0x20 ...... 89 Table 4-17 Boot Control Register (0x24) ...... 90 Table 4-18 COMX Mode Control/Status Register (0x28) ...... 90 Table 4-19 Interrupt Source Register (0x2C) ...... 92 Table 4-20 Interrupt Source Mask Register (0x30) ...... 93 Table 4-21 LVDS Control Register (0x34) ...... 94 Table 4-22 RCW Configuration Source Register (0x38) ...... 95 Table 4-23 CPLD Program Control Register (0x80) ...... 95 Table 5-1 U-Boot Commands ...... 98

COMX-T2081 Installation and Use (6806800U66C) 9 List of Tables

Table 5-2 NOR Flash Command Usage ...... 106 Table 5-3 NAND Flash Command Usage ...... 107 Table 5-4 U-Boot I2C Utilities ...... 107 Table 5-5 U-Boot sf Utilities ...... 108 Table 5-6 U-Boot mmc Utilities ...... 109 Table 5-7 U-Boot usb Utilities ...... 109 Table 5-8 U-Boot rcw Utilities ...... 110 Table 5-9 BitBake Commands ...... 113 Table 5-10 Network Variable Examples ...... 118 Table 5-11 BSP Components - Filenames of Variables ...... 118 Table 5-12 Software Components on NOR Flash - Addresses of Variables ...... 119 Table 5-13 BSP Components in RAM - Addresses of Variables ...... 119 Table 5-14 Device Variables ...... 120 Table 5-15 HWConfig Variable ...... 120 Table 5-16 Bootargs Variables ...... 121 Table 5-17 Bootup Variables ...... 121 Table 5-18 Update Variables ...... 122 Table 5-19 Address Space ...... 124 Table A-1 SMART EC Documentation ...... 129

10 COMX-T2081 Installation and Use (6806800U66C) About this Manual

Overview of Contents This manual is divided into the following chapters and appendices. About this Manual on page 11 summarizes the safety instructions in the manual. Sicherheitshinweise on page 17 provides the German translation of the Safety Notes section. Introduction describes an overview of the module, its features, and standard compliance. Chapter 2, Hardware Preparation and Installation on page 29 describes environmental requirements and procedures for installing and removing of the module. Chapter 3, Controls, LEDs, and Connectors on page 41 describes pin assignments for the various connectors and LEDs on the module. Chapter 4, Functional Description on page 67 describes various functional blocks available on the module. Chapter 5, Software and Firmware on page 97 describes software requirements, U-Boot commands, and firmware upgrade procedure on the module. Appendix A, Related Documentation on page 129 provides a list of related product documentation, manufacturer’s documents and industry standard specifications if any.

Abbreviations This document uses the following abbreviations:

Term Description

COP Common On-chip Processor

CPC CoreNet Platform Cache

CPLD Complex Programmable Logic Device

DDR Double Data Rate

DPAA Data Path Acceleration Architecture

eMMC embedded Multi Media Card

EEPROM Electrically Erasable Programmable Read-Only Memory

eSPI Enhanced Serial Peripheral Interface

GPIO General Purpose Input Output

COMX-T2081 Installation and Use (6806800U66C) 11 About this Manual About this Manual

Term Description

I2C Inter Integrated Circuit

IFC Integrated Flash Controller

JTAG Joint Test Action Group

MAC Media Access Control

MDIO Management Data Input/Output

MMC Multi Media Card

PCI Peripheral Component Interface

PCIe Peripheral Component Interface Express

PHY Ethernet controller physical layer device

RCW Reset Control Word

RTC Real Time Clock

SD Secure Digital

SDIO Secure Digital IO Interface (I/O interface to SD/SDHC cards or eMMCs)

SDHC Secure Digital High Capacity

SGMII Serial Gigabit Media Independent Interface

SPD Serial Presence Detect

SPI Serial Peripheral Interface

UART Universal Asynchronous Receiver and Transmitter

WDT Watch Dog Timer

12 COMX-T2081 Installation and Use (6806800U66C) About this Manual

Conventions The following table describes the conventions used throughout this manual.

Notation Description

Typical notation for hexadecimal numbers (digits are 0 through F), for 0x00000000 example used for addresses and offsets

0b0000 Same for binary numbers (digits are 0 and 1)

bold Used to emphasize a word

Screen Used for on-screen output and code related elements or commands. Sample of Programming used in a table (9pt)

Courier + Bold Used to characterize user input and to separate it from system output

Reference Used for references and for table and figure descriptions

File > Exit Notation for selecting a submenu

Notation for variables and keys

Notation for software buttons to click on the screen and parameter [text] description

... Repeated item for example node 1, node 2, ..., node 12

. Omission of information from example/command that is not necessary at . the time .

Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used .. in registers)

| Logical OR

Indicates a hazardous situation which, if not avoided, could result in death or serious injury

Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury

COMX-T2081 Installation and Use (6806800U66C) 13 About this Manual About this Manual

Notation Description

Indicates a property damage message

Indicates a hot surface that could result in moderate or serious injury

Indicates an electrical situation that could result in moderate injury or death

Indicates that when working in an ESD environment care should be taken to use proper ESD practices

No danger encountered, pay attention to important information

Summary of Changes This manual has been revised and replaces all prior editions.

Part Number Publication Date Description

Rebrand to SMART Embedded Computing template. 6806800U66C December 2019 Updated RoHS directive info. Updated Ordering and Support.

Removed 4GB memory from features list. Corrected 6806800U66B June 2018 block diagram to reflect 8GB memory only. Updated SDHC, SD, and eMMC references where required.

6806800U66A April 2018 Initial version

14 COMX-T2081 Installation and Use (6806800U66C) Safety Notes

This section provides warnings that precede potentially dangerous procedures throughout this manual. Instructions contained in the warnings must be followed during all phases of operation, service, and repair of this equipment. You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment. Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment. SMART Embedded Computing intends to provide all necessary information to install and handle the product in this manual. Because of the complexity of this product and its various uses, we do not guarantee that the given information is complete. If you need additional information, ask your SMART EC representative. The product has been designed to meet the standard industrial safety requirements. It must not be used except in its specific area of office telecommunication industry and industrial control. Only personnel trained by SMART EC or persons qualified in electronics or electrical engineering are authorized to install, remove or maintain the product. The information given in this manual is meant to complete the knowledge of a specialist and must not be used as replacement for qualified personnel. Keep away from live circuits inside the equipment. Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment. Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided. Contact your local SMART EC representative for service and repair to make sure that all safety features are maintained.

Operation

Product Damage High humidity and condensation on the board surface causes short circuits. Do not operate the board outside the specified environmental limits. Make sure the board is completely dry and there is no moisture on any surface before applying power.

Damage of Components Electrostatic discharge and incorrect installation and removal of components can damage circuits or shorten their life.

COMX-T2081 Installation and Use (6806800U66C) 15 Safety Notes Safety Notes

Before touching the board or electronic components, make sure that you are working in an ESD-safe environment.

Board Malfunction Switches marked as reserved might carry production-related functions and can cause the board to malfunction if their setting is changed. Do not change settings of switches marked as reserved. The setting of switches which are not marked as reserved has to be checked and changed before board installation.

Installation

Powering down or removing a board before the operating system or other software running on the board has been properly shut down may cause corruption of data or file systems. Make sure all software is completely shut down before removing power from the board or removing the board from the carrier. Inserting or removing modules with power applied may result in damage to module components. Before installing or removing additional devices or modules, read the documentation that came with the product.

Cabling and Connectors

RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1 network interfaces. Connecting an E1/T1/J1 line to an Ethernet connector may damage your system.  Make sure that TPE connectors near your working area are clearly marked as network connectors  Verify that the length of an electric cable connected to a TPE bushing does not exceed 100 meters  Make sure the TPE bushing of the system is connected only to Safety Extra Low Voltage circuits (SELV circuits) If in doubt, ask your system administrator.

Environment

Improperly disposing of used products may harm the environment. Always dispose of used products according to your country’s legislation and manufacturer’s instructions.

16 COMX-T2081 Installation and Use (6806800U66C) Sicherheitshinweise

Dieses Kapitel enthält Hinweise, die potentiell gefährlichen Prozeduren innerhalb dieses Handbuchs vorrangestellt sind. Beachten Sie unbedingt in allen Phasen des Betriebs, der Wartung und der Reparatur des Systems die Anweisungen, die diesen Hinweisen enthalten sind. Sie sollten außerdem alle anderen Vorsichtsmaßnahmen treffen, die für den Betrieb des Produktes innerhalb Ihrer Betriebsumgebung notwendig sind. Wenn Sie diese Vorsichtsmaßnahmen oder Sicherheitshinweise, die an anderer Stelle diese Handbuchs enthalten sind, nicht beachten, kann das Verletzungen oder Schäden am Produkt zur Folge haben. SMART Embedded Computing ist darauf bedacht, alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen. Da es sich jedoch um ein komplexes Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir die Vollständigkeit der im Handbuch enthaltenen Informationen nicht garantieren. Falls Sie weitere Informationen benötigen sollten, wenden Sie sich bitte an die für Sie zuständige Geschäftsstelle von SMART EC. Das System erfüllt die für die Industrie geforderten Sicherheitsvorschriften und darf ausschließlich für Anwendungen in der Telekommunikationsindustrie und im Zusammenhang mit Industriesteuerungen verwendet werden. Einbau, Wartung und Betrieb dürfen nur von durch SMART EC ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von Fachpersonal zu ergänzen, können dieses jedoch nicht ersetzen. Halten Sie sich von stromführenden Leitungen innerhalb des Produktes fern. Entfernen Sie auf keinen Fall Abdeckungen am Produkt. Nur werksseitig zugelassenes Wartungspersonal oder anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen, um Komponenten zu ersetzen oder andere Anpassungen vorzunehmen. Installieren Sie keine Ersatzteile oder führen Sie keine unerlaubten Veränderungen am Produkt durch, sonst verfällt die Garantie. Wenden Sie sich für Wartung oder Reparatur bitte an die für Sie zuständige Geschäftsstelle von SMART EC. So stellen Sie sicher, dass alle sicherheitsrelevanten Aspekte beachtet werden.

Betrieb

Beschädigung des Systems Durch hohe Luftfeuchtigkeit und Kondensation können Kurzschlüsse entstehen. Betreiben Sie das Board nicht außerhalb der angegebenen Umgebungsgrenzwerte. Stellen Sie sicher, dass das Board vollstaendig trocken ist und sich keine Feuchtigkeit auf der Oberfläche befindet, bevor Sie Strom anschliessen.

COMX-T2081 Installation and Use (6806800U66C) 17 Sicherheitshinweise Sicherheitshinweise

Beschaedigung von Komponenten Elektrostatische Entladungen und falsche Installation und Entfernung von Komponente können die Komponeten beschädigen oder ihre Lebensdauer verkürzen. Bevor Sie Karten berühren, vergewissern Sie sich, dass Sie in einem ESD-geschützten Bereich arbeiten.

Fehlfunktion des Blades Schalter, die mit Reserved gekennzeichnet sind, können mit produktionsrelevanten Funktionen belegt sein. Das Ändern dieser Schalter kann im normalen Betrieb Störungen auslösen. Verstellen Sie nur solche Schalter, die nicht mit Reserved gekennzeichnet sind. Prüfen und ändern Sie die Einstellungen der nicht mit Reserved gekennzeichneten Schalter, bevor Sie das Blade installieren.

Installation

Datenverlust Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmemäss beendet wurde, kann zu partiellem Datenverlust sowie zu Schäden am Filesystem führen. Stellen Sie sicher, dass sämtliche Software auf dem Board ordnungsgemäss beendet wurde, bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen.

Beschädigung des Produktes Fehlerhafte Installation des Produktes kann zu einer Beschädigung des Produktes führen. Verwenden Sie die Handles, um das Produkt zu installieren/deinstallieren. Auf diese Weise vermeiden Sie, dass das Face Plate oder die Platine deformiert oder zerstört wird.

Beschädigung des Produktes und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen, kann zur Beschädigung des Produktes und der Zusatzmodule führen. Lesen Sie daher vor der Installation von Zusatzmodulen die zugehörige Dokumentation.

18 COMX-T2081 Installation and Use (6806800U66C) Sicherheitshinweise

Kabel und Stecker

Beschädigung des Produktes Bei den RJ-45-Steckern, die sich an dem Produkt befinden, handelt es sich entweder um Twisted-Pair-Ethernet (TPE) oder um E1/T1/J1-Stecker. Beachten Sie, dass ein versehentliches Anschließen einer E1/T1/J1-Leitung an einen TPE-Stecker das Produkt zerstören kann.  Kennzeichnen Sie deshalb TPE-Anschlüsse in der Nähe Ihres Arbeitsplatzes deutlich als Netzwerkanschlüsse.  Stellen Sie sicher, dass die Länge eines mit Ihrem Produkt verbundenen TPE- Kabels 100 m nicht überschreitet.  Das Produkt darf über die TPE-Stecker nur mit einem Sicherheits- Kleinspannungs-Stromkreis (SELV) verbunden werden. Bei Fragen wenden Sie sich an Ihren Systemverwalter.

Umweltschutz

Falsche Entsorgung der Produkte schadet der Umwelt. Entsorgen Sie alte Produkte gemäß der in Ihrem Land gültigen Gesetzgebung und den Empfehlungen des Herstellers.

COMX-T2081 Installation and Use (6806800U66C) 19 Sicherheitshinweise Sicherheitshinweise

20 COMX-T2081 Installation and Use (6806800U66C) Chapter 1

Introduction

1.1 Overview This chapter provides a brief introduction of COMX-T2081 COM Express module, its features, mechanical data, standard compliance, and ordering information.

1.2 Features The COMX-T2081 is a COM Express module based on the NXP QorIQ processors on a convenient pluggable mezzanine module. The module is suitable for use in extended temperature, rugged environments. The COMX-T2081 module provides a high- performance, feature-rich solution for current and future generations of embedded applications. The following are the features of the COMX-T2081 module (unless otherwise noted, signals/interfaces listed are routed to a carrier via COM Express connectors):  Support NXP QorIQ T2081 processor  Form Factor: Basic (95 mm x 125 mm)  Memory: 8 GB soldered-down DDR3-1866 with ECC  Eight (8) configurable SerDes lanes routed to COM Express connectors. Available interfaces include: PCIe, Serial Gigabit Media Independent Interface (SGMII) and XFI Note: XFI is routed to the connector, but it is not tested.  On-board Storage: – Dual, 128 MB, 16-bit NOR flash from local bus (standard product default) – 1GB NAND flash from local bus – 512 KB I2C EEPROM – 128 GB eMMC Note: Selectable via carrier  Software: Demo, runtime Linux OS and file system(s), preinstalled in NOR/NAND flash.  Four (4) UART ports  Two (2) Gigabit Ethernet interface (10/100/1000Base-T)  Two (2) USB ports  IEEE 1588 control Note: IEEE1588 is routed to the COM Express connector, but was not tested due to carrier limitations.

COMX-T2081 Installation and Use (6806800U66C) 21 Introduction Introduction

 Three (3) I2C bus  Eight (8) GPIO ports  SPI bus with four chip select signals  IFC (Integrated Flash Controller) bus  SDIO/SDHC interface Note: See HW Release Notes / Errata  Tamper detect pin to the COM connectors  On-board Real Time Clock (RTC) and Watch Dog Timer (WDT) device  Provides three (3) on-board thermal sensors  Provides access to the CPU thermal diode temperature through one of the on- board temperature sensors  Common On-chip Processor (COP) and Joint Test Action Group (JTAG) connectors on module  12 V power supplied to module through COM Express connectors  Two (2) Management Data Input/Output (MDIO)  Two (2) IRQ interrupts  5 V standby power from COM connector not required/used by module

1.3 Standard Compliances The product is designed to meet the following standards. Table 1-1 Standard Compliances Standard Description

UL60950-1 EN 60950-1 IEC 60950-1 Safety Requirements CAN/CSA C22.2 No 60950-1

UL/CSA 60950-1 EN 60950-1 Legal safety requirements IEC 60950-1 CB Scheme

FCC 47 CFR Part 15 Subpart B (US), Class A EN55022 Class A (EU) EMC requirements (legal) on system level (predefined AS/NZS CISPR 22 Class A (Australia/New SMART EC system) Zealand) VCCI Class A (Japan)

22 COMX-T2081 Installation and Use (6806800U66C) Introduction

Table 1-1 Standard Compliances (continued) Standard Description

CISPR 22 CISPR 24 EN55022 EN 55024 EMC Requirements on system level

ETSI EN 300 019 Series Environmental Requirement

Directive on the restriction of the use of certain Directive (EU) 2015/863 (amending Annex hazardous substances in electrical and electronic II to Directive 2011/65/EU) equipment (RoHS).

1.4 Mechanical Data This section provides mechanical details of COMX-T2081 module. Figure 1-1 COMX-T2081 Top View

Pin1

COMX-T2081 Installation and Use (6806800U66C) 23 Introduction Introduction

Figure 1-2 COMX-T2081 Bottom View

PIN B1 PIN A1 PIN B1 PIN A1 COME: CD: J3 COME: AB: J2

24 COMX-T2081 Installation and Use (6806800U66C) Introduction

1.4.1 COMX-T2081 The following figure illustrates the top and side views of the COMX-T2081 module. Figure 1-3 COMX-T2081 Mechanical Dimensions (top and side views)

COMX-T2081 Installation and Use (6806800U66C) 25 Introduction Introduction

Table 1-2 describes COMX-T2081 module dimensions. Table 1-2 COMX-T2081 Module Dimensions Characteristic Value

Length 4.9 in / (125mm)

Width 3.7 in / (95mm)

Thickness 0.08 in / (2mm)

Mounting height top side (component side 1) 0.38 in / (9.65mm)

1.5 Ordering and Support Information Refer to the data sheet for the COMX-T2081 for a complete list of available variants and accessories. Refer to Appendix A, Related Documentation on page 129 or consult your local SMART Embedded Computing sales representative for the availability of other variants. For technical assistance, documentation, or to report product damage or shortages, contact your local SMART Embedded Computing sales representative or visit https://www.smartembedded.com/ec/support/.

1.6 Product Identification This section provides product identifiers and their location on the COMX-T2081 module.

Marketing Part Number Assembly Number ( is Revision letter)

COMX-T2081-01 0106813S02

1.6.1 COMX-T2081 The following figure shows the location of assembly/revision and serial numbers on the COMX-T2081 module:

26 COMX-T2081 Installation and Use (6806800U66C) Introduction

Figure 1-4 COMX-T2081 Assembly/Revision and Serial Number Location

Assembly/Revision Number

COMX-T2081 Installation and Use (6806800U66C) 27 Introduction Introduction

28 COMX-T2081 Installation and Use (6806800U66C) Chapter 2

Hardware Preparation and Installation

2.1 Overview This chapter provides information on unpacking and inspecting the card procedures and safety precautions to be followed while handling the module. The environmental, thermal, power requirements, installation, and removal procedures of the board are also explained in this chapter.

2.2 Unpacking and Inspecting the Enclosure Read all notices and cautions prior to unpacking the product. NOTICE

Damage of Circuits Electrostatic discharge and incorrect installation/removal of the product can damage circuits or shorten their life. Before touching the product make sure that you are working in an ESD-safe environment with protective equipment such an ESD wrist strap and ESD shoes. Hold the product by its edges and do not touch any components or circuits.

Shipment Inspection 1. Verify that you have received all items of your shipment.

 COMX-T2081 module  One printed copy of Quick Start Guide  One printed copy of Safety Notes Summary  Any other optional items that you ordered 2. Check for damage and report any damage or differences to customer service. 3. Remove the desiccant bag shipped together with the enclosure and dispose of it according to your country’s legislation. NOTICE

Improperly disposing of used products may harm the environment. Always dispose of used products according to your country’s legislation and manufacturer’s instructions.

COMX-T2081 Installation and Use (6806800U66C) 29 Hardware Preparation and Installation Hardware Preparation and Installation

The product is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, contact customer service immediately.

2.3 Environmental and Power Requirements This section describes environmental, thermal, and power requirements of the module.

2.3.1 Environmental Requirements The following environmental requirements must not be exceeded.

Operating temperature refers to the temperature of the air circulating around the module and not the component temperature.

The following table provides the environmental requirements for the module. Table 2-1 Environmental Requirements Requirement Operating Non-Operating

-58°F to212°F Temperature -40°F to 160°F / (-40°C to +71°C) (-50°C to +100°C)

Humidity to 95% RH (noncondensing) to 95% RH (noncondensing)

Vibration Sine (10mins/axis) 5G, 15 to 2000Hz

Vibration Random (1hr/axis) 0.04 g2/Hz, 15 to 2000Hz (8GRMS)

Shock 30g/11mS (half sine)

From -1500 ft to 30,000 ft / (45.7m to Altitude 9144m)

2.3.2 Thermal Requirements A standard passive heat sink is available (COMX-TXXXX-HTSNK); 600 LFM system airflow volume (at 160°F / 71°C) is needed for the heat sink to keep sufficient cooling to the module. Contact your SMART EC sales representative for detailed thermal information.

30 COMX-T2081 Installation and Use (6806800U66C) Hardware Preparation and Installation

A passive heat spreader is also available (COMX-TXXXX-HSP), to which a customer- developed heatsink may be attached, using four (4) interior M2.5 threaded holes and customer-provided fasteners. The M-point (shown in Figure 2-1), must be kept at or below 160°F / 71°C to ensure thermally sensitive components do not exceed their maximum allowable temperatures (see Table 2-2). SMART EC cannot be responsible for damage or failure caused by exceeding this M-point maximum, unless customer testing / instrumentation proves component temperature maximums are not exceeded.

While a heat spreader is often used to provide conduction cooling, by interfacing with a chassis-level cold plate, this configuration has not been tested by SMART EC. Specifically, 600 LFM of airflow was assumed below the module for passive cooling of the backside DRAM. A fan sink/cooler is also available (COMX-TXXXX-FANSNK) for development/lab use. Though the full environmental limits of the included fan are not published, it is known that it does NOT support the full range of temperature noted in Table 2-1 nor has the fan sink been tested for its module cooling capabilities above 77°F / (25°C).

The following table summarizes the components that exhibited significant temperature rises and their maximum allowable operating temperature. These components should be monitored in order to assess thermal performance during customized thermal solution development. Table 2-2 Critical Temperature Spots Component Maximum Allowable Heat Dissipation Power (W) Identifier Temperature (°C)

T2081 21.1 105 Junction

5.589 DDR 95 Case Note: DDR Value calculated for 2 banks of 9 chips)

NOTICE

System Overheating Improper cooling can lead to system damage and void the manufacturer's warranty.

Personal Injury During operation, hot surfaces may be present on the heat sinks and the components of the product. To prevent injury, do not touch any of the exposed components or heat sinks on the product when handling.

COMX-T2081 Installation and Use (6806800U66C) 31 Hardware Preparation and Installation Hardware Preparation and Installation

2.3.3 Power Requirements This module is designed to operate with the input voltages and currents defined in the following tables. The values are typical values found when running Linux to exercise board populated devices. Table 2-3 COMX-T2081 Power Consumption State PWR_V12P0 VCC_RTC

Idle 0.8A 350nA @ 25C

Full Loading (Linux) 1.4A 50uA

2.3.4 Precautions NOTICE

Electrostatic Discharge Do not touch the circuit with bare hands. The static electricity of the human body may damage the Electro Static Sensitive Devices (ESSDs) on the circuit. Make sure that you wear an Electro Static Discharge (ESD) preventive wrist strap or anti static glove to prevent injury or damage to the device from the static electricity. Keep your personal objects such as clothes and accessories away from the system. To prevent the static electricity from damaging the device, it is recommended to wear anti static clothes. Inserting or removing modules with power applied may result in damage to module components.

2.4 COMX-T2081 Installation and Removal This section provides installation and removal procedures of heat spreader/sink and modules on the carrier board. As noted in Section 2.3.2 on page 30, there are three types of generic thermal solutions available for the COMX-T2081. All include common, basic hardware (screws and standoffs), and are attached to the module in the same manner. Following are illustrations of each.

32 COMX-T2081 Installation and Use (6806800U66C) Hardware Preparation and Installation

Figure 2-1 COMX-TXXX-HSP (Spreader/Sink showing M-point [thermocouple] Location)

Figure 2-2 COMX-TXXX-HSP (Heat Sink Mount Holes Location)

COMX-T2081 Installation and Use (6806800U66C) 33 Hardware Preparation and Installation Hardware Preparation and Installation

Figure 2-3 COMX-TXXX-HTSNK (passive heat sink)

Figure 2-4 COMX-TXXX-FANSNK (shown with fan attached)

2.4.1 Heat Spreader/Sink Installation and Removal

Assembling the Fan sink The fan sink/cooler (COMX-TXXXX-FANSNK) is a kit including heatsink, 60x10mm fan (AAVID PSAD16010BH MF00 or equivalent), screws and standoffs. The fan (with label facing up) is attached to the center of the heatsink with four (4) M3x16 screws, provided.

Installing the Heat Spreader/Sink 1. Install the CPU thermal interface material pad on to heat spreader/sink. CPU thermal pad is received as part of PCB assembly kit. 2. Check the preinstalled thermal interface material pads on the heat spreader/sink. Make sure the pads are aligned to their corresponding components on the module. 3. Align the integrated standoffs on the heat spreader/sink with nine (9) screw holes on the module.

34 COMX-T2081 Installation and Use (6806800U66C) Hardware Preparation and Installation

4. Attach the spreader/sink to the module using four (4) integrated/threaded interior standoffs and four (4) provided M2.5x6 screws inserted from the bottom (see Figure 2- 6). 5. If required, install five (5) provided M2.5x8 hex standoffs to the bottom of the module, using five (5) provided M2.5x16 screws, inserted from the top (see Figure 2-6).

Do not use the provided standoffs if there are no corresponding holes on the carrier board (to avoid interference with carrier board components or if the carrier already has standoffs installed. You can use M2.5x16 screws provided with the heat spreader / sink, to mate with existing M2.5 carrier standoffs. When screwing the standoffs, first screw down all of them until their caps are just in contact with the module then screw them all the way down.

Figure 2-5 Thermal Pad Installation on PCB Assembly

COMX-T2081 Installation and Use (6806800U66C) 35 Hardware Preparation and Installation Hardware Preparation and Installation

Figure 2-6 illustrates installation of the heat spreader/sink on the module. Figure 2-6 Heat Spreader/Sink Installation with optional standoffs (same for all variants)

36 COMX-T2081 Installation and Use (6806800U66C) Hardware Preparation and Installation

Figure 2-7 Heat Spreader/Sink Assembly

Removing the Heat Spreader/Sink 1. Loosen/remove the four (4) screws holding the heat spreader/sink to the module. 2. While holding the edges, pull the spreader/sink from the module. 3. Inspect thermal interface material that may have adhered to module, and return intact pads to spreader/sink. Make sure to replace torn material. See Figure 2-5 and Figure 2-7.

2.4.2 Module Installation and Removal on the Carrier Board The module, with SMART EC-supplied heat spreader or sink, supports top-down or bottom- up mounting. The provided five (5) M2.5x16 screws can mate with existing M2.5 threaded carrier standoffs (such as found on the SMART EC COMX-CAR-P1), or with the provided five (5) M2.5x8 threaded standoffs (screws and standoffs provided with heat spreader/sink). The provided standoffs can be premounted to a customer carrier (for top-down module attachment), or to the module (bottom-up attachment). Fixing the provided standoffs to a customer carrier is done with customer-provided M2.5 screws (nominally 6mm, though this is dependent on carrier thickness).

COMX-T2081 Installation and Use (6806800U66C) 37 Hardware Preparation and Installation Hardware Preparation and Installation

Other options are also possible, using customer-provided screws, standoffs, nuts, etc.

NOTE: The COMX-CAR-P1 uses 8mm COMX connectors and requires 8mm standoffs. With the recommended 600LFM of airflow, the COMX-T2081 module should support carriers with 5mm COMX connectors/standoffs. However, this has not been tested, and is dependent on the number/height of carrier components beneath the module.

Installing the COM Express module on the COMX-CAR-P1 carrier board 1. Remove the Compact module standoff, leaving five remaining basic standoffs. 2. Line up the board-to-board connectors of the module assembly with the board-to-board connectors of the carrier board. 3. Make sure that the inter-connectors are properly aligned and apply downward pressure on the module (static or upward pressure on carrier) with a rocking motion, until the five standoffs on the carrier have contact with the bottom of the module. 4. Fasten the module to the carrier board with the M2.5x16 screws provided. 5. If installing fan sink, attach fan power connector to header P3 on rear of carrier (provides power only; no tach/control).

Removing the module from the COMX-CAR-P1 carrier board 1. Loosen and remove the M2.5x16 screws. 2. If removing fan sink, remove power connector. 3. While holding the edges, rock and pull the module from the carrier board.

38 COMX-T2081 Installation and Use (6806800U66C) Hardware Preparation and Installation

Figure 2-8 illustrates the screw-holes for mounting the module on carrier board. Figure 2-8 Mounting Module on COMX-CAR-P1 Carrier Board

COMX-T2081 Installation and Use (6806800U66C) 39 Hardware Preparation and Installation Hardware Preparation and Installation

40 COMX-T2081 Installation and Use (6806800U66C) Chapter 3

Controls, LEDs, and Connectors

3.1 Overview This chapter provides information on connector assignments and LEDS connected to the modules.

3.2 Connectors

3.2.1 On-Board Connectors T2081 COP Header The following table lists the pinout of the COP (Common On-Chip Processor) header for modules with the T2081 CPU. Table 3-1 T2081 COP Header Pinout Pin Signal Name Pin Signal Name

1 CPU_TDO 9 CPU_TMS

2NC 10NC

3 CPU_TDI 11 COP_SRESET_L

4 COP_TRST_L 12 GND

5 NC 13 COP_HRESET_L

6 COP_VDDSENSE 14 NC

7 COP_TCK 15 COP_CHKSTP_OUT_L

8 CPU_CKSTP_L 16 GND

T2081 JTAG Header Table 3-2 T2081 JTAG Header Pinout Pin Signal Name Pin Signal Name

1 JTAG_TCK 8 GND

2 GND 9 JTAG_TDI

3 JTAG_TDO 10 GND

4 GND 11 KEY NC

COMX-T2081 Installation and Use (6806800U66C) 41 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-2 T2081 JTAG Header Pinout (continued) Pin Signal Name Pin Signal Name

5 JTAG_TMS 12 NC

6 GND 13 GND

7 JTAG_TRST_L 14 JTAG_USER1

3.2.2 COMX AB-CD Connectors The following table lists the pinout of the AB- CD COMX connectors for the COMX-T2081 module. Table 3-3 COMX Row A Pin Assignments ROW A Pins Pin Name Description Source I/O Voltage

A1 GND GROUND

MDI_PHY_COMX_LA LAN Channel 1 - A2 BI-DIR 10/100/1000 Base T N1_3_N Differential Pair 3

MDI_PHY_COMX_LA LAN Channel 1 - A3 BI-DIR 10/100/1000 Base T N1_3_P Differential Pair 3

LED_PHY_COMX_LA LAN Port 1 - LED A4 COMX 3.3V -Open Drain CMOS N1_LINK100_L Link 100

LED_PHY_COMX_LA LAN Port 1 - LED A5 COMX 3.3V -Open Drain CMOS N1_LINK1000_L Link 1000

MDI_PHY_COMX_LA LAN Channel 1 - A6 BI-DIR 10/100/1000 Base T N1_2_N Differential Pair 2

MDI_PHY_COMX_LA LAN Channel 1 - A7 BI-DIR 10/100/1000 Base T N1_2_P Differential Pair 2

LED_PHY_COMX_LA LAN Port 1 - LED A8 COMX 10/100/1000 Base T N1_LINK_L Link

MDI_PHY_COMX_LA LAN Channel 1 - A9 BI-DIR 10/100/1000 Base T N1_1_N Differential Pair 1

MDI_PHY_COMX_LA LAN Channel 1 - A10 BI-DIR 10/100/1000 Base T N1_1_P Differential Pair 1

A11 GND GND

42 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-3 COMX Row A Pin Assignments (continued) ROW A Pins Pin Name Description Source I/O Voltage

MDI_PHY_COMX_LA LAN Channel 1 - A12 BI-DIR 10/100/1000 Base T N1_0_N Differential Pair 0

MDI_PHY_COMX_LA LAN Channel 1 - A13 BI-DIR 10/100/1000 Base T N1_0_P Differential Pair 0

A14 PWR_V1P8_CTRL Center-Tap supply COMX 1.8V Supply

A15 NC No Connect

A16 NC No Connect

A17 NC No Connect

A18 NC No Connect

A19 NC No Connect

A20 NC No Connect

A21 GND GND

A22 NC No Connect

A23 NC No Connect

A24 NC No Connect

A25 NC No Connect

A26 NC No Connect

A27 NC Reserved

A28 NC No Connect

A29 NC No Connect

COMX-T2081 Installation and Use (6806800U66C) 43 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-3 COMX Row A Pin Assignments (continued) ROW A Pins Pin Name Description Source I/O Voltage

Carrier System Config - NOR flash Bank Select at POR or Reset LOW/NC: Bank A A30 LBC_CS_KEY CARRIER 3.3V CMOS HIGH: Bank B Software may override for Reset; See sections 4.5.1, 4.20.9, and4.20.10

A31 GND GND

Carrier System Config -IFC Enable LOW/NC: Disable IFC to carrier A32 COMX_IFC_EN (Software enable will CARRIER 3.3V CMOS override; See section 4.20) HIGH: Enable IFC to carrier

Carrier System A33 CFG_RCW_SRC0 CARRIER 3.3V CMOS Config - RCW SRC0

HIGH: Select SDIO/SDHC interface on carrier LOW/NC: Select eMMC on module A34 SDHC_SEL_IN CARRIER 3.3V CMOS [Jumper P13 on COMX-CAR-P1 carrier; Labeled BIOS DIS]; Default HIGH

Carrier System A35 CFG_RCW_SRC1 CARRIER 3.3V CMOS Config - RCW SRC1

A36 NC No Connect

A37 NC No Connect

44 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-3 COMX Row A Pin Assignments (continued) ROW A Pins Pin Name Description Source I/O Voltage

A38 NC No Connect

A39 NC No Connect

A40 NC No Connect

A41 GND GND

A42 NC No Connect

A43 NC No Connect

A44 NC No Connect

USB_CPU_COMX_PO USB Differential - A45 BI-DIR USB IO RT0_N PORT 0

USB_CPU_COMX_PO USB Differential - A46 BI-DIR USB IO RT0_P PORT 0

Battery Back-up for A47 VCC_RTC CARRIER 3.3V Power Source the RTC

A48 NC No Connect

Default No Connect. Requires A49 NC (USB0_PWREN) new/custom p/n to COMX 3.3V CMOS Output connect to CPU USB0_DRVVBUS

A50 NC No Connect

A51 GND GND

SERDES_CPU_COMX CPU SERDES - A52 COMX SERDES Output _TX5_P LANE 5 Transmit

SERDES_CPU_COMX CPU SERDES - A53 COMX SERDES Output _TX5_N LANE 5 Transmit

SDHC_CPU_COMX_D SDIO/SDHC - DATA A54 BI-DIR 3.3V CMOS AT0 0

SERDES_CPU_COMX CPU SERDES - A55 COMX SERDES Output _TX4_P LANE 4 Transmit

COMX-T2081 Installation and Use (6806800U66C) 45 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-3 COMX Row A Pin Assignments (continued) ROW A Pins Pin Name Description Source I/O Voltage

SERDES_CPU_COMX CPU SERDES - A56 COMX SERDES Output _TX4_N LANE 4 Transmit

A57 GND GND

SERDES_CPU_COMX CPU SERDES - A58 COMX SERDES Output _TX3_P LANE 3 Transmit

SERDES_CPU_COMX CPU SERDES - A59 COMX SERDES Output _TX3_N LANE 3 Transmit

A60 GND GND

SERDES_CPU_COMX CPU SERDES - A61 COMX SERDES Output _TX2_P LANE 2 Transmit

SERDES_CPU_COMX CPU SERDES - A62 COMX SERDES Output _TX2_N LANE 2 Transmit

SDHC_CPU_COMX_D SDIO/SDHC - DATA A63 BI-DIR 3.3V CMOS AT1 1

SERDES_CPU_COMX CPU SERDES - A64 COMX SERDES Output _TX1_P LANE 1 Transmit

SERDES_CPU_COMX CPU SERDES - A65 COMX SERDES Output _TX1_N LANE 1 Transmit

A66 GND GND

SDHC_CPU_COMX_D SDIO/SDHC - DATA A67 BI-DIR 3.3V CMOS AT2 2

SERDES_CPU_COMX CPU SERDES - A68 COMX SERDES Output _TX0_P LANE 0 Transmit

SERDES_CPU_COMX CPU SERDES - A69 COMX SERDES Output _TX0_N LANE 0 Transmit

A70 GND GND

A71 NC No Connect

A72 NC No Connect

A73 NC No Connect

A74 NC No Connect

46 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-3 COMX Row A Pin Assignments (continued) ROW A Pins Pin Name Description Source I/O Voltage

A75 NC No Connect

A76 NC No Connect

AVDD_LVDS A77 LVDS_ENAVDD ENABLE (or general COMX 3.3V CMOS purpose output)

A78 NC No Connect

A79 NC No Connect

A80 GND GND

A81 NC No Connect

A82 NC No Connect

CPU- I2C Channel 3 A83 I2C2_C_SCL COMX 3.3V -Open Drain CMOS Clock

CPU-I2C Channel 3 A84 I2C2_C_SDA BI-DIR 3.3V -Open Drain CMOS DATA

SDHC_CPU_COMX_D SDIO/SDHC - DATA A85 BI-DIR 3.3V CMOS AT3 3

A86 NC No Connect

A87 NC No Connect

SERDES A88 CLK_PCIE_REF_P REFERENCE COMX Clock Output Differential CLOCK

SERDES A89 CLK_PCIE_REF_N REFERENCE COMX Clock Output Differential CLOCK

A90 GND GND

SPI_CPU_COMX_CS0 CPU- SPI Chip A91 COMX 3.3V CMOS _L Select 0

SPI_COMX_CPU_MIS A92 CPU- SPI MISO CARRIER 3.3V CMOS O

A93 CLK_SDHC_COMX SDIO/SDHC - Clock COMX 3.3V CMOS

COMX-T2081 Installation and Use (6806800U66C) 47 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-3 COMX Row A Pin Assignments (continued) ROW A Pins Pin Name Description Source I/O Voltage

A94 CLK_SPI_COMX CPU- SPI CLOCK COMX 3.3V CMOS

SPI_CPU_COMX_MO A95 CPU- SPI MOSI COMX 3.3V CMOS SI

A96 GND GND

A97 PWR_V12P0 12V Power CARRIER 12V DC Supply

A98 PWR_V12P0 12V Power CARRIER 12V DC Supply

A99 PWR_V12P0 12V Power CARRIER 12V DC Supply

A100 GND GND

A101 PWR_V12P0 12V Power CARRIER 12V DC Supply

A102 PWR_V12P0 12V Power CARRIER 12V DC Supply

A103 PWR_V12P0 12V Power CARRIER 12V DC Supply

A104 PWR_V12P0 12V Power CARRIER 12V DC Supply

A105 PWR_V12P0 12V Power CARRIER 12V DC Supply

A106 PWR_V12P0 12V Power CARRIER 12V DC Supply

A107 PWR_V12P0 12V Power CARRIER 12V DC Supply

A108 PWR_V12P0 12V Power CARRIER 12V DC Supply

A109 PWR_V12P0 12V Power CARRIER 12V DC Supply

A110 GND GND

Table 3-4 COMX Row B Pin Assignments ROW B Pins Pin Name Description Source I/O Voltage

B1 GND GROUND

LED_PHY_COMX_LAN1_ LAN1- LED 3.3V -Open Drain B2 COMX ACT_L ACTIVITY CMOS

CLK_1588_CPU_COMX_ B3 1588 Clock Out COMX 3.3V CMOS CLKOUT

48 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-4 COMX Row B Pin Assignments (continued) ROW B Pins Pin Name Description Source I/O Voltage

1588_CPU_COMX_PULS B4 1588 Pulse Out 1 COMX 3.3V CMOS EOUT1

1588_CPU_COMX_PULS B5 1588 Pulse Out 2 COMX 3.3V CMOS EOUT2

1588_CPU_COMX_ALAR B6 1588 Alarm Out 1 COMX 3.3V CMOS MOUT1

1588_CPU_COMX_ALAR B7 1588 Alarm Out 2 CARRIER 3.3V CMOS MOUT2

1588_COMX_CPU_TRIGI B8 1588 Trigger In 1 CARRIER 3.3V CMOS N1

1588_COMX_CPU_TRIGI B9 1589 Trigger In 2 CARRIER 3.3V CMOS N2

CLK_1588_COMX_CPU_ B10 1588 Clock In CARRIER 3.3V CMOS CLKIN

B11 GND GROUND

B12 NC No Connect

B13 NC No Connect

B14 NC No Connect

B15 NC No Connect

B16 NC No Connect

B17 NC No Connect

B18 NC No Connect

B19 NC No Connect

B20 NC No Connect

B21 GND GROUND

B22 NC No Connect

B23 NC No Connect

COMX-T2081 Installation and Use (6806800U66C) 49 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-4 COMX Row B Pin Assignments (continued) ROW B Pins Pin Name Description Source I/O Voltage

Power on Carrier Board is up and B24 COMX_PWR_OK CARRIER 3.3V CMOS Input stable. Can be left unconnected.

B25 NC No Connect

B26 NC No Connect

Watch Dog Timer B27 COMX_WDT_R COMX 3.3V CMOS Out

B28 COMX_LWE1_L LBC Write Enable CARRIER 3.3V CMOS

Carrier System B29 CFG_RCW_SRC2 CARRIER 3.3V CMOS Config - RCW SRC2

Carrier System B30 CFG_RCW_SRC3 CARRIER 3.3V CMOS Config - RCW SRC3

B31 GND GROUND

Carrier System B32 CFG_RCW_SRC4 CARRIER 3.3V CMOS Config - RCW SRC4

CPU- I2C Channel 2 3.3V -Open Drain B33 I2C1_C_SCL COMX Clock CMOS

CPU- I2C Channel 2 3.3V -Open Drain B34 I2C1_C_SDA BI-DIR Clock CMOS

B35 NC No Connect

B36 NC No Connect

B37 NC No Connect

B38 NC No Connect

B39 NC No Connect

B40 NC No Connect

B41 GND GROUND

B42 NC No Connect

B43 NC No Connect

50 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-4 COMX Row B Pin Assignments (continued) ROW B Pins Pin Name Description Source I/O Voltage

USB Over Current B44 USB_OC_0_1_L CARRIER 3.3V CMOS for Port 0 and 1

USB_CPU_COMX_PORT B45 USB - PORT 1 BI-DIR USB I/O 1_N

USB_CPU_COMX_PORT B46 USB - PORT 1 BI-DIR USB I/O 1_P

B47 NC No Connect

Default No Connect. Requires B48 NC (USB1_PWREN) new/custom p/n to COMX 3.3V CMOS Output connect to CPU USB0_DRVVBUS

B49 COMX_RST_IN_L System Reset Input CARRIER 3.3V CMOS

System Reset B50 COMX_RST_OUT_L COMX 3.3V CMOS Output

B51 GND

SERDES_COMX_CPU_R CPU SERDES - B52 CARRIER SERDES Input X5_P LANE 5 Receive

SERDES_COMX_CPU_R CPU SERDES - B53 CARRIER SERDES Input X5_N LANE 5 Receive

SDIO/SDHC - B54 SDHC_CPU_COMX_CMD BI-DIR 3.3V CMOS Command

SERDES_COMX_CPU_R CPU SERDES - B55 CARRIER SERDES Input X4_P LANE 4 Receive

SERDES_COMX_CPU_R CPU SERDES - B56 CARRIER SERDES Input X4_N LANE 4 Receive

SDIO/SDHC - Write B57 COMX_SDHC_WP CARRIER 3.3V CMOS Protect

SERDES_COMX_CPU_R CPU SERDES - B58 CARRIER SERDES Input X3_P LANE 3 Receive

SERDES_COMX_CPU_R CPU SERDES - B59 CARRIER SERDES Input X3_N LANE 3 Receive

COMX-T2081 Installation and Use (6806800U66C) 51 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-4 COMX Row B Pin Assignments (continued) ROW B Pins Pin Name Description Source I/O Voltage

B60 GND GROUND

SERDES_COMX_CPU_R CPU SERDES - B61 CARRIER SERDES Input X2_P LANE 2 Receive

SERDES_COMX_CPU_R CPU SERDES - B62 CARRIER SERDES Input X2_N LANE 2 Receive

B63 COMX_SDHC_CD_L SDIO/SDHC - Detect CARRIER 3.3V CMOS

SERDES_COMX_CPU_R CPU SERDES - B64 CARRIER SERDES Input X1_P LANE 1 Receive

SERDES_COMX_CPU_R CPU SERDES - B65 CARRIER SERDES Input X1_N LANE 1 Receive

B66 NC No Connect

B67 NC No Connect

SERDES_COMX_CPU_R CPU SERDES - B68 CARRIER SERDES Input X0_P LANE 0 Receive

SERDES_COMX_CPU_R CPU SERDES - B69 CARRIER SERDES Input X0_N LANE 0 Receive

B70 GND GROUND

B71 NC No Connect

B72 NC No Connect

B73 NC No Connect

B74 NC No Connect

B75 NC No Connect

B76 NC No Connect

B77 NC No Connect

B78 NC No Connect

LVDS Panel Back Light Enable B79 LVDS_BKLT_EN COMX 3.3V CMOS (or general purpose output)

52 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-4 COMX Row B Pin Assignments (continued) ROW B Pins Pin Name Description Source I/O Voltage

B80 GND GROUND

B81 NC No Connect

B82 NC No Connect

LVDS Panel Back Light and Brightness 3.3V CMOS B83 LVDS_BKLT_CTRL Control COMX (or general purpose PWM output)

B84 NC No Connect

B85 NC No Connect

B86 NC No Connect

B87 NC No Connect

B88 SPI_CPU_COMX_CS1_L SPI - Chip Select 1 COMX 3.3V CMOS

B89 NC No Connect

B90 GND GROUND

B91 NC No Connect

B92 NC No Connect

B93 NC No Connect

B94 NC No Connect

B95 NC No Connect

B96 NC No Connect

SERDES REFERENCE Frequency Select B97 COMX_REF_CLK_SEL HIGH: 125 MHz CARRIER 3.3V CMOS LOW/NC: 100 MHz (See 4.5.1, 4.20.1)

B98 NC No Connect

B99 NC No Connect

COMX-T2081 Installation and Use (6806800U66C) 53 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-4 COMX Row B Pin Assignments (continued) ROW B Pins Pin Name Description Source I/O Voltage

B100 GND GROUND

B101 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B102 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B103 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B104 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B105 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B106 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B107 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B108 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B109 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

B110 GND GROUND

Table 3-5 COMX Row C Pin Assignments ROW C Pin Pin Name Description Source I/O Voltage

C1 GND GROUND

LED_PHY_COMX_L 3.3V Open Drain C2 LAN2- LED Activity COMX AN2_ACT_L CMOS

MDI_PHY_COMX_LA LAN Channel 2 - C3 BI-DIR 10/100/1000 Base T N2_3_N Differential Pair 3

MDI_PHY_COMX_LA LAN Channel 2 - C4 BI-DIR 10/100/1000 Base T N2_3_P Differential Pair 3

LED_PHY_COMX_L LAN2- LED LINK 3.3V Open Drain C5 COMX AN2_LNK100_L 100Mbps CMOS

MDI_PHY_COMX_LA LAN Channel 2 - C6 BI-DIR 10/100/1000 Base T N2_2_N Differential Pair 2

MDI_PHY_COMX_LA LAN Channel 2 - C7 BI-DIR 10/100/1000 Base T N2_2_P Differential Pair 2

54 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-5 COMX Row C Pin Assignments (continued) ROW C Pin Pin Name Description Source I/O Voltage

LED_PHY_COMX_L LAN2- LED LINK 1000 3.3V Open Drain C8 COMX AN2_LNK1000_L Mbps CMOS

MDI_PHY_COMX_LA LAN Channel 2 - C9 BI-DIR 10/100/1000 Base T N2_1_N Differential Pair 1

MDI_PHY_COMX_LA LAN Channel 2 - C10 BI-DIR 10/100/1000 Base T N2_1_P Differential Pair 1

C11 GND GROUND

MDI_PHY_COMX_LA LAN Channel 2 - C12 BI-DIR 10/100/1000 Base T N2_0_N Differential Pair 0

MDI_PHY_COMX_LA LAN Channel 2 - C13 BI-DIR 10/100/1000 Base T N2_0_P Differential Pair 0

LED_PHY_COMX_L 3.3V Open Drain C14 LAN2 - LED LINK 10 Mbps COMX AN2_LNK_L CMOS

C15 COMX_LAD_08 IFC - ADDRESS/DATA 8 BI-DIR 3.3V CMOS

C16 COMX_LAD_09 IFC - ADDRESS/DATA 9 BI-DIR 3.3V CMOS

IFC - Command LATCH C17 COMX_LCLE_L COMX 3.3V CMOS ENABLE

IFC- AVD (External C18 COMX_IFCMALE_L COMX 3.3V CMOS address Latch Enable)

SERDES_COMX_CP CPU SERDES - LANE 6 C19 CARRIER SERDES Input U_RX6_P Receive

SERDES_COMX_CP CPU SERDES - LANE 6 C20 CARRIER SERDES Input U_RX6_N Receive

C21 GND GROUND

SERDES_COMX_CP CPU SERDES - LANE 7 C22 CARRIER SERDES Input U_RX7_P Receive

SERDES_COMX_CP CPU SERDES - LANE 7 C23 CARRIER SERDES Input U_RX7_N Receive

C24 NC No Connect

C25 COMX_LAD_10 IFC - ADDRESS/DATA 10 BI-DIR 3.3V CMOS

COMX-T2081 Installation and Use (6806800U66C) 55 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-5 COMX Row C Pin Assignments (continued) ROW C Pin Pin Name Description Source I/O Voltage

C26 COMX_LAD_11 IFC - ADDRESS/DATA 11 BI-DIR 3.3V CMOS

C27 COMX_LAD_12 IFC - ADDRESS/DATA 12 BI-DIR 3.3V CMOS

C28 COMX_LAD_13 IFC - ADDRESS/DATA 13 BI-DIR 3.3V CMOS

C29 COMX_LAD_14 IFC - ADDRESS/DATA 14 BI-DIR 3.3V CMOS

C30 COMX_LAD_15 IFC - ADDRESS/DATA 15 BI-DIR 3.3V CMOS

C31 GND GROUND

UART_CPU_COMX_ C32 UART - PORTA Transmit COMX 3.3V CMOS output PORTA_TXD

UART_COMX_CPU_ C33 UART - PORTA Receive CARRIER 3.3V CMOS input PORTA_RXD

UART_COMX_CPU_ UART - PORTA Clear To C34 CARRIER 3.3V CMOS input PORTA_CTS_N Send

UART_CPU_COMX_ UART - PORTA Request C35 COMX 3.3V CMOS output PORTA_RTS_N To Send

UART_CPU_COMX_ C36 UART - PORTB Transmit COMX 3.3V CMOS output PORTB_TXD

UART_COMX_CPU_ C37 UART - PORTB Receive CARRIER 3.3V CMOS input PORTB_RXD

UART_COMX_CPU_ UART - PORTB Clear To C38 CARRIER 3.3V CMOS input PORTB_CTS_N Send

UART_CPU_COMX_ UART - PORTB Request C39 COMX 3.3V CMOS output PORTB_RTS_N To Send

Connects to CPU and C40 EMI1_MDIO BI-DIR 2.5V CMOS Ethernet PHY

C41 GND GROUND

UART_CPU_COMX_ C42 UART - PORTC Transmit COMX 3.3V CMOS output PORTC_TXD

UART_COMX_CPU_ C43 UART - PORTC Receive CARRIER 3.3V CMOS input PORTC_RXD

C44 NC No Connect

56 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-5 COMX Row C Pin Assignments (continued) ROW C Pin Pin Name Description Source I/O Voltage

C45 NC No Connect

UART_CPU_COMX_ C46 UART - PORTD Transmit COMX 3.3V CMOS output PORTD_TXD

UART_COMX_CPU_ C47 UART - PORTD Receive CARRIER 3.3V CMOS input PORTD_RXD

C48 NC No Connect

C49 NC No Connect

Connects to CPU and C50 COMX_EMI1_MDC COMX 2.5V CMOS Ethernet PHY

C51 GND GROUND

C52 NC No Connect

C53 NC No Connect

C54 COMX_TYPE0_L No Connect

C55 NC No Connect

C56 NC No Connect

C57 COMX_TYPE1_L No Connect

C58 NC No Connect

C59 NC No Connect

C60 GND GROUND

C61 NC No Connect

C62 NC No Connect

Connects to CPU and C63 EMI2_MDIO BI-DIR 1.2V CMOS Ethernet PHY

C64 GND GROUND

C65 NC No Connect

C66 NC No Connect

C67 COMX_LCS5_L IFC - Chip Select 5 COMX 3.3V CMOS

COMX-T2081 Installation and Use (6806800U66C) 57 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-5 COMX Row C Pin Assignments (continued) ROW C Pin Pin Name Description Source I/O Voltage

C68 NC No Connect

C69 NC No Connect

C70 GND GROUND

C71 NC No Connect

C72 NC No Connect

C73 NC No Connect

C74 NC No Connect

C75 NC No Connect

C76 GND GROUND

C77 COMX_LOE_L IFC - Output Enable COMX 3.3V CMOS output

C78 NC No Connect

C79 NC No Connect

C80 GND GROUND

C81 COMX_LWP_L IFC - Write Protect COMX 3.3V CMOS output

C82 COMX_LRB_L IFC - ReadBusy COMX 3.3V CMOS output

IRQ_COMX_CPU_IR COMX CPU Interrupt 1 C83 CARRIER 3.3V CMOS input Q1 (CPU IRQ03/GPIO1[23])

C84 GND GROUND

C85 NC No Connect

C86 NC No Connect

C87 GND GROUND

GPIO_COMX_CPU_ CPU General Purpose IO C88 BI-DIR 3.3V CMOS input GPI0 (GPIO1[24]

GPIO_COMX_CPU_ CPU General Purpose IO C89 BI-DIR 3.3V CMOS input GPI1 (GPIO1[25]

C90 GND GROUND

58 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-5 COMX Row C Pin Assignments (continued) ROW C Pin Pin Name Description Source I/O Voltage

C91 NC No Connect

GPIO_COMX_CPU_ CPU General Purpose IO C92 BI-DIR 3.3V CMOS input GPI3 (GPIO1[26]

C93 GND GROUND

GPIO_COMX_CPU_ CPU General Purpose IO C94 BI-DIR 3.3V CMOS input GPI4 (GPIO1[27]

C95 NC No Connect

C96 GND GROUND

C97 NC No Connect

SPI_CPU_COMX_CS C98 SPI Chip Select 2 COMX 3.3V CMOS Output 2_L

SPI_CPU_COMX_CS C99 SPI Chip Select 3 COMX 3.3V CMOS Output 3_L

C100 GND GROUND

C101 NC No Connect

C102 NC No Connect

C103 GND GROUND

C104 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

C105 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

C106 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

C107 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

C108 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

C109 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

C110 GND GROUND

COMX-T2081 Installation and Use (6806800U66C) 59 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-6 COMX Row D Pin Assignments ROW D Pin Pin Name Description Source I/O Voltage

D1 GND GROUND

D2 NC No Connect

D3 NC No Connect

D4 NC No Connect

D5 NC No Connect

D6 NC No Connect

D7 NC No Connect

D8 NC No Connect

D9 NC No Connect

D10 NC No Connect

D11 GND GROUND

D12 NC No Connect

D13 NC No Connect

D14 NC No Connect

IRQ_CPU_CO D15 CPU Interrupt Output COMX 3.3V CMOS Output MX_IRQOUT_L

IRQ_COMX_C COMX CPU Interrupt 0 D16 CARRIER 3.3V CMOS Input PU_IRQ0 (CPU IRQ02)

CLK_COMX_L D17 IFC - Clock 0 COMX 3.3V CMOS Output CLK0

CLK_COMX_L D18 IFC - Clock 1 COMX 3.3V CMOS Output CLK1

SERDES_CPU CPU SERDES - LANE 6 D19 COMX-T2081 SERDES Output _COMX_TX6_P Transmit

SERDES_CPU CPU SERDES - LANE 6 D20 _COMX_TX6_ COMX-T2081 SERDES Output Transmit N

D21 GND GROUND

60 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-6 COMX Row D Pin Assignments (continued) ROW D Pin Pin Name Description Source I/O Voltage

SERDES_CPU CPU SERDES - LANE 7 D22 COMX-T2081 SERDES Output _COMX_TX7_P Transmit

SERDES_CPU CPU SERDES - LANE 7 D23 _COMX_TX7_ COMX-T2081 SERDES Output Transmit N

D24 COMX_LCS6_L IFC Chip Select 6 COMX 3.3V CMOS Output

D25 COMX_LCS3_L IFC Chip Select 3 COMX 3.3V CMOS Output

D26 COMX_LA_31 IFC- Address 31 COMX-T2081 3.3V CMOS IO

D27 COMX_LA_30 IFC- Address 30 COMX-T2081 3.3V CMOS IO

D28 COMX_LAD_00 IFC - Address/Data 0 COMX 3.3V CMOS IO

D29 COMX_LA_29 IFC- Address 29 COMX-T2081 3.3V CMOS IO

D30 COMX_LA_28 IFC- Address 28 COMX-T2081 3.3V CMOS IO

D31 GND GROUND

D32 COMX_LA_27 IFC- Address 27 COMX-T2081 3.3V CMOS IO

D33 COMX_LA_26 IFC- Address 26 COMX-T2081 3.3V CMOS IO

D34 COMX_LAD_01 IFC - Address/Data 1 BI-DIR 3.3V CMOS IO

D35 COMX_LAD_02 IFC - Address/Data 2 BI-DIR 3.3V CMOS IO

D36 COMX_LA_25 IFC- Address 25 COMX-T2081 3.3V CMOS IO

D37 COMX_LA_24 IFC- Address 24 COMX-T2081 3.3V CMOS IO

D38 COMX_LA_23 IFC- Address 23 COMX-T2081 3.3V CMOS IO

D39 COMX_LA_22 IFC- Address 22 COMX-T2081 3.3V CMOS IO

D40 COMX_LA_21 IFC- Address 21 COMX-T2081 3.3V CMOS IO

D41 GND GROUND

D42 COMX_LA_20 IFC- Address 20 COMX-T2081 3.3V CMOS IO

D43 COMX_LA_19 IFC- Address 19 COMX-T2081 3.3V CMOS IO

D44 COMX_LA_18 IFC- Address 18 COMX-T2081 3.3V CMOS IO

COMX-T2081 Installation and Use (6806800U66C) 61 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-6 COMX Row D Pin Assignments (continued) ROW D Pin Pin Name Description Source I/O Voltage

D45 COMX_LAD_03 IFC - Address/Data 3 BI-DIR 3.3V CMOS IO

D46 COMX_LAD_04 IFC - Address/Data 4 BI-DIR 3.3V CMOS IO

D47 COMX_LAD_05 IFC - Address/Data 5 BI-DIR 3.3V CMOS IO

D48 COMX_LAD_06 IFC - Address/Data 6 BI-DIR 3.3V CMOS IO

D49 COMX_LAD_07 IFC - Address/Data 7 BI-DIR 3.3V CMOS IO

IFC - ALE (External D50 COMX_LALE_L COMX 3.3V CMOS Output Address Latch Enable)

D51 GND GROUND

D52 NC No Connect

D53 NC No Connect

COMX_TYPE3 D54 No Connect _L

D55 NC No Connect

D56 NC No Connect

COMX Type 2 COMX_TYPE2 D57 (Default=Asserted/GND COMX 3.3V CMOS Output _L : Type 6 module)

D58 NC No Connect

D59 NC No Connect

D60 GND GROUND

D61 NC No Connect

D62 NC No Connect

Connects to CPU and D63 EMI2_MDC COMX 1.2V CMOS Ethernet PHY

D64 NC No Connect

D65 NC No Connect

D66 NC No Connect

62 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

Table 3-6 COMX Row D Pin Assignments (continued) ROW D Pin Pin Name Description Source I/O Voltage

D67 GND GROUND

D68 NC No Connect

D69 NC No Connect

D70 GND GROUND

D71 NC No Connect

D72 NC No Connect

D73 NC No Connect

D74 NC No Connect

D75 NC No Connect

D76 GND GROUND

COMX_LWE0_ D77 IFC - Write Enable COMX 3.3V CMOS Output L

D78 COMX_LA_16 IFC-Address 16 COMX

D79 COMX_LA_17 IFC-Address 17 COMX 3.3V CMOS Output

D80 GND GROUND 3.3V CMOS Output

D81 COMX_LCTL_L IFC - Buffer Control COMX 3.3V CMOS Output

D82 COMX_LCS4_L IFC - Chip Select 4 COMX 3.3V CMOS Output

D83 NC No Connect

D84 GND GROUND

D85 NC No Connect

D86 NC No Connect

D87 GND GROUND

GPIO_CPU_C CPU General Purpose D88 BI-DIR 3.3V CMOS Output OMX_GPO_0 IO (GPIO1[28]

GPIO_CPU_C CPU General Purpose D89 BI-DIR 3.3V CMOS Output OMX_GPO_1 IO (GPIO1[29]

COMX-T2081 Installation and Use (6806800U66C) 63 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

Table 3-6 COMX Row D Pin Assignments (continued) ROW D Pin Pin Name Description Source I/O Voltage

D90 GND GROUND

D91 NC No Connect

GPIO_CPU_C CPU General Purpose D92 BI-DIR 3.3V CMOS Output OMX_GPO_3 IO (GPIO1[30]

D93 GND GROUND

GPIO_CPU_C CPU General Purpose D94 BI-DIR 3.3V CMOS Input OMX_GPO_4 IO (GPIO1[31]

D95 NC No Connect

D96 GND GROUND

COMX_TAMPE D97 Tamper Detect CARRIER 3.3V CMOS Input R_DETECT_L

D98 NC No Connect

D99 NC No Connect

D100 GND No Connect

D101 NC NC

D102 NC NC

D103 GND GROUND

D104 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

D105 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

D106 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

D107 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

D108 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

D109 PWR_V12P0 12V Power Source CARRIER 12V DC Supply

D110 GND GROUND

64 COMX-T2081 Installation and Use (6806800U66C) Controls, LEDs, and Connectors

3.2.3 COMX-CAR-P1 Connectors Table 3-7 describes modules interface connection on COMX-CAR-P1 and its configuration. Table 3-7 COMX-T2081 Interfaces on COMX-CAR-P1 COMX-CAR-P1 Module Interface/Signal Default Configuration Connector

dTSEC3@FM1 (Linux: eth0) P1, Top RJ-45 10/100/1000Base-T

dTSEC4@FM1 (Linux:eth1) P1, Bottom RJ-45

SERDES Lanes 0-3 J6 (x4 PCIe) PCIe Gen2x4

SERDES Lanes 4-7 J14 (x16 PCIe) PCIe Gen3x4

2-wire RS-232 DTE, UART 1 (Linux: ttyS0) P15, Top DE9 115200/8/N/1 (no flow ctl), $consoledev

UART 2 (Linux: ttyS1) P15, Bottom DE9 2-wire RS-232 DTE UART 3,4 (Linux: ttyS2,S3) P16, P17, planar IDC header

USB 0 (Linux: usb1) P4, Top USB Type A Host USB w/OC protect/detect, +5 V@500 ma (managed by carrier) USB 1 (Linux: usb2) P4, Bottom USB Type A Storage:Linux:sd[a-g]

SDIO @12.5MHz SDHC Clk/Cmd/Data (Bi-Dir) µSD Socket J3 Linux: sd[a:g] (See RN/Errata)

HIGH (deasserted, no SDcard COMX_SDHC_CD_L (In) µSD Socket J3 inserted)

SDHC_SEL_IN (In) Jumper P13 HIGH (select carrier SDIO) [1-2]

Jumper P12, SOIC-8 Socket Carrier: CS0 (P12[1-2]) to carrier Carrier SPI CS0/CS1 (Out) XU1 SPI flash

SPI Clk/Data (Bi-Dir) SOIC-8 Socket XU1 SPI I/O to carrier SPI flash

Jumpers P5, P6, Connector Module: LOW (VDD disabled) LVDS_ENAVDD (Out) P4 Carrier: P4:0V

LVDS_BKLT_EN (Out) Header P7 LOW (backlight disabled)

LVDS_BKLT_CTRL (Out) Header P7 LOW (0% PWM/brightness)

EMI1_MDC/MDIO (Bi-Dir) Connector U25, U26 (20pos PHY IO (clause 22) EMI2_MDC/MDIO (Bi-Dir)edge conn; extends J14, J10) PHY IO (clause 22 or 45)

COMX-T2081 Installation and Use (6806800U66C) 65 Controls, LEDs, and Connectors Controls, LEDs, and Connectors

3.3 LEDs The COMX-T2081 module contains user defined LEDs.

3.3.1 On-Board POST LEDs The COMX board contains four LEDs which can be controlled via the CPLD. The SMART EC provided U-Boot image uses these LEDs to indicate boot status as described in the Table 3-8 below. This default behavior is implemented in the U-Boot source as part of the SMART EC layer of the NXP SDK 2.0 available via the Customer Resource Center at https://www.smartembedded.com/ec/support/. Table 3-8 On-board POST LEDs LED Name Function Status

STEADY BLINKING: System at U-Boot CLI. LED 0 Used as a system status indicator ON: System started booting the Linux kernel.

OFF: Reset LED 1 Used as a reset source reason ON: Reset reason was due to power loss

OFF: primary boot bank LED 2 Used as a boot bank indicator ON: secondary boot bank

Used as a secure boot option OFF: non-secure boot LED 3 indicator ON: secure boot

All LEDs are ON means RCW is loading

All LEDs are OFF means RCW finished loading and U-Boot started the boot process.

66 COMX-T2081 Installation and Use (6806800U66C) Chapter 4

Functional Description

4.1 Overview This chapter provides information on functional blocks of the COMX-T2081 module. The COMX-T2081 is a COM Express module based on the NXP QorIQ T2081 processor. This module provides some common interfaces such as Gigabit Ethernet, USB, PCIE, UART, and XFI. This module is designed to support the processor core frequency up to 1.8 GHz. The QorIQ T2081 integrated communication processor has eight virtual cores. The processor provides high-performance data path acceleration logic, network and peripheral bus interfaces required for networking, telecommunication, data communication, wireless infrastructure, and military/aerospace applications.

COMX-T2081 Installation and Use (6806800U66C) 67 Functional Description Functional Description

4.2 Block Diagram Figure 4-1 COMX-T2081 Block Diagram

68 COMX-T2081 Installation and Use (6806800U66C) Functional Description

4.3 Processor Core and Cache Memory Complex The QorIQ T2081 processor has four high-performance dual-threaded e6500 cores, built on Power Architecture® technology, sharing a 2MB L2 cache. The following are features of e6500:  512 KB CoreNet Platform Cache (CPC)  Hierarchical interconnect fabric – CoreNet fabric supporting coherent and non-coherent transactions with prioritization and bandwidth allocation amongst CoreNet end-points – Queue Manager (QMan) fabric supporting packet-level queue management and quality of service scheduling  One (1) 32-/64-bit DDR3 SDRAM memory controller – DDR3 and DDR3L with ECC and interleaving support – Memory prefetch engine  Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: – Packet parsing, classification, and distribution (Frame Manager 1.1) – Queue management for scheduling, packet sequencing, and congestion management (Queue Manager 1.1) – Hardware buffer management for buffer allocation and deallocation (Buffer Manager 1.1) – Cryptography Acceleration (SEC 5.2) – RegEx Pattern Matching Acceleration (PME 2.1) – Decompression/Compression Acceleration (DCE 1.0)  Eight (8) SerDes lanes at up to 10GHz  Eight (8) Ethernet interfaces, supporting combinations of: – Up to two (2) 10 bps Ethernet MAC (XFI/10GBase-KR) – Up to six (6) 1Gbps Ethernet MACs: Up to two (2) RGMII (10/1001000Base-T) Up to five (5) SGMII/1000Base-KX – Up to two (2) 2.5Gbps Ethernet MACs (SGMII) – IEEE Std 1588 support  High-speed peripheral interfaces Four (4) PCI Express controllers (two support PCIe 2.0 and two support PCIe 3.0)  Additional peripheral interfaces

COMX-T2081 Installation and Use (6806800U66C) 69 Functional Description Functional Description

– Two (2) high-speed USB 2.0 controllers with integrated PHY – Enhanced secure digital (SDIO) host controller (SD/MMC/eMMC) – Enhanced Serial peripheral interface (eSPI) – Four (4) I2C controllers – Four (4) 2-pin UARTs or two 4-pin UARTs – Integrated flash controller supporting NAND and NOR flash  Three (3) 8-channel DMA engines  780 FC-PBGA package, 23mm x 23mm, 0.8mm pitch

4.4 Integrated Memory Controller The T2081 processor integrates a 64-bit DDR controller that supports DDR3/3L. It can support a maximum of 64GB of main memory. The ECC capability detects all double-bit errors, detects all multi-bit errors within a nibble, and corrects all single-bit errors. The DDR controller is capable of self-refresh mode and an initialization bypass during system power- on after an abnormal shutdown for use by designers in preventing re-initialization.

4.5 Integrated Flash Controller Bus The 16-bit wide Integrated Flash Controller (IFC) bus is connected to a total of 2Gb, or 256MB NOR Flash, and an 8Gb or 1GB NAND Flash. The NOR Flash is split into (2) redundant 128MB devices/banks (A/B). Each NOR Flash is used to store the RCW data (active and alternates), FMan microcode, DTB, U-Boot, reference Linux kernel and associated RAM disk. By default, the NAND Flash is used to store an alternate Linux file system. The IFC bus is also extended to the COM Express connectors. CS0 and CS1 go to two (2) NOR Flash and a different line CS2 go to NAND Flash. CS3-CS6 are routed to the COMX connector/carrier.

4.5.1 NOR Flash The board supports two (2) redundant 128MB NOR flash devices/banks (A/B) via IFC bus. This is the default storage of the BOOT image. The NOR Flash is Micron MT28EW01GABA1LPC-0SIT. Its size is 1Gb/128MB. It has 1,024 uniform blocks, 128KB each. NOR flash is the default boot device from which the CPU loads the RCW and U-Boot. It is also the default boot device from which U-Boot loads FMAN microcode, the Linux Kernel+dtb, and optionally, a RAMDISK.

70 COMX-T2081 Installation and Use (6806800U66C) Functional Description

By default, Bank B is HW write protected, and should always contain known-good boot images. IFC chip selects 0 and 1 (CS0/1) are multiplexed by the CPLD to select NOR banks, based on Hardware/Software inputs. CS0 always addresses the target boot bank for the next reset. At POR (and by default at Reset), Carrier signal LBC_CS_KEY (COMX Pin A30) controls CS0/1. If LOW/NC, CS0 selects Bank A, and CS1 selects Bank B. If HIGH, CS0 selects Bank B (CS1 = Bank A). Software can override the effect of LBC_CS_KEY prior to Reset (but not POR). By default, if the CPLD Watchdog fires during boot, it will force a NOR bank switch/Reset (overriding Carrier and Software). The Software Watchdog Reset can also be configured to cause a NOR bank switch. See Section 4.20.9 on page 89 and Section 4.20.10 on page 90 for CPLD boot/bank configuration/status register definitions. See Section 5.3 on page 98 and Section 5.4.3 on page 114 for U-boot interface to boot bank selection and upgrade. Each NOR Flash bank is preprogrammed with a default RCW, a selection of valid, alternate RCWs, module-specific U-Boot and Linux DTB, default FMAN ucode from NXP, and a reference Linux kernel. See Section 5.4 on page 110, Section 5.6 on page 122, and the Software Release Notes for instructions on comparing the installed firmware versions against the current SMART EC binary release, building custom versions from source, and upgrading with new/custom firmware. A detailed memory map of the NOR Flash is displayed in the following table. Table 4-1 NOR Flash Memory Map Start NOR1 CS02 CS1 Size Description Blk#

0x000 0000 0000 E800 0000 E000 0000 128K Active RCW Option Data

0x001 0002 0000 E802 0000 E002 0000 128K RCW Option Data 1

0x002 0004 0000 E804 0000 E004 0000 128K RCW Option Data 2

0x003 0006 0000 E806 0000 E006 0000 128K RCW Option Data 3

0x004 0008 0000 E808 0000 E008 0000 128K RCW Option Data 4

0x005 000A 0000 E80A 0000 E00A 0000 128K RCW Option Data 5

0x006 000C 0000 E80C 0000 E00C 0000 128K RCW Option Data 6

0x007 000E 0000 E80E 0000 E00E 0000 128K RCW Option Data 7

0x008 0010 0000 E810 0000 E010 0000 128K RCW Option Data 8

0x009 0012 0000 E812 0000 E012 0000 128K RCW Option Data 9

0x00A 0014 0000 E814 0000 E014 0000 128K RCW Option Data 10

0x00B 0016 0000 E816 0000 E016 0000 128K RCW Option Data 11

0x00C 0018 0000 E818 0000 E018 0000 128K RCW Option Data 12

COMX-T2081 Installation and Use (6806800U66C) 71 Functional Description Functional Description

Table 4-1 NOR Flash Memory Map (continued) Start NOR1 CS02 CS1 Size Description Blk#

0x00D 001A 0000 E81A 0000 E01A 0000 128K RCW Option Data 13

0x00E 001C 0000 E81C 0000 E01C 0000 128K Reserved

0x00F 001E 0000 E81E 0000 E01E 0000 128K Unused

0x010 0020 0000 E820 0000 E020 0000 128K FMAN u-code image

0x011 0022 0000 E822 0000 E022 0000 128K Reserved

0x012 0024 0000 E824 0000 E024 0000 13.75M Unused

0x080 0100 0000 E900 0000 E100 0000 80M RAMDISK Image3

0x300 0600 0000 EE00 0000 E600 0000 29M Kernel Image

0x3E8 07D0 0000 EFD0 0000 E7D0 0000 1.9M Device Tree Blob

0x3F7 07EE 0000 EFEE 0000 E7EE 0000 128K U-BOOT Environment

0x3F8 07F0 0000 EFF0 0000 E7F0 0000 1M U-BOOT image

1. NOR flash Local Memory Map.

2. COMX Effective address Space for NOR FLASH. This applies to CS1 also.

3. RAMDISK is not preprogrammed, but is available for download/creation as part of binary or source distributions on the CRC via https://www.smartembedded.com/ec/support/

4.5.2 NAND Flash The module supports 1GB NAND flash via the IFC bus. The NAND Flash is attached to the IFC bus and works in 8-bit mode. The NAND Flash is Micron MT29F8G08ABBCAH4-IT with a Flash size of 1 GB. Each page contains 4320 bytes (4096 + 224 bytes). Each block contains 64 pages (256K + 14K bytes). NAND Glash is used as the default boot device for the Linux root file system. A reference file system is preprogrammed. The map is described in the following table. Table 4-2 NAND Flash Memory Map Start Address End Size Type Device Description

0100 0000 4000 0000 1008M JFFS2 mtdblock6 User partition

72 COMX-T2081 Installation and Use (6806800U66C) Functional Description

4.6 Board Reset Reason The board reset reason is displayed as part of the U-Boot start-up as shown below. Artesyn Embedded Technologies (c) 2017 RST Reason: 0x0100 Module: COMX-T2081 rev: 0 Serial: E178D85 Board ID: COMX-T2081-01 CPLD rev: 09/22/2017 seq: 0 The hex value can be interpreted from the table below (where bits are numbered MSB[0:15]LSB). Table 4-3 Board Reset Reason bit values Default Value (Power Bit Description on Reset)

Reset due to power cycle. 0 0: No reset due to power cycle 1 1: Reset due to power cycle (PORESET)

Reset due to CPLD Boot watchdog timeout 1 0: No reset due to CPLD watchdog timeout 0 1: Reset due to CPLD watchdog timeout

Reset due to Software PORESET reset request 2 0: No reset due to software PORESET reset request 0 1: Reset due to software PORESET reset request

Reset due to Carrier Request 3 0: No reset due to carrier request 0 1: Reset due to carrier request

Reset due to COP_SRESET_L request 4 0: No reset due to COP_SRESET_L request 0 1: Reset due to COP_SRESET_L request

Reset due to COP_HRESET_L request 5 0: No reset due to COP_HRESET_L request 0 1: Reset due to COP_HRESET_L request

Reset due to I2C Watchdog request 6 0: No reset due to I2C Watchdog request 1: Reset due to I2C Watchdog request (HRESET)

COMX-T2081 Installation and Use (6806800U66C) 73 Functional Description Functional Description

Table 4-3 Board Reset Reason bit values (continued) Default Value (Power Bit Description on Reset)

Reset due to CPU RESET request 7 0: No reset due to CPU reset request 0 1: Reset due to CPU reset request (HRESET)

Reset due to External Hardware 3s reset request 8 0: No reset due to hardware reset request 0 1: Reset due to hardware reset request (PORESET)

9:15 Reserved 0

4.7 SerDes Block T2081 supports eight (8) configurable SerDes lanes. The SerDes lane configuration is determined by the contents of the RCW during boot up. Table 4-4 COMX-T2081 SERDES Configuration SRDS Protocol Assignments Options _PRT # CL_S Lane 0 Lane 1 Lane 2 Lane 3 Lane 4 Lane 5 Lane 6 Lane 7 1

PCIe x4 1 (Default) AA PCIe x4 (5 Gbps) (8 Gbps)

XFI XFI SGMII SGMII SGMII SGMII PCIe x2 (5 26E(10.312 (10.312 (1.25 (1.25 (1.25 (1.25 Gbps) 5 Gbps) 5 Gbps) Gbps) Gbps) Gbps) Gbps)

SGMII SGMII PCIe x4 3 BC PCIe x2 (5 Gbps) (1.25 (1.25 (8 Gbps) Gbps) Gbps)

PCIe x1 SGMII SGMII SGMII SGMII SGMII PCIe x2 (5 4C8(5 (1.25 (3.25 (3.25 (1.25 (1.25 Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps)

PCIe x1 SGMII SGMII SGMII PCIe x1 SGMII SGMII SGMII 5CA(5 (1.25 (3.25 (3.25 (5 (1.25 (1.25 (1.25 Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps)

PCIe x1 SGMII SGMII SGMII SGMII SGMII 6D6(5 (1.25 (1.25 (1.25 PCIe x2 (8 Gbps) (1.25 (1.25 Gbps) Gbps) Gbps) Gbps) Gbps) Gbps)

74 COMX-T2081 Installation and Use (6806800U66C) Functional Description

Table 4-4 COMX-T2081 SERDES Configuration (continued) SRDS Protocol Assignments Options _PRT # CL_S Lane 0 Lane 1 Lane 2 Lane 3 Lane 4 Lane 5 Lane 6 Lane 7 1

PCIe x1 PCIex1 PCIe x1 SGMII 7 DE PCIe x4 (5 Gbps) (8 (5 (5 (1.25 Gbps) Gbps) Gbps) Gbps)

PCIe x1 PCIex1 SGMII SGMII 8 E0 PCIe x4 (5 Gbps) (8 (5 (1.25 (1.25 Gbps) Gbps) Gbps) Gbps)

PCIe x1 SGMII SGMII SGMII PCIe x1 PCIex1 PCIe x1 SGMII 9F2(5 (1.25 (1.25 (1.25 (8 (5 (5 (1.25 Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps)

PCIe x1 SGMII SGMII SGMII PCIe x1 PCIex1 PCIe x1 SGMII 10 F8 (5 (1.25 (1.25 (1.25 (5 (5 (5 (1.25 Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps)

PCIe x1 SGMII SGMII SGMII PCIe x1 PCIex1 SGMII SGMII 11 FA (5 (1.25 (1.25 (1.25 (5 (5 (1.25 (1.25 Gbps) Gbps Gbps Gbps Gbps) Gbps) Gbps) Gbps)

XFI XFI SGMII SGMII 12 6C (10.312 (10.312 (1.25 (1.25 PCIe x4 (5 Gbps) 5 Gbps) 5 Gbps) Gbps) Gbps

XFI XFI SGMII SGMII PCIe x1 SGMII SGMII SGMII 13 70 (10.312 (10.312 (1.25 (1.25 (5 (1.25 (1.25 (1.25 5 Gbps) 5 Gbps) Gbps) Gbps) Gbps) Gbps) Gbps) Gbps)

The Reset Configuration Word (RCW) command may be used to display the current RCW configuration. For more information about reset configuration word, refer to Section 5.9 on page 126.

4.8 Thermal Management A thermal sensor attached to a thermal diode is located inside the CPU. This is used to access the CPU temperature. The address of (ADT7461) is 0x4C on I2C bus 1. Sensor temp2 represents the CPU thermal diode, while temp1 represents the package temperature of the ADT device.(U61, located on the bottom side of the module, near the center).

COMX-T2081 Installation and Use (6806800U66C) 75 Functional Description Functional Description

A second temperature sensor reports the package temperature of the ADT7411 ADC voltage monitor (U68, located on the bottom side edge opposite the COMX connectors, near the DIMMs). This device is address 0x48 on I2C bus 1. A third temperature sensor reports the package temperature of the MCP98243 SPD eeprom (U34, located on module top side, between CPU and DIMMs). This device is address 0x1F on I2C bus 1.

4.9 Main Memory

4.9.1 Memory Interface COMX-T2081 processor only supports a single memory channel. The board can support both dual rank and single rank. If single rank is used, the second rank shall be depopulated. All memory variants have ECC. Supports only x8 bit width memory devices.

4.10 GPIO There are total of eight CPU GPIOs to connect to the COM Express connector. The following figure shows the pin assignment of the CPU GPIOs. The board is designed such that each of the GPIOs has the option of a pull down and pull up resistor for flexibility. The default populated resistor is pull up. Figure 4-2 GPIO CPU Assignment

76 COMX-T2081 Installation and Use (6806800U66C) Functional Description

4.11 eMMC Four SDIO data lanes are routed to the eMMC on the COMX-T2081 through a multiplexer. These are also routed to the COMX connector through the same multiplexer. A SDHC select signal available on the COMX connector (SDHC_SEL_IN, COMX Pin A34), allows the carrier to choose the path / device. If the signal is NC on carrier, the module defaults to on-board eMMC.The eMMC is a 128 GB device with part number MTFC128GAJAECE-IT. NOTICE

See HW Release Notes for errata related to carrier SDIO support. When SDHC_SEL_IN from carrier is HIGH/Asserted, SDHC IO, Card Detect (COMX_SDHC_CD_L) and Write Protect (COMX_SDHC_WP) signals from carrier are routed to CPU. When SDHC_SEL_IN is LOW/Deasserted, the eMMC is selected for IO and the carrier CD and WP signals are ignored. SDHC_SEL_IN is driven HIGH/Asserted by default on COMX-CAR-P1 [P13], disabling eMMC. No data is preprogrammed into the eMMC.

4.12 SPI Interface The COMX-T2081 module provides a SPI bus from the CPU with four chip select signals. All SPI bus signals are routed to COM Express connectors.

4.13 LAN The module route two (2) 10/100/1000 ports with LED control signals to the COM Express connector. The supporting magnetics must be on the carrier. The module can also be configured to route up to five (5) SGMII 1Gb, up to two (2) SGMII 2.5Gb, and up to two (2) 10GbE XFI/KR ports to the carrier. As there are only eight (8) MACs on the T2081, some SGMII configurations must reduce or eliminate the 10/100/1000Base-T (RGMII) links to the carrier.

NOTE: By default, U-boot disables SGMII MACs/SERDES, even if an RCW is selected that configures a SERDES port for SGMII.

COMX-T2081 Installation and Use (6806800U66C) 77 Functional Description Functional Description

4.14 PHY On the COMX-T2081, dTSEC3 and dTSEC4 of FM1 are routed to the PHY via RGMII. These MAC assignments are internal to the T2081 processor.The MDIO address for the first port is 0x01 and the second is 0x02.

4.14.1 10/100/1000 BASE T Two (2) 10/100/1000 Base T interfaces are routed on the COM Express connector. The RGMII interface of the processor is utilized and its connected to Broadcom PHY, BCM5482.

4.14.2 MDIO Two (2) MDIO busses from the CPU (EMI[12]_MDC/MDIO) are routed to the COM Express connector to access Ethernet PHYs and their registers located on the carrier.

4.15 UART Interface The T2081 CPU provides up to four (4) UART ports (Tx and Rx signals) or up to two (2) UART ports with hardware flow control (Tx, Rx, RTS, and CTS signals). The COMX-T2081 module is configured by default to route four (4) UART ports to the COM Express connector. A multiplexer is used to convert from 2-pin to 4-pin UART mode. This can be done by changing the UART Mode register in the CPLD.

4.16 Real Time Clock The Real Time Clock (RTC) is implemented by an ST Micro M41T65Q6F device. It is accessed over I2C bus 1 of the T2081 CPU at address 0xD0. The RTC provides a 32KHz clock output to the CPU for timekeeping and is supplied by the VCC_BAT pin on the COM Express connector.

78 COMX-T2081 Installation and Use (6806800U66C) Functional Description

4.17 Watchdog

4.17.1 Software Watchdog The software watchdog is implemented using an I2C device at address 0x68 on the I2C-0 bus. This watchdog can be enabled from the U-Boot prompt via an environment variable "wdt-wait”, which has a default value of 0 (watchdog disabled). This environment variable contains two strings, one specifies a multiplier and the other specifies the resolution of the watchdog timer. These two strings are delimited with a colon. The software watchdog is enabled right before the Linux Kernel starts. Options for this environment variable are described below. Variable: wdt-wait=:, multiplier = base: 10 | range: 0 - 31 | default: 0 resolution = supported strings: 0.0625sec | 0.250sec | 1.0sec 4.0sec | 60.0sec, default: 1.0sec DEFAULT: wdt-wait=0

4.17.2 CPLD Watchdog The CPLD watchdog provides a mechanism to cold reset the board, if something goes wrong during the start of U-Boot. If the watchdog triggers before the U-Boot prompt is displayed, or Linux begins to boot, then the board will reset and the CPLD will switch to the other boot bank for the next attempted boot. To modify the length of CPLD watchdog timer, you can use the cpld command in U-Boot as shown below. cpld wd [ms] - change hw watchdog timeout. [ms] represents the integer timeout in ms. Maximum accepted is 32767 ms. Timeout will reset to default if power is lost. The default value for the CPLD watchdog timer is 20000 ms.

4.18 USB The board supports two USB 2.0 interfaces. This means that there is an internal PHY inside the CPU. The interface complies with Universal Serial Bus Revision 2.0 Specification, On-The-Go (OTG) Supplement to the USB 2.0 Specification, Revision 1.0a, and EHCI Specification for Universal Serial Bus Rev 1.0. The USB controller operates in three modes, namely Host, Device and OTG. Only high-speed and full-speed operation are supported in device mode.

COMX-T2081 Installation and Use (6806800U66C) 79 Functional Description Functional Description

Two USB 2.0 ports are routed to the COM Express connector. There is one OCP input interrupt coming back to the CPU from the COM Express connector, this interrupt caters to the two USB interfaces. The firmware can support booting from a USB device plugged-in from the carrier.

4.19 I2C Interface There are three independent I2C controllers that T2081 can support. Figure 4-3 shows the I2C topology. Each channel can run up to 400 kHz. Table 4-5 shows the list of the devices connected to CPU I2C interface. NOTE: Linux identifies the buses as i2c-0 through i2c-2. Figure 4-3 CPU I2C

Table 4-5 I2C Interface Address Bus Component Function

0x1D/0x3A I2C1 MMA8451QR1 Digital accelerometer

10-bit 8-channel ADC voltage 0x48/0x90 I2C1 ADT7411ARQZ-REEL7 monitor / Temp Sensor

Dual-channel digital Temp 0x4C/0x98 I2C1 ADT7461ARMZ sensor

2-Kbit Serial EEPROM 0x55/0xAA I2C1 AT24C02C-XHM-T (VPD/MAC)

80 COMX-T2081 Installation and Use (6806800U66C) Functional Description

Table 4-5 I2C Interface (continued) Address Bus Component Function

512-Kbit Serial EEPROM 0x56/0xAC I2C1 AT24C512C-SSHM-T (USER)

0x57/0xAE Memory Module Temperature I2C1 MCP98243T-BE/MNY 0x1F/0x3E Sensor w/ EEPROM for SPD

Low-power serial real-time 0x68/0xD0 I2C1 M41T65Q6F clocks with alarm

FemtoClock® NG Octal 0x6D/0xDA I2C1 8T49N287A-051NLGI8 Universal Frequency Translator

4.19.1 I2C Device Voltage Monitor The ADT7411 is a voltage sensor monitor which measures the voltage of the power rails. It is located on I2C1 at address 0x48 and measures voltage ADC. Below are the voltages seen from the voltage monitor. Table 4-6 Power rail Voltage Value Voltage Monitor Input Typical Voltage

in0 (Early 3.3V) 3.3V

in1 (1V) 1.0V

in2 (1.35V) 1.35V

in3 (1.35V DDR) 1.35V

in4 (1.8V) 1.8V

in5 (.675V DDR_VTT) 0.67V

in6 (1.0V Core) 1.0V

in7 (2.5V *.662) 1.655V

in8 (3.3V *.662) 2.184V

4.19.2 I2C User EEPROM A user EEPROM is provided on the module implemented in the AT24C512C device. This is located on I2C1. The I2C address of this EEPROM is 0x56.

COMX-T2081 Installation and Use (6806800U66C) 81 Functional Description Functional Description

The AT24C512C provides 512Kbits of storage and supports sequential read and page write.

4.19.3 I2C Device WDT The software-controlled watchdog timer (See Section 4.17.1 on page 79), M41T65Q6F is located on I2C1 and the device address is 0x68. It is a warm reset to the CPU.

4.19.4 I2C Device RTC

The Real Time Clock M41T65Q6F is located on I2C1 and the device address is 0x68. This device provides a 32KHz clock output and interrupt to the CPU.

4.19.5 I2C Device Clock Generators

One clock generator 8T49N287A is located on I2C1 and the device address is 0x6D.

4.20 CPLD Information

NOTE: The following sections describe the register map for the COMX-T2081CPLD. The bit order assumed by these tables is MSB[0:15]LSB. Table 4-7 CPLD Register Map Reset due to power Address Register Access cycle value

0x00 CPLD Build Year and Month Code Register RO

CPLD Build Day and Sequence Code 0x02 RO Register

0x08 Module Variant and Revision Register RO

0x0C Reset Source Register R/WTC 0x8000

0x10 Reset Control Register RW 0x0600

0x14 Boot Watchdog Control Register RO/WO/RW 0x7D00

0x18 Debug LED Control/Status Register RW 0x0000

0x1C Flash Write Protect Register RW 0x0880

0x20 Boot Status Register RO 0x8000

0x24 Boot Control Register R/W 0x0000

82 COMX-T2081 Installation and Use (6806800U66C) Functional Description

Table 4-7 CPLD Register Map (continued) Reset due to power Address Register Access cycle value

0x28 COMX Mode Control/Status Register RO/RW 0xX000

0x2C Interrupt Source Register RO 0x0000

0x30 Interrupt Source Mask Register RW 0x0000

0x34 LVDS Control Register RW 0x0000

0x38 RCW Configuration Source Register RO 0xXX00

0x80 CPLD Program Control Register R/W 0x0000

4.20.1 CPLD Build Year and Month Code Register (0x00)

Table 4-8 Control Build Year and Month Code Register (0x00) CPLD Build Year & Month Code Register – 0x00 Bit Description Default Access

CPLD year code in BCD (from 0x00 to 0x99). A 0:7 -RO value of 0x16 will represent 2016 year.

8:15 CPLD month code in BCD (from 0x01 to 0x12) - RO

4.20.2 Control FPGA 1 Build Day and Sequence Code Register (0x02)

Table 4-9 CPLD Build Day and Sequence Code Register (0x02) CPLD Build Day and Sequence Code Register – 0x04 Bit Description Default Access

0:7 CPLD day code in BCD (from 0x01 to 0x31). - RO

Sequence code, incremented by one for each build 8:15 -RO in the same day starting from 0x00.

COMX-T2081 Installation and Use (6806800U66C) 83 Functional Description Functional Description

4.20.3 Module Variant and Revision Register (0x08) Table 4-10 Module Variant and Revision Register (0x08) Module Revision and Variant Register – 0x08 Bit Description Default Access

0 Reserved RO

Board Variant -RO 1:3 100: T2081 Baseline EXT RO

4 Reserved 0RO

Variant Revision 5:7 000-111 EXT RO

8:15 Reserved 0RO

4.20.4 CPLD Reset Source Register (0x0C) Table 4-11 CPLD Reset Source Register (0x0C) Reset Source Register – 0x0C Default Bit Description Access (POR only)

Reset due to power cycle.

0 0: No reset due to power cycle 1 R/WTC

1: Reset due to power cycle (PORESET)

Reset due to CPLD Boot watchdog timeout

1 0: No reset due to CPLD watchdog timeout 0 R/WTC

1: Reset due to CPLD watchdog timeout (HRESET)

Reset due to Software PORESET reset request

2 0: No reset due to software PORESET reset request 0 R/WTC

1: Reset due to software PORESET reset request

84 COMX-T2081 Installation and Use (6806800U66C) Functional Description

Table 4-11 CPLD Reset Source Register (0x0C) (continued) Reset Source Register – 0x0C Default Bit Description Access (POR only)

Reset due to Carrier Request

3 0: No reset due to carrier request 0 R/WTC

1: Reset due to carrier request (HRESET)

Reset due to COP_SRESET_L request

4 0: No reset due to COP_SRESET_L request 0 R/WTC

1: Reset due to COP_SRESET_L request

Reset due to COP_HRESET_L request

5 0: No reset due to COP_HRESET_L request 0 R/WTC

1: Reset due to COP_HRESET_L request

Reset due to I2C Watchdog request

6 0: No reset due to I2C Watchdog request 0 R/WTC

1: Reset due to I2C Watchdog request (HRESET)

Reset due to CPU RESET request

7 0: No reset due to CPU reset request 0 R/WTC

1: Reset due to CPU reset request (HRESET)

Reset due to External Hardware 3’s reset request The signal name at the COMX connector is COMX_RST_IN_L at pin B49. 8 0 R/WTC 0: No reset due to hardware reset request

1: Reset due to hardware reset request (PORESET)

9:15 Reserved 0RO

COMX-T2081 Installation and Use (6806800U66C) 85 Functional Description Functional Description

4.20.5 Reset Control Register (0x10) Table 4-12 Reset Control Register (0x10) Reset Control Register – 0x10 Bit Description Default Access

SDRAM Reset

0 0: Do not hold SDRAMs in reset state 0 R/W

1: Reset and hold SDRAMs in reset state

NOR flash Reset

1 0: Do not hold NOR flash in reset state 0 R/W

1: Reset and hold NOR flash in reset state

Ethernet Dual PHY Reset

2 0: Do not hold Dual PHY in reset state 0 R/W

1: Reset and hold Dual PHY in reset state

eMMC reset

3 0: Do not hold eMMC device in reset state 0 R/W

1: Reset and hold eMMC device in reset state

4 Reserved 1RO

5 Reserved 1RO

Carrier Reset (Output)

6 0: Do not hold Carrier Reset (Output) in reset state 0 R/W

1: Reset and hold Carrier Reset (Output) in reset state

Generate PORESET

7 0: Do not generate PORESET 0 R/W

1: Generate board Power On reset (self clearing)

8:15 Reserved 0RO

86 COMX-T2081 Installation and Use (6806800U66C) Functional Description

4.20.6 Boot Watchdog Control Register (0x14) Table 4-13 Boot Watchdog Control Register (0x14) Boot Watchdog Control Register – 0x14 Bit Description Default Access

Watchdog Stop

0: Watchdog is not stopped (This is not equivalent to 0 watchdog enable, as enable is done in hardware 0 R/W automatically after reset)

1: Watchdog is Stopped.

0x3E8 1:15 Watchdog Remaining Expire Time (1ms/bit) (10 RO seconds)

4.20.7 Debug LED Control/Status Register (0x18) Table 4-14 Debug LED Control/Status Register (0x18) Debug LED Control/Status Register – 0x18 Bit Description Default Access

Amber debug LED 0

0 0: LED is OFF 0 R/W

1: LED is ON

Amber debug LED 1

1 0: LED is OFF 0 R/W

1: LED is ON

Amber debug LED 2

2 0: LED is OFF 0 R/W

1: LED is ON

Amber debug LED 3

3 0: LED is OFF 0 R/W

1: LED is ON

COMX-T2081 Installation and Use (6806800U66C) 87 Functional Description Functional Description

Table 4-14 Debug LED Control/Status Register (0x18) (continued) Debug LED Control/Status Register – 0x18 Bit Description Default Access

4:6 Reserved 0RO

Software Control of Debug LEDs

7 0: CPLD debug logic controls LEDs 0 R/W

1: CPLD debug LED status register controls LEDs

8:15 Reserved 0RO

4.20.8 Flash Write Protect Register (0x1C)

Table 4-15 Flash Write Protect Register (0x1c) Flash Write Protect Register – 0x1C Bit Description Default Access

NOR flash A Low Block Write Protect

0: No write protection on NOR flash A low block (device 0 0 R/W WP# pin).

1: Write protected

NOR flash B Low Block Write Protect

0: No write protection on NOR flash B low block (device 1 1 R/W WP# pin)

1: Write protected

2:3 Reserved 0RO

NOR flash B Full Write protect

0: No write protection. NOR flash B can be written. The lowest block of the device is controlled by the WP# pin 4 1 R/W which is controlled by bit 1 of this register.Note that NOR flash B is connected to CS1 (chip select 1) at power up.

1: All of NOR flash B is Write protected.

5:6 Reserved 0RO

88 COMX-T2081 Installation and Use (6806800U66C) Functional Description

Table 4-15 Flash Write Protect Register (0x1c) (continued) Flash Write Protect Register – 0x1C Bit Description Default Access

I2C EEPROM Write protect

7 0: No write protection for the VPD and User EEPROMs 1 R/W

1: Write protection for the VPD and User EEPROMs

8:15 Reserved 0RO

4.20.9 Boot Status Register (0x20)

Table 4-16 Boot Status Register – 0x20 Boot Status Register – 0x20 Bit Description Default Access

Last boot bank 0 (default 0 0: Board booted last from NOR Flash A (bank A) if bit 1 is 0. RO POR only) 1: Board booted from NOR Flash B (bank B) if bit 1 is 0.

0: Board has booted from on-board NOR Flash device. 1 Ext RO 1: Board has booted from an alternate device.

LBC_CS_KEY Signal Status The signal name at the COMX connector is LBC_CS_KEY at pin A30. 2 Ext RO 0: NOR Flash Bank A at POR.

1: NOR Flash Bank B at POR.

3:14 Reserved 0RO

NOR Flash busy

15 0: NOR Flash is not busy Ext RO

1: NOR Flash is busy

COMX-T2081 Installation and Use (6806800U66C) 89 Functional Description Functional Description

4.20.10 Boot Control Register (0x24) Table 4-17 Boot Control Register (0x24) Boot Control Register – 0x24 Bit Description Default Access

0 Boot bank selection 0 (default R/W POR only) 0: NOR flash A is selected as the boot device for the next reset. 1: NOR flash B is selected as the boot device for the next reset.

1 Hardware Software Boot Bank Selection 0 (default R/W The signal name at the COMX connector is POR only) LBC_CS_KEY at pin A30. 0: NOR flash bank is selected by LBC_CS_KEY setting. 1: NOR flash bank is selected by Boot Bank Selection setting.

2 Software-controlled (I2C) WDT Boot Swap Selection 0 (default R/W POR only) 0: Boot bank will not change with software-controlled (I2C) wdt reset. 1: Boot bank will change with software-controlled (I2C) wdt reset.

3:15 Reserved 0RO

4.20.11 COMX Mode Control/Status Register (0x28) Table 4-18 COMX Mode Control/Status Register (0x28) COMX Mode Control/Status Register – 0x28 Bit Description Default Access

0 IFC bus (to Carrier) SW Enable 0 R/W 0: IFC bus is disabled by SW. (Carrier enable [Bit 1] will override). 1: IFC bus is enabled by SW.

90 COMX-T2081 Installation and Use (6806800U66C) Functional Description

Table 4-18 COMX Mode Control/Status Register (0x28) (continued) COMX Mode Control/Status Register – 0x28 Bit Description Default Access

1 IFC bus (to Carrier) Enable Ext. RO The signal name at the COMX connector is COMX_IFC_EN at pin A32. 0: IFC bus is disabled by carrier. (Software enable [Bit 0] will override). 1: IFC bus is enabled by carrier.

2 Reference Clock Select Ext. RO The signal name at the COMX connector is COMX_REF_CLK_SEL at pin B97. 0: 100MHz System clock has been selected by the carrier.The clock generator defaults to 100 MHz so no software intervention is necessary. 1: 125MHz System clock has been selected by the carrier. Software needs to program the clock generator for a 125 MHz COMX PCIe Reference clock and then reset the COMX carrier.

3 SDHC Mode Select Ext. RO The signal name at the COMX connector is SDHC_SEL_IN at pin A34. 0: The Carrier has selected the onboard EMMC module for the SDIO/SDHC interface. 1: The carrier has selected a carrier device for the SDIO/SDHC interface.

4:6 Reserved 0RO

7 COMX UART operating mode 0 R/W 0: Route processor UART signals to support 2-port/4- wire mode (UARTS 1 and 2). 1: Route processor UART signals to support 4-port/2- wire mode (UARTS 1,2,3,4).

8:15 Reserved 0RO

COMX-T2081 Installation and Use (6806800U66C) 91 Functional Description Functional Description

4.20.12 Interrupt Source Register (0x2C) Table 4-19 Interrupt Source Register (0x2C) Interrupt Source Register – 0x2C Bit Description Default Access

M41T65 RTC Interrupt request

0 0: RTC Interrupt status clear. 0RO

1: RTC interrupt requested.

MCP98243 Temp alert Interrupt request

1 0: Temp alert Interrupt status clear. 0RO

1: Temp alert interrupt requested.

ADT7411 ADC Interrupt request

2 0: ADC Interrupt status clear. 0RO

1: ADC interrupt requested.

MMA8451 Accelerometer Interrupt Request 1

3 0: Accelerometer Interrupt 1 status clear. 0RO

1: Accelerometer Interrupt 1 requested.

MMA8451 Accelerometer Interrupt Request 2

4 0: Accelerometer interrupt 2 status clear. 0RO

1: Accelerometer interrupt 2 requested.

5:15 Reserved 0RO

4.20.13 Interrupt Source Mask Register (0x30) When an unmasked source requests an interrupt, the CPLD notifies the CPU through IRQ00. The source(s) of the interrupt can be read from the Interrupt Source Register (0x2C).

92 COMX-T2081 Installation and Use (6806800U66C) Functional Description

Table 4-20 Interrupt Source Mask Register (0x30) Interrupt Source Mask Register – 0x30 Bit Description Default Access

M41T65 RTC Interrupt Mask

0 0: RTC Interrupt masked. 0 R/W

1: RTC interrupt enabled.

MCP98243 Temp alert Interrupt mask

1 0: Temp alert Interrupt masked. 0 R/W

1: Temp alert interrupt enabled.

ADT7411 ADC Interrupt Mask

2 0: ADC Interrupt masked. 0 R/W

1: ADC interrupt enabled.

MMA8451 Accelerometer Interrupt 1 Mask

3 0: Accelerometer Interrupt 1 masked 0 R/W

1: Accelerometer Interrupt 1 enabled.

MMA8451 Accelerometer Interrupt 2 Mask

4 0: Accelerometer interrupt 2 masked. 0 R/W

1: Accelerometer interrupt 2 enabled.

5:15 Reserved 0RO

4.20.14 LVDS Control Register (0x34)

NOTICE

This functionality was intended for possible future variants that support LVDS, however COMX-T2081-01 can use these as general purpose outputs under software control.By default, U-Boot prevents writing to this register on the COMX-T2081 with cpld command; requires U-Boot rebuild, or direct access with mm).

COMX-T2081 Installation and Use (6806800U66C) 93 Functional Description Functional Description

Table 4-21 LVDS Control Register (0x34) LVDS Control Register – 0x34 Bit Description Default Access

LVDS enable VDD The signal name at the COMX connector is 0 LVDS_ENAVDD at pin A77. 0 R/W 0: LVDS panel VDD disabled.

1: LVDS panel VDD enabled.

LVDS backlight enable The signal name at the COMX connector is LVDS_BKLT_EN at pin B79. 1 0: LVDS panel backlight disabled. 0 R/W

1: LVDS panel backlight enabled.

2:3 Reserved 0RO

LVDS backlight duty cycle control The signal name at the COMX connector is LVDS_BKLT_CTRL at pin B83.

0000: 0% duty cycle (minimum brightness).

0001: 10% duty cycle.

0010: 20% duty cycle.

0011: 30% duty cycle.

4:7 0100: 40% duty cycle.

0101: 50% duty cycle.

0110: 60% duty cycle. 0000 R/W 0111: 70% duty cycle.

1000: 80% duty cycle.

1001: 90% duty cycle.

1010: 100% duty cycle (maximum brightness)

8:15 Reserved 0RO

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4.20.15 RCW Configuration Source Register (0x38) These bits reflect the state of the CFG_RCW_SRC<0:4> signals from the COMX connector, as driven by the carrier (see 3.1.2). If NC on carrier, these have a weak pull down (default to 0) on module. Table 4-22 RCW Configuration Source Register (0x38) RCW Configuration Source Register – 0x38 Bit Description Default Access

0:2 Reserved 0RO

RCW Configuration Source Strapping (from COMX) 0_0000: 16-bit NOR flash on module (default) 0_0001: EMMC flash on module 0_0010: SDIO on carrier 3:7 0_0011: SPI with 16-bit addressing (on carrier) 0_0100: SPI with 24-bit addressing (on carrier) EXT RO 0_0101 to 1_1110: Reserved 1_1111: Hard-Coded RCW for 66.67 MHz SYSCLK frequency

8:15 Reserved 0RO

4.20.16 CPLD Program Control Register (0x80)

Table 4-23 CPLD Program Control Register (0x80) CPLD Program Control Register – 0x80 Bit Description Default Access

0 Processor SPI CS3 routing

0: Processor SPI CS3 is routed to COMX pin C99 The signal name at the COMX connector is 0 R/W SPI_CPU_COMX_CS3_L

1: Processor SPI CS3 is routed to CPLD SN pin

1:15 Reserved 0RO

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4.21 Clock The board supports a differential reference clock, of 100MHz or 125MHz, that is routed to the COM Express connector.The carrier controls the clock speed with the COMX_REF_CLK_SEL signal (pin B97; see Section 3.2.2 on page 42). If NC on the carrier, the module default is 100MHz. A register in the CPLD indicates what clock speed is selected. This clock can be used as a PCIe clock.

96 COMX-T2081 Installation and Use (6806800U66C) Chapter 5

Software and Firmware

5.1 Overview This chapter provides information for setup requirements, software requirements, U-Boot commands, environment variables, release requirements and firmware upgrade configurations for COMX-T2081 module. The COMX-T2081 module has a Board Reference Boot Firmware and Linux, based on the NXP QorIQ SDK. This firmware/software distribution has configuration data and binary executables designed for this product. The binary images provided are U-Boot, Linux kernel, Linux device tree blob, Linux root file system, and NXP microcode. A proprietary Yocto source code layer is also available for development.

5.2 Setup Requirements The following are the minimum setup requirements for the COMX-T2081 module. See Section 3.2.3 on page 65 for default interface configuration and connections through the COMX-CAR-P1 carrier.:  One serial cable to $consoledev on carrier (typically with null-modem) to connect the COMX-T2081 module for console interface  One network cable to a 10/100/1000Base-T port on carrier, to access the on-board Ethernet (U-Boot searches for a link, starting with $ethact).  A TFTP server connected to the network. – The IP address should be whatever is appropriate for the local network. See Section 5.5.1 on page 118 for examples. – The TFTP root is /tftpboot/. You need to create a sub-directory with the name , cpu-name = t2081 (For example /tftpboot/t2081/)  COMXT2081[_COMX_Txxxx]-X.X.X_Source.tar.gz or COMXT2081_BSP_GA-x.y.z.zip (see Section 5.4.1 on page 110 or Section 5.4.3.1 on page 114).  NFS service is active on this TFTP server and files are exported to /nfsboot/ cpu-name = t2081

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5.3 U-Boot Commands The following are the commands commonly used in U-Boot. To enter the U-Boot shell, press keys while the autoboot is counting down. Table 5-1 U-Boot Commands Command Description

Used to display the usage options for the command cmd. help [cmd] or ? [cmd] If cmd is not specified, U-Boot displays the brief usage options for all of the available commands.

Displays the value of the environment variable vn printenv [vn] If vn is not specified, U-Boot displays the values for all of the environment variables.

Sets the value of the environment variable vn to vv.Ifvv is not specified, U-Boot will not define the environment variable vn. setenv [vv] If vv includes spaces, it should be enclosed within single quote marks. For example: setenv manufacturer’SMART Embedded Computing’ Saves all the environment variables persistently to the U-Boot env section on NOR flash. saveenv Note: If attempting to save the U-Boot environment for Bank B, bootbank wp disable must be invoked first.

env default -a To restore the environment variables to factory default values.

Downloads image through network using TFTP protocol. tftpboot tftpboot [loadAddress] [[hostlPaddr:]bootfilename] For example: tftpboot $loadaddr $ubootfile

Boots application image from memory. bootm [addr [arg...]] bootm For example: bootm $norbootaddr $norfsaddr $norfdtaddr For example: bootm $loadaddr - $fdtaddr

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Table 5-1 U-Boot Commands (continued) Command Description

Used to display the current bootbank information, to set bootbank for next boot, and to enable/disable write protect on Bank B. Note: The bootbank switch command does not toggle between boot banks, it sets the bootbank to the non-Active/Current bank (if booted from Bank A this would switch to Bank B, the redundant bank).

Note: The bank listed by bootbank as the Next boot bank is the target for all NOR Flash commands (For example protect, erase, saveenv, run updxxxx). Some commands may silently fail on Bank B unless bootbank wp disable is invoked first.

bootbank bootbank - redundant boot bank sub-system Usage: bootbank - show current boot bank information bootbank sw[itch] - switch to redundant boot bank on next reset. bootbank set a:b - boot from boot bank: A/B. bootbank wp e[nable]:d[isable] - enable/disable write protect on Bank B bootbank ctl sw:hw -switch boot bank control between software and hardware bootbank h[elp] - show this help

Used to display CPLD information and to read and write to CPLD registers. Usage: cpld info - display CPLD version. cpld read reg - display value cpld write reg val - write to cpld dump - dump raw register data cpld cpld eep en:dis - Enable/Disable I2C EEPROM Write Protect. cpld wd [ms]- change hw watchdog timeout. [ms] represents the integer timeout in ms. Maximum accepted is 32767 ms. Timeout resets to default if power is lost.

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Table 5-1 U-Boot Commands (continued) Command Description

Used to display and program MAC addresses contained in the VPD EEPROM. Usage: mac [read|save|id|ports|0|1|2|3|4|5|6|7|8|9] mac - Display MAC address info mac mac read - read EEPROM content into memory mac save - save to the EEPROM. mac id - program system id. mac ports - program the number of ports. mac X - program the MAC address for port X [X=0...7]

Used to display and program the system ID contained in the VPD EEPROM. brd - display and program the system ID in EEPROM. Usage: brd [read|save|id|num|date|bdid|asmb] brd read - read EEPROM content into memory brd brd save - save to the EEPROM brd id - program system id brd num - program system serial number brd date - program date brd bdid - program board identifier brd asmb - program assembly number

Used to display the current RCW configuration and to set one of the supported RCW configurations to the current RCW configuration. Usage: rcw - Display the RCW with which system boots u. rcw list - List and validate all RCW options available. rcw rcw set opt# - Activate RCW opt# for next boot up. range [1...13] rcw info opt# - Display the info for RCW option opt#. Range [1...13] rcw help - Show cmd usage The md command is used to display contents of the 4GB address space. md Note: .b, .w, and .l is the operation unit, byte, word, and long respectively. md [.b,.w,.l] address [# of objects]

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Table 5-1 U-Boot Commands (continued) Command Description

The mm command is used to modify contents of the 4GB address space. mm Note: .b, .w, and .l is the operation unit, byte, word, and long respectively. mm [.b,.w,.l] address The cp command is used to copy a specified amount of data from the source address to the target address. cp Note:.b, .w, and .l is the operation unit, byte, word, and long respectively. cp [.b,.w,.l] source target count The cmp command is used to compare a specified amount of data starting cmp at two different address locations. Note: .b, .w, and .l is the operation unit, byte, word, and long respectively.

The protect command is used to turn write protection on and off for a specified range of addresses for a NOR flash device. protect protect start end protect start +len protect all The erase command is used to erase a specified range of addresses for a NOR flash device. Erase erase start end erase start +len erase all

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Table 5-1 U-Boot Commands (continued) Command Description

The nand info command is used to display information about a NAND flash device. nand info

The nand read command is used to read a specified amount of data from the NAND flash and store at a specified memory location. nand read addr off|partition size

The nand write command is used to write a specified amount of data from a memory location to the NAND flash. nand write addr off|partition size

The nand erase command is used all or a specified area of NAND flash. nand erase [clean] [off size]

The nand bad command displays bad blocks of the NAND flash. nand nand bad

The nand dump command is used to display a page of NAND flash data. nand dump[.oob] off

The nand scrub command is used to erase the bad blocks in the NAND flash. This command is considered unsafe. nand scrub

The nand markbad command is used to mark blocks as bad. This command is considered unsafe. nand markbad off [...]

The nand biterr command is used to create a bit error at the specified offset of the NAND flash. This command is considered unsafe. nand biterr off

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Table 5-1 U-Boot Commands (continued) Command Description

The i2c crc32 command is used to compute a CRC32 checksum for a specified address range of an i2c device. i2c crc32 chip address[.0, .1, .2] count

The i2c dev command shows or sets the current i2c bus. i2c dev [dev]

The i2c loop command is used to perform a series of data reads from an i2c device. i2c loop chip address[.0, .1, .2] [# of objects] [# of delay(us)]

The i2c md command is used to read a specified amount of data form an i2c device. i2c md chip address[.0, .1, .2] [# of objects]

The i2c mm command is used to write data to an i2c device. The address is incremented after each write for the next write. i2c mm chip address[.0, .1, .2] i2c The i2c mw command is used to write a specified value to a specified range of addresses on an i2c device. i2c mw chip address[.0, .1, .2] value [count]

The i2c nm command is used to modify the same address with each subsequent write. The address does not auto increment with each write. i2c nm chip address[.0, .1, .2]

The i2c probe command probes for all devices on the i2c bus. i2c probe

The i2c read command is used to read data from an i2c device and save the data to a specified memory location. i2c read chip address[.0, .1, .2] length memaddress

The i2c reset command is used to rest the i2c controller. i2c reset

The i2c speed command is used to display or set the i2c bus speed. i2c speed[speed]

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Table 5-1 U-Boot Commands (continued) Command Description

sf The sf probe command is used to initialize a flash device on the SPI bus. sf probe [bus:]cs [hz] [mode]

The sf read command is used to read a specified amount of data from a SPI device and store that data in memory. sf read addr offset len

The sf write command is used to write a specified amount of data from a location in memory to a SPI device. sf write addr offset len

The sf erase command is used to erase a specified range of data on a SPI device. sf erase offset len mmc The mmc info command is used to display information about the mmc device. mmc info

The mmc read command is used to read a specified number of blocks of data from the mmc device and write that data to a specified memory location. mmc read addr blk# cnt

The mmc write command is used to write a specified number of blocks of data from a location in memory to the mmc device. mmc write addr blk# cnt

The mmc rescan command is used to rescan the bus. mmc rescan

The mmc list command is used to list the devices on the bus. mmc list

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Table 5-1 U-Boot Commands (continued) Command Description

usb The usb start command is used to star the USB controller, initialize all USB devices and build the USB device tree. usb start

The usb reset command is used to reset the USB controller, initialize all USB devices and rebuild the USB device tree. usb reset

The usb stop command is used to disable the USB bus. usb stop

The usb tree command is used to display the USB device tree. usb tree

The usb info command is used to display the available USB devices on the USB bus. usb info [dev]

The usb storage command is used to display detailed information about USB storage devices on the USB bus. usb storage

The usb dev command is used to show or set the current USB device. usb dev [dev]

The usb part command is used to display the partition table of one or all USB storage devices. usb part [dev]

The usb read command is used to read a specified number of data blocks and store that data to a specified memory address. usb read addr blk# cnt

The usb write command is used to write a specified number of blocks of data from a memory location to a USB device. usb write addr blk# cnt

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U-Boot uses the following commands to display and modify the contents of the 4GB effective address space. Note that .b, .w, and .l means the operation unit as byte, word, and long respectively.

md - Memory display md [.b, .w, .l] address [# of objects] mm - Memory modify (auto-incrementing address) mm [.b, .w, .l] address nm - Memory modify (constant address) nm [.b, .w, .l] address cp - This command copies data from one place to another cp [.b, .w, .l] source target count cmp - This command compares two data in different places. cmp [.b, .w, .l] addr1 addr 2 count

NOR Flash Command NOR flash supports following commands. Table 5-2 NOR Flash Command Usage Command Description

protect on start end Protects flash from address start to address end Protects flash from address start to end of section with protect on start +len address start+len-1 protect on all Protects all flash banks

protect off start end Makes flash from address start to address end writable Makes flash from address start to end of section with protect off start +len address start+len-1 writable protect off all Makes all flash banks writable

erase start end Erases flash from address start to address end Erases flash from address start to the end of section with erase start +len address start+len-1 erase all Erases all flash banks

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NAND Flash Command NAND Flash supports following commands. Table 5-3 NAND Flash Command Usage Command Description

nand info Shows available NAND devices

nand device [dev] Shows or sets current device

nand read Addr off| partition size

Addr off| partition size nand write Read/write size bytes starting at offset off to/from memory address addr, skipping bad blocks

nand erase [clean] Erase size bytes from offset off (erases on the entire device if it is not [off size] specified)

nand bad Shows bad blocks

nand dump[.oob] off Dumps page

nand scrub Cleans NAND by erasing bad blocks. Considered unsafe nand markbad off Marks bad block or blocks at offset. Considered unsafe [...]

nand biterr off Makes a bit error at offset, considered unsafe

I2C Utility U-Boot provides the following utilities for I2C bus and devices. Table 5-4 U-Boot I2C Utilities Utility Description

i2c crc32 chip address[.0, .1, .2] Compute CRC32 checksum count

i2c dev [dev] Shows or sets current I2C bus i2c loop chip address[.0, .1, .2] Loops reading of device [# of objects] [# of delay(us)] i2c md chip address[.0, .1, .2] [# Reads from I2C device of objects]

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Table 5-4 U-Boot I2C Utilities (continued) Utility Description

i2c mm chip address[.0, .1, .2] Writes to I2C device (auto-incrementing) i2c mw chip address[.0, .1, .2] Writes to I2C device (fill) value [count]

i2c nm chip address[.0, .1, .2] Writes to I2C device (constant address)

i2c probe Shows devices on the I2C bus i2c read chip address[.0, .1, .2] Reads to memory length memaddress

i2c reset Re-initializes the I2C Controller

i2c speed [speed] Shows or set I2C bus speed

sf Utility U-Boot provides sf utilities to operate SPI flash. Table 5-5 U-Boot sf Utilities Utility Description

sf probe [bus:]cs [hz] [mode] Initializes flash device on given SPI bus and chip select

sf read addr offset len Reads len bytes starting at offset to memory at ‘addr

sf write addr offset len Writes len bytes from memory at addr to flash at offset

sf erase offset len Erases len bytes from offset

Below are usage samples for sf.  sf probe 0 4096 KiB S25FL032A(P) at 0:0 is now current device  sf erase 0 80000  sf read 1000000 0 10000  sf write 1000000 0 10000

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mmc Utility U-Boot provides mmcinfo and mmc utilities to operate the eMMC/SDHC card. mmcinfo must be executed before other mmc commands can be run. Table 5-6 U-Boot mmc Utilities Utility Description

mmcinfo Show information about an mmc device

mmcread addr blk# cnt Read data from mmc device to DDR memory

mmc write addr blk# cnt Write data to mmc device from DDR memory mmc rescan Rescan the mmc interface and initialize the mmc device

mmc list Lists available devices

usb Utility U-Boot provides usb utilities to operate the USB sticks: Table 5-7 U-Boot usb Utilities Utility Description

usb reset Resets or rescans USB controller

usb stop [f] Stops USB [f]= force stop

usb tree Shows USB device tree

usb info [dev] Shows available USB devices

usb storage Shows details of USB storage devices

usb dev [dev] Shows or set current USB storage device

usb part [dev] Prints partition table of one or all USB storage devices

usb read addr blk# cnt Reads cnt blocks starting at block blk# to memory address addr

Writes cnt blocks starting at block blk# from memory address usb write addr blk# cnt addr

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Note that usb start/reset must be executed before the other commands can be run. Below are usage samples of usb start. => usb start (Re)start USB... USB: Register 10011 NbrPorts 1 USB EHCI 1.00 scanning bus for devices... 3 USB Device(s) found scanning bus for storage devices... 1 Storage Device(s) found

rcw Utility U-Boot provides rcw utilities to switch SerDes lanes among the 12 SerDes/RCW options. A checking feature is also supported. Below is a usage sample of the utilities. Usage: rcw - RCW utility commands Table 5-8 U-Boot rcw Utilities Utility Description

rcw Display the RCW with which system boots up.

rcw list List and validate all RCW options available.

rcw set opt# Activate RCW opt# for next boot up. range [1...14]

rcw info opt # Display the info for RCW option opt#. range [1...14]

rcw help Show cmd usage

5.4 Software Build Requirements

5.4.1 Meta-Artesyn Layer Installation NOTE: Install the NXP QorIQ SDK 2.0 and the SDK 2.0-1701 update prior to installing the meta-artesyn layer. To install the meta-artesyn layer, follow the instructions below: a) Download the latest software source code release package: COMX- T2081_GA_SOURCE_TAR.ZIP, from the Customer Resource Center at https://www.smartembedded.com/ec/support/ to a working directory.

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b) Unzip the file and extract the source archive: COMXT2081[_COMXTxxxx]- X.X.X_Source.tar.gz into the working directory. Untar the TAR file. After you untar, you see the following directory in your working directory. The directory contains following contents:  artesyn-setup-env – Build environment setup script.  downloads – Packaged source code.  install – Script that installs the Artesyn layer.  meta-artesyn – Artesyn layer that contains the bitbake recipes. Run install script to automatically install the Artesyn layer along with the source code. After completion of installation, the following content is displayed: meta-artesyn meta-cloud-services meta-freescale-extra meta-fsl-cgl meta-linaro meta-openclovis meta-qt3 meta-selinux poky meta-cgl meta-freescale meta-freescale-internal meta-java meta-nxp-npi-ga meta-openembedded meta-security meta-virtualization …/QorIQ-SDK-V2.0-20160527-yocto/downloads/artesyn

flashrom_0.9.9-source.tar.gz linux-qoriq_4.1-source.tar.gz memprobe_1.0-source.tar.gz rcw_comx-source.tar.gz u-boot- qoriq_comx_2016.09-source.tar.gz

5.4.2 Building U-Boot and Linux images Once the SDK is installed and the meta-artesyn layer is installed, you can create a build environment, which enables you to build images. NOTE: is the NXP QorIQ SDK 2.0 install directory. To create a build environment, perform the following steps: 1. Go to the /QorIQ-SDK-V2.0-20160527-yocto directory using the following command. $ cd /QorIQ-SDK-V2.0-20160527-yocto

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2. Source the artesyn-setup-env script to set up your environment for your particular COM Express platform. $ source artesyn-setup-env -m comxt2081

This script needs to be run once to set up your build environment. For more information, refer to QorIO SDk v2.0 documentation.

3. Once finished you should be in your build directory and it should contain. $ ls conf SOURCE_THIS

SOURCE_THIS script needs to be run once for each terminal, before you begin building source code. $ source SOURCE_THIS

4. Run the following command to build your first image. $ bitbake

Where image is:  comx-image-core: Contains common open source packages, NXP and COM Express specific packages.  comx-image-full: Contains all packages in the full package list.  comx-image-mfgtool: Contains all the user space apps needed to deploy the fsl-image-mfgtool image to a USB stick, hard drive, or other large physical media.  comx-image-minimal: Contains basic packages to boot up a board.

For more information on how to make changes to the source code or add new files to the root file system, refer to QorIQ SDK v2.0-1701 documentation.

The following table shows BitBake useful commands to access different types of information.

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Table 5-9 BitBake Commands Command Description

Perform a complete COMX Project clean. bitbake comx-image- –c comxclean Bitbake runs the cleansstate task on all main packages i.e. rcw, u-boot, etc. name = minimal|mfg|core|full Running this task also removes all root file system images.

bitbake –c Run on the

bitbake Run all task on

bitbake -e | grep ^S= Get the package source code directory bitbake -e | grep Get the value of the recipe folder ^FILE_DIR

bitbake -e | grep ^FILE= Get the value of the recipe file

bitbake -c Execute a particular package's task

bitbake –c listtasks List all tasks used for a complete build

bitbake -c clean Remove work directory

bitbake -c cleansstate Remove work directory and cache files

bitbake-layers show-layers Show all layers

Show all recipes. Show possible images bitbake-layers show-recipes [*-image-*] to bake

Check if certain package is present on bitbake -s | grep current Yocto Setup

bitbake -g && cat pn-depends.dot | grep -v -e '-native' | grep -v digraph Show image's packages | grep -v -e '-image' | awk '{print $1}' | sort | uniq bitbake -g && cat pn- depends.dot | grep -v -e '-native' | grep Show package's dependencies -v digraph | grep -v -e '-image' | awk '{print $1}' | sort | uniq

bitbake -c fetchall Fetch sources for a particular image

bitbake –c patch Fetch sources for a particular package

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5.4.2.1 Built Images Directory A Yocto Project build creates images and those images are available in the /build_/tmp/deploy/images//deliverables/ directory. These images may be used in place of the reference images described in Steps 1 and 5 of Section 5.4.3.1 on page 114. The following are the list of images available in the directory:  core-rootfs-comxt2081_X.X.X.ext4.gz (Gzipped ramdisk image)  core-rootfs-comxt2081_X.X.X.ext4.gz.u-boot (ramdisk image that can be loaded with U-Boot)  core-rootfs-comxt2081_X.X.X.jffs2 (ramdisk image for NAND)  fsl_fman_ucode_t2080_r1.1_106_4_18.bin (microcode binary)  rcw-1533MHz-comxt2081_X.X.X.bin (rcw binary)  u-boot-comxt2081_X.X.X.bin (U-Boot binary image that can be programmed into board Flash)  uImage-comxt2081_X.X.X.bin (Linux Kernel binary image)  uImage-comxt2081_X.X.X.dtb (Device tree binary)

5.4.3 Firmware Upgrade

5.4.3.1 TFTP Server and Environment Set Up

The TFTP server is also necessary for the run ramboot and run nfsboot commands. This downloads the images to RAM and then boots from those images.

To upgrade the firmware and Operating System Software, perform the following steps: 1. If upgrading with custom built images (fromSection 5.4.2.1 on page 114), skip to Step 2. Otherwise, download the latest Reference Binary package for RCWs, FMAN ucode, U-Boot, Linux kernel, and Linux file systems: COMX-T2081_GA.ZIP, from the Customer Resource Center at https://www.smartembedded.com/ec/support/. 2. Attach serial terminal to $consoledev port on carrier. 3. Attach the board to the network using a network cable to a 10/100/1000Base-T Ethernet port on the carrier (U-Boot searches for a link starting with $ethact). 4. Set up a TFTP server in this network with the root directory /tftpboot/ and then create a subdirectory /, cpu=t2081 in /tftpboot/.

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5. If installing custom images, copy these from the built images directory (from Section 5.4.2.1 on page 114) into the directory /tftpboot/, cpu = t2081 on this server. Otherwise, extract the reference binary archive: COMXT2081_BSP_GA- X.X.X.zip, from the downloaded package into the tftpboot/ folder, and then extract its contents. The following table shows the packaged binaries.

Package Name Description

rcw-<1cpu-clk>-<2machine>_x.x.x.bin RCW Binary Image fsl_fman_ucode_<3cpu>_r1.1_106_4_18.bin Frame Manager Microcode (NXP) u-boot-_x.x.x.bin U-boot binary uImage-_x.x.x.bin Linux Kernel binary uImage-_x.x.x.dtb Device tree blob core-rootfs-_x.x.x.ext4.gz.u- Root file system for TFTP boot boot and NOR boot core-rootfs-_x.x.x.ext4.gz Compressed root file system for eMMC boot and NFS boot

core-rootfs-_x.x.x.jffs2 Root file system for NAND boot

1. CPU clock frequency.

2. machine = comxt2081

3. cpu = t2081

6. Execute the following commands in the /tftpboot/, cpu = t2081 directory (assumes a Linux TFTP server; on Windows this should be a copy.): ln –s rcw--_x.x.x.bin rcw-.bin ln –s u-boot-_x.x.x.bin u-boot-.bin ln –s uImage-_x.x.x.bin uImage-.bin ln –s uImage-_x.x.x.dtb uImage-.dtb ln –s core-rootfs-_x.x.x.ext4.gz.u-boot ramdisk- .uboot ln –s fsl_fman_ucode__r1.1_106_4_18.bin fm-ucode- .bin ln –s core-rootfs-_x.x.x.jffs2 rootfs-.jffs2

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7. Run the following commands at the U-Boot command line. Set up the network environment variables setenv ipaddr XXX.XXX.XXX.XXX setenv netmask XXX.XXX.XXX.XXX setenv serverip XXX.XXX.XXX.XXX saveenv

This saves your changes to NOR flash.

The above commands assume ipaddr and serverip are on the same subnet, if these two machines are on different subnets the gateway environment variable needs to be set appropriately.

5.4.3.2 Upgrade NOR COMX-T2081 board offers boot redundancy by having two boot banks A and B. Boot Bank A is the default boot bank and Boot Bank B is the Golden bank containing a stable working version of the BSP and (optionally) root file system. Assuming the current boot bank is A then the following sequence of commands will upgrade the NOR flash with the required binaries at the correct addresses. Run these commands at the U-boot command line: run updrcw run upduboot run upducode run updkernel run upddtb run updnorfs reset Upgrading Boot Bank B requires some additional commands, because it is always write protected. To upgrade Boot Bank B: 1. Check the Next boot bank. => bootbank Boot Bank: Control :: Hardware POR :: NOR FLASH A

Current :: NOR FLASH A Next :: NOR FLASH A

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2. If Boot Bank: Control :: Software then skip this step. => bootbank ctl sw Boot Bank Control :: Software 3. Switch boot banks (if necessary). => bootbank sw Boot Bank: Current :: NOR FLASH A Next :: NOR FLASH B This bank will be the upgrade target 4. Disable write protect. => bootbank wp disable 5. Run the series of commands to upgrade NOR bank B. run updrcw run upduboot run upducode run updkernel run upddtb run updnorfs reset 6. Enable write protect. => bootbank wp enable 7. Reset => reset 8. Verify Boot Bank B and allow Linux to boot to prompt. Boot Bank: NOR FLASH B 9. Return to U-Boot and switch boot banks. => bootbank sw Boot Bank: Current :: NOR FLASH B Next :: NOR FLASH A 10. Reset board.

5.4.3.3 Upgrade NAND The NAND flash is partitioned into mtd partitions and does not require any extra configuration. The rootfile system used for NAND is jffs2 filesystem. Run the following U-Boot script to upgrade NAND. => run updnand

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To boot from NAND, use the command run nandboot (default bootcmd )

If there is a Kernel Panic when booting from NAND, erase the entire NAND flash and install the file system again.This is caused by one of the NAND clean markers being corrupted.

5.5 U-Boot Environment Variables

5.5.1 Network Variables The following table lists example network u-boot environment variable configuration to establish a network connection. By default, the factory sets up to nine (9) MAC addresses in the ID EEPROM and u-boot establishes corresponding ethXaddr variables automatically. However, the ipaddr, netmask, serverip and gatewayip environment variables are not set by default. Table 5-10 Network Variable Examples Network Variables

setenv ipaddr 192.168.0.91

setenv netmask 255.255.255.0

setenv gatewayip 192.168.0.1

setenv serverip 192.168.0.100

5.5.2 Filename Variables for BSP Components The following table contains filenames of variables for BSP components. Table 5-11 BSP Components - Filenames of Variables Variable Name Filename

fdtfile 1/uImage-<2module_name>.dtb fsmmcfile /rootfs-.ext4 fsnandfile /rootfs-.jffs2 kernelfile /uImage-.bin ramdiskfile /ramdisk-.uboot

118 COMX-T2081 Installation and Use (6806800U66C) Software and Firmware

Table 5-11 BSP Components - Filenames of Variables (continued) Variable Name Filename

rcwfile /rcw-.bin uboot /u-boot-.bin ucodefile /fmucode-.bin

1. cpu_name = t2081

2. module_name = comxt2081

5.5.3 Address Variables for Software Components on NOR Flash The following table contains addresses of variables for software components on NOR flash. Table 5-12 Software Components on NOR Flash - Addresses of Variables Variable Name Address

dtbaddr 0xefd00000 fmaddr 0xe8200000 fsnandaddr 0x01000000 fsnoraddr 0xe9000000 kerneladdr 0xee000000 rcwaddr 0xe8000000 ubootaddr 0xeff00000

5.5.4 Address Variables for the Boot Components in RAM The following table contains addresses of variables for BSP components in RAM. Table 5-13 BSP Components in RAM - Addresses of Variables Variable Name Address

fdtaddr 1c00000 loadaddr 2000000 ramdiskadd 8000000

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5.5.5 Device Variables Common device environment variables in U-Boot include the following: consoledev 0 - ttys0 1 - ttyS1 2 - ttyS2 3 - ttyS3 ethact and netdev The following table contains device variables information. Table 5-14 Device Variables Device Variables

setenv ethact FMI@DTSEC3 setenv netdev eth0 setenv consoledev ttyS0 setenv baudrate 115200

5.5.6 HWCONFIG Variable The following table contains hardware configuration variable information. Table 5-15 HWConfig Variable HW Config Variable Details

hwconfig fsl_ddr:ctlr_intlv=cacheline,bank_intlv=auto;usb1:d r_mode=host,phy_type=utmi;usb2:dr_mode=host,phy_typ e=utmi;fsl_fm1_xaui_phy:xfi

120 COMX-T2081 Installation and Use (6806800U66C) Software and Firmware

5.5.7 Bootargs Variables The following table contains Bootargs variables information. Table 5-16 Bootargs Variables Variable Name Details

root root =/dev/ram for ramboot and norboot; root =/dev/mtdblock6 rw for nandboot; root =/dev/nfs for nfsboot; rootfstype rootfstype = jffs2 is needed for nandboot console Default is ‘console =$consoledev,$baudrate

5.5.8 Bootup Variables The following table contains Bootup variables information. See Section 5.11 on page 127 for usage. Table 5-17 Bootup Variables Variable Name Details

ramboot setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $kernelfile;tftp $fdtaddr $fdtfile;tftp $ramdiskaddr $ramdiskfile;bootm $loadaddr $ramdiskaddr $fdtaddr norboot setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;bootm $kerneladdr $fsnoraddr $dtbaddr nandboot setenv bootargs root=/dev/mtdblock6 rw console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;bootm $kerneladdr - $dtbaddr nfsboot setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$net dev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $kernelfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr

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5.5.9 Update Variables The following table contains update variables information.See section 5.4.3 for usage. Table 5-18 Update Variables Variable Name Details

updflash tftp $loadaddr $file; protect off $addr +$filesize; erase $addr +$filesize; cp.b $loadaddr $addr $filesize; protect on $addr +$filesize; cmp.b $loadaddr $addr $filesize upddtb setenv addr $dtbaddr; setenv file $fdtfile; run updflash updkernel setenv addr $kerneladdr; setenv file $kernelfile; run updflash updnorfs setenv addr $fsnoraddr; setenv file $ramdiskfile; run updflash updrcw setenv addr $rcwaddr; setenv file $rcwfile; cpld write 1c 0080; run updflash; upducode setenv addr $fmaddr; setenv file $fmfile; run updflash; setenv addr $qeaddr; setenv file $qefile; run updflash upduboot setenv addr $ubootaddr; setenv file $uboot; run updflash updnand tftp $loadaddr $fsnandfile; nand erase.spread clean $fsnandaddr $filesize; nand write $loadaddr $fsnandaddr $filesize; nand read 41000000 $fsnandaddr $filesize; cmp.b $loadaddr 41000000 $filesize updlinux run upddtb; run updkernel; run updnorfs updrelease run updnor; run updlinux; run updnand updnor run updrcw; run upducode; run upduboot

5.6 Checking Firmware Versions FMAN uCode Version is found in the U-Boot boot-up message. Fman1: Uploading microcode version 106.4.18

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RAMDISK rootfs version Boot up with ramboot (run ramboot in U-Boot) or norboot (run norboot in U-Boot). In Linux, run cat /etc/.version root@:~# cat /etc/.version QorIQ SDK (FSL Reference Distro) 2.0: -fsl-qoriq x.x.x -- powerpc64

Where module = comxt2081 Kernel version The version is viewed in the loading kernel message: ## Booting kernel from Legacy Image at xxxxxxxx ... Image Name: Linux-4.1.35-rt41-x.x.x Created: UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Run iminfo $norbootaddr in U-Boot. => iminfo $kerneladdr ## Checking Image at ee000000 ... Legacy image found Image Name: Linux-4.1.35-rt41-1.4.0 Created: 2017-09-25 16:20:01 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 6689623 Bytes = 6.4 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK In the kernel boot-up message: Linux version 4.1.35-rt41-x.x.x (gcc version 4.9.2 (GCC) ) #1 SMP Mon Sep 25 09:19:50 MST 2017 U-Boot Version Run the version command after the first line of the U-Boot boot-up message. => version U-Boot 2016.09 - x.x.x ( Oct 25 2017 - 13:38:01 ) powerpc-fslmllib32-linux-gcc (GCC) 4.9.2 GNU ld (GNU Binutils) 2.25

COMX-T2081 Installation and Use (6806800U66C) 123 Software and Firmware Software and Firmware

5.7 Address Space U-Boot and Linux works in 36-bit physical addressing mode. The relationship between effective address and physical address is displayed in the memory map Table 5-19. The following are mapped in to the first 4GB address space of the 64GB, which is the 36- bit physical address space. The 4GB space is named as the effective address space and is accessed by U-Boot. Linux applications must access these regions using the 36-bit Physical Address (for example with mmap(),ormemprobe).  DDR3 SDRAM  PCIe 1/2/3/4 MEM  PCIe 1/2/3/4 IO  IFC NOR FLASH  DCSR  BMAN MEM  QMAN MEM  NAND FLASH Buffer  CCSR  BOOT PAGE  CPLD Table 5-19 Address Space Effective Address1 Physical Address2 SIZE Description

FFDF 0000 FFDF 0FFF F FFDF 0000 F FFDF 0FFF 4KB IFC - CPLD

FF80 0000 FF80 FFFF F FF80 0000 F FF80 FFFF 64KB IFC - NAND FLASH

FE00 0000 FEFF FFFF F FE00 0000 F FEFF FFFF 16MB CCSR

F803 0000 F803 FFFF F F803 0000 F F803 FFFF 64KB PCIe 4 I/O

F802 0000 F802 FFFF F F802 0000 F F802 FFFF 64KB PCIe 3 I/O

F801 0000 F801 FFFF F F801 0000 F F801 FFFF 64KB PCIe 2 I/O

F800 0000 F800 FFFF F F800 0000 F F800 FFFF 64KB PCIe 1 I/O

F600 0000 F7FF FFFF F F600 0000 F F7FF FFFF 32MB QMAN memory

F400 0000 F5FF FFFF F F400 0000 F F5FF FFFF 32MB BMAN memory

F000 0000 F03F FFFF F 0000 0000 F F03F FFFF 4MB DCSR

124 COMX-T2081 Installation and Use (6806800U66C) Software and Firmware

Table 5-19 Address Space (continued) Effective Address1 Physical Address2 SIZE Description

IFC - NOR FLASH - E800 0000 EFFF FFFF F E800 0000 F EFFF FFFF 128MB CS03

IFC - NOR FLASH - E000 0000 E7FF FFFF F E000 0000 F E7FF FFFF 128MB CS1

B000 0000 BFFF FFFF C 3000 0000 C 3FFF FFFF 256MB PCIe 4 memory

A000 0000 AFFF FFFF C 2000 0000 C 2FFF FFFF 256MB PCIe 3 memory

9000 0000 9FFF FFFF C 1000 0000 C 1FFF FFFF 256MB PCIe 2 memory

8000 0000 8FFF FFFF C 0000 0000 C 0FFF FFFF 256MB PCIe 1 memory

0000 0000 7FFF FFFF 0 0000 0000 0 7FFF FFFF 2GB DDR34

1. 32-bit addressing

2. 36-bit addressing

3. default boot window

4. a maximum of 2GB memory is mapped in the U-Boot. Anything more than 2GB is unmapped and not used.

5.8 DDR3 SDRAM The COMX-T2081 module has one (1) fully programmable DDR3 SDRAM controller. A maximum of 2GB SDRAM is mapped in U-Boot. If more than 2GB SDRAM is fitted, the remaining sections are left unmapped. With Linux, up to 8GB SDRAM can be verified. Do not modify the contents of the lowest 1MB and the top 1MB RAM in the U-Boot. Both areas are used to store critical data by U-Boot. When the U-Boot detects the DDR3 SDRAM during boot up, the following message appears:

DRAM: Initializing....using SPD 6 GiB left unmapped 8 GiB (DDR3, 64-bit, CL=13d, ECC on) DDR Chip-Select Interleaving Mode: CS0+CS1

COMX-T2081 Installation and Use (6806800U66C) 125 Software and Firmware Software and Firmware

5.9 Reset Configuration Word The COMX-T2081 module has one SerDes banks, including a total of 8 lanes. For more information on the SerDes, see Section 4.7, SerDes Block on page 74. This includes the SerDes lane distribution and options when it is routed to the COM Express connectors. The steps below are used to activate specific SerDes/RCW options. 1. Run rcw set to activate the SerDes/RCW option# 2. Reset -- does not need a POR sequence 3. On COMX-T2081 RCW options #2 - 0x6E, #12 - 0x6C, and #13 - 0x70 requires a change in the SerDes clock PLL1 which is done automatically done at boot-up

When switching from an RCW option that requires a 156.25MHz clock to a RCW that requires a 125MHz clock the system needs an extra reset, because the PLL is not able to lock properly. The reset is automatic and once complete the system comes up normally.

4. Power up the board. Using option 1 from the COMX-T2081 table, rcw shows the following message: COMXT2081=> rcw Using SERDES1 Protocol: 0xAA Clock Configuration: PLL1: 125.00MHz PLL2: Disabled Ethernet Configuration: RGMII1: FM1@DTSEC3 RGMII2: FM1@DTSEC4 SERDES Configuration: PCIe: Lanes 0:3 (x4) Lanes 4:7 (x4) SGMII: Disabled XFI: Disabled Reset Configuration Word (RCW) binary: 0000: 12 07 00 17 13 00 00 00 00 00 00 00 00 00 00 00 0010: aa 02 00 02 c0 30 00 00 fc 02 70 00 c1 00 00 00 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 03 83 fc 0030: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 04

126 COMX-T2081 Installation and Use (6806800U66C) Software and Firmware

5.10 Built Images Directory A Yocto Project build creates images and those image are available in the /build_/tmp/deploy/images//deliverables/ directory. The following are the list of images available in the directory:  core-rootfs-comxt2081_X.X.X.ext4.gz (Gzipped ramdisk image)  core-rootfs-comxt2081_X.X.X.ext4.gz.u-boot (ramdisk image that can be loaded with U-Boot)  core-rootfs-comxt2081_X.X.X.jffs2 (ramdisk image for NAND)  fsl_fman_ucode_t2080_r1.1_106_4_18.bin (microcode binary)  rcw-1533MHz-comxt2081_X.X.X.bin (rcw binary)  u-boot-comxt2081_X.X.X.bin (U-Boot binary image that can be programmed into board flash)  uImage-comxt2081_X.X.X.bin (Linux Kernel binary image)  uImage-comxt2081_X.X.X.dtb (Device tree binary)

5.11 Boot COMX-T2081 provides the following boot methods:  RAMboot  NORboot  NANDboot  NFSboot These are each defined by a U-Boot variable that is passed as the argument to the run command to boot the module: run The default boot method is defined by the bootcmd variable. This can be changed by: setenv bootcmd run The default value for bootcmd is run nandboot.

5.11.1 RAMboot The COMX-T2081 has a U-Boot variable called ramboot.

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setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $hwbootargs $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr ramboot first loads RAMDISK, Linux kernel, and DTB into RAM through network by TFTP then boot.

5.11.2 NORboot The COMX-T2081 has a U-Boot variable called norboot norboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;bootm $kerneladdr $fsnoraddr $dtbaddr norboot loads RAMDISK, Linux kernel and DTB from NOR Flash into RAM then boot. NOTICE

As shipped, there is no RAMDISK pre-programmed in NOR Flash. run updnorfs must be invoked before using norboot, see Section 5.4 on page 110.

5.11.3 NANDboot The COMX-T2081 has a U-Boot variable called nandboot. nandboot=setenv bootargs root=/dev/mtdblock6 rw console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;bootm $kerneladdr - $dtbaddr The nandboot loads Linux kernel and DTB from NOR flash into RAM and then boot. JFFS2 then mounts the file system on NAND flash as a persistent rootfs.

5.11.4 NFSboot The COMX-T2081 has a U-Boot variable called nfsboot. nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $kernelfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr nfsboot first loads Linux kernel and DTB into RAM through network by TFTP then boot.

128 COMX-T2081 Installation and Use (6806800U66C) Appendix A

Related Documentation

A.1 SMART Embedded Computing Documentation The documentation listed is referenced in this manual. Technical documentation can be found by using the Documentation Search at https://www.smartembedded.com/ec/support/ or you can obtain electronic copies of SMART EC documentation by contacting your local sales representative. Table A-1 SMART EC Documentation Document Title Publication Number

COMX-T2081 Data Sheet COMX-T2081-DS

COMX-T2081 Quick Start Guide 6806800U96

COMX-T2081 Safety Notes Summary 6806800U95

N/A (contact CRC via COMX-T2081 Hardware Release Notes and Errata https://www.smartembedded. com/ec/support/)

N/A (contact CRC via Software Release Notes (COMX-Txxxx GA0x Linux BSP) https://www.smartembedded. com/ec/support/)

COMX-CAR-P1 Quick Start Guide 6806800L79

COMX-CAR-P1 Installation and Use 6806800L78

COMX-T2081 Installation and Ue (6806800U66C) 129 Related Documentation

130 COMX-T2081 Installation and Ue (6806800U66C) 1 © 2019 SMART Embedded Computing™, Inc. All Rights Reserved. The stylized “S” and “SMART” is a registered trademark of SMART Modular Technologies, Inc. and “SMART Embedded Computing” and the SMART Embedded Computing logo are trademarks of SMART Modular Technologies, Inc. All other names and logos referred to are trade names, trademarks, or registered trademarks of their respective owners.