usage. Wafer cost depends on wafer shaping, especially wafer thickness that increases for the larger diameter. 450 mm Silicon: These are inevitable factors that push up wafer cost/area. Historically, silicon suppliers have An Opportunity and Wafer Scaling developed new growth technologies to meet industry demand and to maintain competitiveness. However, by Masaharu Watanabe and Scott Kramer the 450 mm case will be different. The expected R&D cost to develop a 450 mm wafer pilot production fab will be so large that some silicon oday, we take our favorite music challenging as complexity increases, suppliers will hesitate to start 450 mm and movies anywhere. It is business models diverge, technology R&D. Recent poly silicon shortage Ta result of the never-ending advances, and economic and market by strong solar cell demand and reduction in bit cost brought about dynamics come into play. For the the resulting increase in price9 will by the accelerating development of next wafer size transition, it will be certainly push up the R&D cost. semiconductor devices and their particularly important for the factory Cooperation among industry and production technology. The well- architecture to be adaptable across all research institutes, or any kind of known Moore’s law is a core of the business models in IC manufacturing: joint work in the pre-competitive International Technology Roadmap DRAM, high volume microprocessors, area, will help to reduce the industry’s of Semiconductors (ITRS)1 that foundry, and very high mix logic. R&D cost. Some discussions are serves as a technology target for the Based on historical production already occurring in the industry.6 semiconductor industry. An increase wafer development cycles, research in silicon wafer size is embedded in and collaboration must start early Technical Opportunities it for more efficient and economical enough for the industry to achieve production of devices. Silicon as consensus on a wafer strategy to 450 mm crystal growth.—450 mm a key material2 of the electronics ensure availability of supply when crystals are estimated to be so big (215 industry undergoes progress in needed. Industry dialogue, data cm) and heavy (800 kg) that their defect engineering and production collection, and analysis of timing, growth will have many challenging technology. The ITRS indicates that risk, and time to ROI, as well as issues,3 as shown in Fig. 1. The SSi the next generation wafer size, of technical challenges and initial wafer, project was pioneering work, making 450 mm, will be in production in have been initiated. This dialog will the issues clear and showing the 2012. In the 450 mm era, silicon provide the information needed to feasibility of a 400 mm crystal.5 wafer suppliers will grow a larger continuously evaluate and adjust Learning involves a so-called Dash and consequently heavier single plans across the industry. In addition, neck growth that will be discussed crystal ingot than ever before, 215 cm economic analysis and factory in detail in the following section. long and weighing 800 kg.3 At the simulation are even more important. The other is the design of a crystal beginning of the 300 mm era, there Fortunately, in the years since the 300 puller and growth process. Practical were intense discussions4 related to mm transition, modeling software simulation is inevitable to develop inexperienced 300 mm crystal and has increased dramatically in terms of 450 mm crystal technology since wafer technology. These discussions function and speed. That software has experimental works are quite limited also provided useful information the capability to model very complex due to a weeklong growth cycle and beyond the 300 mm technology. interactions in a short period of time. high cost. Sophisticated experimental Super Silicon Crystal Research design, based on intensive simulation, Initiative Corp. (SSi) pioneered Economics of 450 mm Wafers will be extremely useful and is the growth of a 400 mm crystal.5 really key for the 450 mm R&D. For How the 450 mm crystal will come The economic situation is the point defects, such as vacancies and to production, and whether it is most important concern in the interstitials, their control is a most economically feasible, is now a hot semiconductor industry. Moore’s law, competitive part of crystal growth topic in the silicon industry.6,7 The in the form of “more function by technology. The expected narrowing first 450 mm wafer was displayed same cost,” drives our technology. of choice of growth conditions10 to at SEMICON West in 2006, which One scenario to reduce bit cost, balance vacancies and interstitials in sparked industrial interest. This by employing the next generation the 450 mm crystal growth will be article presents a brief description of large diameter wafer, is that wafer overcome by the improved thermal emerging 450 mm wafer technology and device production equipment design crystal puller.11 Published data issues. prices do not increase as wafer of SSi’s 400 mm crystal12 show that In the last 300 mm transition, the area increases; and production both vacancy rich and interstitial rich industry, for the first time, held global throughput does not significantly crystals could be grown by a choice discussions to synchronize efforts to decrease while keeping the same of growth rate. This encourages 450 reduce cost and facilitate a smooth device yield. It worked well in the 300 mm crystal engineers to optimize hot transition. For the coming 450 mm mm transition; but when and what zone (crucible, heater, heat shield, transition, more collaboration and device production will be converted etc.) design and growth rate. deep discussion on the transition from 300 mm to 450 mm, and the Neck issues.—All silicon crystals for scenario will be indispensable. investment needed, are not yet clear. LSI are dislocation-free, that is, the The production of 450 mm wafers whole of the grown crystal ingot of a Lessons Learned from 300 mm is economics driven and fab cost is few 100 kg weight is completely free the largest economic factor. Single of dislocations. At the beginning, the The 300 mm transition clearly crystal cost depends on crystal Dash neck, which is a few millimeter exposed the need for industry growth conditions such as the slower in diameter thin single crystal, is collaboration in all aspects of a growth rate of a 450 mm crystal, grown to eliminate dislocations. The transition to the next wafer size. Each compared to current 300 mm crystal whole of the crystal is sustained by wafer size transition becomes more growth, and lower poly silicon the Dash neck, no matter how large

28 The Electrochemical Society Interface • Winter 2006 impose intense work for the production of 450 mm wafers. Wafer shape near the edge, especially flatness, will be a key issue.

Scaling

Along with Moore’s law, many scaling factors are compiled in ITRS. The current wafer diameter trend is 450 mm production for 2012 and beyond. A wafer property that is particular to the wafer diameter is the wafer thickness. Thickness and others factors related to 450 mm are considered here from the scaling point of view.6

Crystal Growth Scaling

Major silicon suppliers participated in the SSi project, which pointed out issues associated with a large crystal growth. Based on their experience, thermal and mechanical design of a Fig. 1. 450 mm silicon single crystal growth issue. Poly silicon (1000 kg) is melted in quartz crystal puller can be scaled up from crucible and a Dash neck of several mm is grown to start dislocation-free crystal growth. Growth the current 300 mm puller to a 450 of a more than 900 kg crystal will take 3-5 days. A new mechanism is required to sustain such a heavy crystal. About 800 kg can be used for wafer production. mm puller, using the latest simulator running on a powerful computer. Many things still need to be solved to and heavy the ingot finally comes. of 3 mm neck is not enough even start real production. SSi grew a 400 Dash neck strength is roughly 144 for the current 300 mm crystals. An mm crystal at the rate of 0.45 and 0.25 kg/3 mm-diameter-neck.13 In the 450 alternative to the two-step growth mm/min.12 A 450 mm crystal will take mm case, and even the 400 mm case is a thick Dash neck. Industry grows 5 to 8 days to grow, including poly of SSi, the neck is not expected to be current dislocation-free crystals with silicon melting, growing the crystal, able to sustain a heavy crystal. Thus, a thicker neck. Developing a thicker cooling, and preparing the puller for some breakthrough was required. (~9 mm) neck is, though it is not easy, the next growth. SSi developed a two-step growth a possible alternative solution for the technique.12 A Dash neck was first 450 mm crystal. Wafer Thickness Scaling grown to eliminate dislocations. Then 450 mm wafer shaping.—Wafer a second suspending cone was grown shaping is an extension of the current Wafer thickness should be to support the heavy crystal weight technology. Wafer specification, considered carefully. Once it is by the other mechanics. A special like flatness, links to lithography decided, it is difficult to change tool, called a clamp or tray, held the technology and becomes tighter and afterwards. Many device production cone and sustained the weight of the tighter. So, both large diameter and technologies and much equipment crystal body afterward. The strength tight control, as shown in Fig. 2, are wafer thickness dependent and a change of wafer thickness has a major impact. Thickness factors to be taken into consideration include: empirical extrapolation without clear reason; slip generation due to thermal stress; sag due to wafer weight and any elastic deformation due to film stress; and wafer breakage due to wafer handling, thermal stress, and others. Empirical scaling.—Historically, wafer thickness has been increased by some factor as the wafer diameter steps up to the next diameter, because thin large wafers may be fragile and hard to handle. As shown in Fig. 3, extrapolation of the rather recent 125 mm, 200 mm, and 300 mm diameters trend to 450 mm indicates that 450 mm wafer thickness would be about 825 µm. Third order polynomial curve fitting to semilog plot of diameter trends indicate that the 450 mm wafer thickness would be about 800 µm. This is a simple empirical extension of the historical diameter Fig. 2. 450 mm polished wafer issue. The issue of the 450 mm wafer is its thickness. When the trend and 25 µm to 50 µm thicker wafer is supported at its periphery, sag due to weight is large. Wafer flatness near the edge is a difficult challenge. Edge shape and damage should be considered carefully to avoid wafer breakage. (continued on next page)

The Electrochemical Society Interface • Winter 2006 29 than current 775 µm thick 300 mm wafer. SSi estimated 825 µm for 400 mm and 875 µm for 450 mm.5 Scaling based on thermal stress.— Thermal stress can be, in general, thickness sensitive in two aspects. One is a slip generation by plastic deformation due to shear stress at high temperature processes. The other is wafer breakage caused by the tensile stress, also at high temperature processes. A flash lamp annealing (FLA) process to activate ion implanted impurities is the most high temperature single wafer process that is 1200°C or higher for a few mseconds in current 300 mm processes and is expected to be the most severe process in the 450 mm era. Stress analysis shows that shear stress in 450 mm wafers due to the FLA has almost no wafer thickness dependence. Tensile stress is also almost thickness independent, about 10% larger than 300 mm Fig. 3. Wafer thickness scaling. Thickness trend of SEMI wafer specification is plotted in semilog wafer. Thermal stress at vertical scale. Linear and 3rd order polynomial fits are shown. Extrapolating this empirical scaling to 450 diffusion furnace processes such as mm, thickness is 800 µm to 825 µm. First proposal is 825 µm, that is 775 µm and oxidation will be more sensitive to additional 50 µm for reclaim. wafer diameters because the wafers are stacked with critical spacing. Scaling based on wafer strength.— Summary However, the thermal stress difference Thinner wafers are often supposed is less than 5%. So, the thermal stress to be more fragile. Wafer breakage is In the ITRS, device production issue of both single and batch wafer complicated and probability is very low. using 450 mm wafers is projected to processes does not depend so much Scaling of wafer thickness based on start in 2012. The SSi project showed on wafer diameter or thickness and the breakage is important but model is the feasibility of 400 mm wafer will not be a crucial scaling factor. hardly available. Bare wafer breakage is technology. Discussions on 450 mm Scaling based on sag.—Sag is due to reported occasionally.14-16 Some wafers issues have been ongoing in the last wafer weight and also due to strain break during VLSI fabrication processes few years. Crystal growth of 450 mm caused intentionally or by films on influenced by oxygen precipitates.17 The is technically possible although many the surface. Sag is an important factor edge polish process introduces some issues must be solved to prepare for in wafer handling. Gravity sag, that damage.18 If it causes wafer breakage, the real production. Empirical extension is, sag by wafer weight, is a classical 1.5 times longer edge of a 450 mm wafer of wafer thickness trend to 450 mm plate bending. Sag (δ) of circular plate compared to a 300 mm wafer will result indicates 800 µm to 825 µm. Wafer support at the wafer periphery is in more chance of breakage, according thickness has been discussed here proportional to to Weibull statistics. A wafer vibrates from various scaling perspectives during handling.19 If the breakage but none is crucial so far. The first δ = kR4/D is caused by wafer handling or any proposal is 825 µm that is 775 µm D = Et3/12(1−ν) process touching wafer, it will depend (current 300 mm wafer thickness plus on the wafer thickness, wafer weight, 50 µm for reclaim). The economics where R is wafer radius, E is Young’s back surface and edge area, and edge of 450 mm wafer production is the modulus, ν is Poisson ratio, t is shape. Again, no model based on solid most important issue currently under thickness, scaling factor is R4/t3. Sag of mechanics or statistics is available. A discussion and when and how the 450 775 µm thick 450 mm wafer supported different approach to the fracture issue mm era actually comes is not yet clear. by 4 points at wafer periphery is 687 is the increase of the fracture strength The lessons learned from the 300 mm µm. If sag needs to be the same as by nitrogen doped Czochralski crystal.20 wafer technology will help immensely 300 mm, that is 136 µm, the 450 mm in the coming 450 mm transition. n wafer should be 1744 µm thick. A Mechanical Wafers wafer of this thickness is heavy and References will definitely be expensive. It is not a In the ITRS,1 wafer standards practical choice. need to be discussed first because 1. International Technology Roadmap for Sag due to film on the wafer surface is wafer geometry, especially thickness, Semiconductors 2005 edition; http:// influences equipment design. www.itrs.net/. 2 2 2. H. R. Huff, Electrochem. Soc. Interface, δ = 6R (1−ν)σ/(Et ) Wafers that are used for equipment 14(1), 23 (2005). development are called mechanical 3. 450 mm position paper reported in ITRS where σ is film stress and the scaling wafers. If reclaim of wafers by 2005 edition. factor is R2/t2. So, if the film stress is repolishing of surface layer is 4. Panel Discussion: “The 300 mm same, the sag of a 775 µm thick 450 considered, another 50 µm needs to be Technology−Global Opportunity for mm wafer is 2.25 times 300 mm wafer. added to thickness as a buffer. Then, Industry and Challenges for Research,” If the above sag is acceptable by proper 825 µm (the current 300 mm thickness Microelectronic Eng., 45, 85 (1999). design of wafer handling system and plus 50 µm) is a first assumption of 5. K. Takada, H. Yamagishi, and M. Imai, in Semiconductor Silicon/1998, H. R. Huff, process conditions, a 450 mm wafer of 450 mm wafer thickness. Other wafer H. Tsuya, and U. Gösele, Editors. The the same thickness as a 300 mm wafer geometry properties like notch, edge Electrochemical Society Proceedings can be used. shape, and surface finish are the same Series, PV 98-1, p. 376, Pennington, NJ as a 300 mm wafer. (1998).

30 The Electrochemical Society Interface • Winter 2006 6. M. Watanabe, T. Fukuda, A. Ogura, Y. Kirino, and M. Kohno, ECS Transactions, 2(2), 155 (2006). About the Authors 7. J. Draina, D. Fandel, J. Ferrell, and S. Kramer, ECS Transactions, 2(2), 135 Scott Kramer is the director of Masaharu Watanabe joined Toshiba in (2006). International SEMATECH Manufacturing 1964 and worked mainly in silicon crystal 8. G. D. Hutcheson, ECS Transactions, 2(2), Initiative (ISMI), a subsidiary of growth and defect engineering technology 3 (2006). SEMATECH. In this position, he at its R&D Center, meanwhile he was at 9. Electronics Parts Research No. 343, Oct. oversees the Equipment Productivity, MIT Materials Science and was at Toshiba 2005. Fab Productivity, 300mmPrime/450mm, Ceramics. He received his PhD in physics 10. W. von Ammon, E. Dorngerger P. O. Metrology, and Environment, Safety from Tokyo Institute of Technology. After Hansson, J. Crystal Growth, 198/199, and Health (ESH) programs. Together, retiring from Toshiba, he joined Komatsu 390 (1999). these programs form the manufacturing Electronic Metals until retiring again in 11. M. Kraise, J. Friedrich, and G. Muller, productivity improvement efforts at ISMI. 2000. Currently, he is a technical adviser of Mat. Sci. Semicond. Process., 5, 361 Mr. Kramer joined SEMATECH in NuFlare Technology, part of the Toshiba/ (2003). 1994 as Fab Manager of the Advanced Toshiba Machine group, and also an adviser 12. Y. Shiraishi, K. Takano, J. Matsubara, Technology Development Facility (ATDF). to other companies to extend his interest T. Iida, N. Takase, N. Machida, M. He previously served as Program Manager in silicon technology. He received the Kuramoto, and H. Yamagishi, J. Crystal of Equipment Productivity at SEMATECH Okochi Memorial Award and the SEMI Growth, 229, 17 (2001). where he was responsible for installed base Karel Urbanek Memorial Award. He may 13. K. M. Kim and P. Smetana, J. Crystal equipment improvements in reliability and be reached at watanabe.masaharu@nuflare. Growth, 100, 527 (1990). 14. J. C. McLaughlin and A. F. W. productivity. Mr. Kramer had been the co.jp. Willoughby, J. Crystal Growth, 85, 83 director of the Manufacturing Methods & (1987). Productivity division of SEMATECH since 15. T.Ono, W.Sugiura, T. Kihara, and M. 1999. Horai, ECS Transactions, 2(2), 109 Prior to joining SEMATECH, Mr. (2006). Kramer held engineering and management 16. R. F. Cook, J. Mater. Sci., 41, 841 (2006). positions at IBM Microelectronics, Lam 17. A. Yogishita, O. Fujii, M. Numano, N. Research Corporation, and Progressive Kawamura, M. Iwase, Y. Ushiku, and T. System Technologies, Inc. He may be Arikado, J. Electrochem. Soc., 145, 3160 reached at [email protected] (1998). 18. V. Riva, SEMI STEP: Edge Profile, SEMICONWest 2006. 19. E. R. Marsh, B. J. Maher, and C. L. White, J. Sound and Vibration, 210, 231 (1998). 20. G. Wang, D. Yang, D. Li, Q. Shui, J.Yang, and D. Que, Physica B, 308-310, 450 (2001).

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