cf~ Paper International Journal of Electrical Machining, No. 8, January 2003 A New Slicing Method of Monocrystalline Silicon Ingot by Wire EDM Akira OKADA *, Yoshiyuki UNO *, Yasuhiro OKAMOTO*, Hisashi ITOH* and Tameyoshi HlRANO** (Received May 28, 2002) * Department of Mechanical Engineering, Okayama University, Okayama 700-8530, Japan ** Toyo Advanced Technologies Co., Ltd., Hiroshima 734-8501, Japan Abstract Monocrystalline silicon is one of the most important materials in the semiconductor industry because of its many excellent properties as a semiconductor. In the manufacturing process of silicon wafers, inner diameter(lD) blade and multi wire saw have conventionally been used for slicing silicon ingots. However, some problems in efficiency, accuracy, slurry treatment and contamination are experienced when applying this method to large­ scale wafers of 12 or 16 inch diameter expected to be used in the near future. Thus, the improvement of conventional methods or a new slicing method is strongly required. In this study, the possibility of slicing a silicon ingot by wire EDM was discussed and the machining properties were experimentally investigated. A silicon wafer used as substrate for epitaxial film growth has low resistivity in the order of 0.01 g .cm, which makes it possible to cut silicon ingots by wire EDM. It was clarified that the new wire EDM has potential for application as a new slicing method, and that the surface roughness using this method is as small as that using the conventional multi wire saw method. Moreover, it was pointed out that the contamination due to the adhesion and diffusion of wire electrode material into the machined surface can be reduced by wire EDM under the condition of low current and long discharge duration. Key words: Silicon wafer, Monocrystalline silicon ingot, Slicing, Wire EDM, Contamination 1. INTRODUCTION contamination of sliced surfaces. From the above mentioned viewpoints, a new Semiconductor industry has been remarkably slicing method of silicon ingot by wire EDM developed, and higher integration of electric circuit (WEDM) is proposed. A silicon wafer used as a is rapidly making progress. Then, in the slicing substrate for epitaxial film growth has low resistivity process of mono crystalline silicon ingot, further in the order of 0.01 g .cm, which makes it possible to 4 improvements in machining efficiency and accuracy slice silicon ingot by WEDM ). Also, it is expected are strongly required, and the diameter of silicon that the length and the number of the cracks on the wafers are enlarged for increasing the number of IC machined surface might be reduced, since the l chip per one wafer ). Inner diameter blades have material removal is performed by repetition of micro been conventionally used for slicing ingot. However, craters and the machining force acting on the some problems in efficiency still exist, like relatively workpiece is extremely small. large kerf loss and large cracks of about 30~m in In this paper, the possibility of slicing silicon depth on the sliced surfaces, resulted from ingot by WEDM is experimentally discussed, and the mechanical machining. Moreover, this method is machining properties such as slicing speed and difficult to apply for large-scale wafers of 12 or 16 surface roughness are investigated. Furthermore, the inches in diameter, which are expected to be used in accuracy of sliced wafer and the contamination on l the near future ). Therefore, multi wire saw slicing the machined surface are evaluated. 2 has been gradually applied ),3). In this method, thin piano wires are fed to the ingot with slurry consisting 2. EXPERIMENTAL PROCEDURES of abrasives and cutting oil. Multi wire saw slicing has many advantages such as relatively small kerf Usually, high discharge current with short pulse loss and ability of cutting large-scale wafers and duration has been applied in the WEDM process multi wafers at the same time. However, there still used for die making, because of higher cutting remain the problems of slurry treatment and speeds, stable machining, and larger electrode wear -21- allowed due to wire throwaway system. However, the wear of wire leads to adhesion or diffusion of 5 wire material on the machined surface ). This phenomenon is not suitable for the silicon process. 4 Authors ) have done research on machining of mono crystalline silicon by EDM before, and it was made clear that the machining speed for silicon with transistor switching circuit was much larger than that for metal mold material, since material is removed by not only heat conduction from arc column but also Joule's heat generation just below the discharge Fig.1 Experimental apparatus point due to high current density in silicon with high resistivity, which leads to large removal rate in the Table 1 Machining conditions 6 EDM of silicon ). And the electrode wear became smaller. Therefore, slicing by WEDM with transistor Electrode Molybdenum (t/J 180 pm) switching circuit is discussed in this study. It is Polarity Electrode : (-) highly expected that the contamination of wire 6 Dielectric Deionized water ( p > 10 Q. cm) material on the machined surface can be reduced. Gap voltage Ui =100 [V] Fig. 1 shows the schematic diagram of Discharge current ie = 3,12, 22 [A] experimental apparatus. In this system, the discharge Discharge duration te = 5, 10,20,40,75 [ps] current pulse made by transistor switching circuit has Duty factor r = 15 [%] a relatively long duration and a low current intensity. Speed of wire Fw = 5.0-10.0 [m/s] The used wire electrode is rewound around the Wire tension F =5.9 [N] wire-winding drum and reused repeatedly, because of the high expectation of extremely low wear in the wire electrode. In this experiment, molybdenum wire of 180llm in diameter is used as the electrode. P-type 3. SLICING PROPERTIES BY WEDM mono crystalline silicon ingot of 0.01 g . cm in resistivity is used as the workpiece, and machining 3.1 Effects of discharge current and duration fluid is deionized water whose resistivity is about 106 Fig.2 shows the variations of removal rate with g . cm. Main machining conditions are shown in discharge duration for various discharge currents. Table I. The experiment using conventional WEDM Silicon ingots of 10mm(a) and 40mm(b) in thickness with condenser circuit is also done for comparison. are used here. As can be seen form the figures, the In this case, large discharge current for 1st cut and removal rate increases with an increase of discharge small one for 2nd cut are applied. current in both cases of thickness. And the removal c 100 c 200 ·E ·E t\i- Mo(-)/si, t=10mm ....... ie= 3A t\i- Mo(-)/si, t=40mm ....... ie= 3A E Fw=10m/s ~ie=12A E Fw=10m/s ~ie=12A E 75 -A-ie=22A E 150 -A-ie=22A en en > > 50 100 Q) caQ) ca"- "- ca 25 ca 50 > > 0 0 E E Q) Q) a: a: 20 40 60 80 00 20 40 60 80 Discharge duration te jJ.s Discharge duration te jJ.s (a) t=10mm (b) t=40mm Fig.2 Variations of removal rate with pulse duration for various discharge currents - 22- rate takes maximum at about 5-10)ls and 20)ls, in the E 60 :::t Mo(-)/Si, t=40mm cases of 10mm and 40mm in thickness respectively, Fw=10m/s N just like die-sinking EDM process. The effects of 0::: workpiece thickness on removal rate are described (J) 40 (J) 2 ID later. In conventional WEDM, it was 104mm /min c::: 2 .s::. under 1st cut condition, and 1Omm /min under 2nd Cl ::l cut one. It was made clear that the removal rate of e 20 ID ~ ~i.=3A mono crystalline silicon by relatively long duration ~ ~ l~ie=12A 't: -A-ie=22A and low intensity current with transistor switching ::l Cl) circuit was almost the same as that in conventional 0~5~~~1~0-----2~0--~4~0~~~8~0~ WEDM with condenser circuit. Discharge duration t e J.1.S Fig.3 shows the variations of surface roughness. The surface roughness increases with the increases of Fig.3 Variations of surface roughness with pulse discharge current and discharge duration. On the duration for various discharge currents other hand, it was 21.5)lm for 1st cut and 7.6)lm for 2nd cut in conventional WEDM. It is reported that c::: 80~--------------------------' the surface roughness is about 20)lm in multi wire ·E Mo(-)/Si 7 ie=12A saw slicing applied so far ). Furthermore, the ~ Fw=10m/s E 60 removal of crack layer is actually performed after the slicing process, and the removed thickness is more ~ than 30)lm. Considering these results about the 40 removal rate mentioned before, large discharge ID ~ current and not so long pulse duration are suitable ~ 20 conditions, which leads to large removal rate and o small surface roughness. E ~ 0L-5~~~10----~--~-4~0~~~8~0~ 3.2 Effects of thickness In actual slicing process, workpiece thickness Thickness mm always changes, since silicon ingot has a circular Fig.4 Variations of removal rate with thickness cross section. Then, the effects of workpiece for various discharge durations thickness were discussed. The relationships between removal rate and workpiece thickness are given in 80 Fig.4. For short discharge duration, removal rate E ,. :::t Mo(-)/si -.-te= SJLS .... te=40JL doesn't vary so much with the thickness. On the ie=12A 0 te=10JLs ···.··te=7SJL -.. -t =20JLs other hand, it increases with the thickness for long N Fw=10m/s e 0::: 60 discharge duration. When the thickness is small and (J) •..............•••.........••.••......••....••......•.•......•...•.....• the machining area is not so large, the electrical ~406 6 6 6 c::: discharges with long duration are difficult to disperse .s::.