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United States Patent (Ii) 3,562,557

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United States Patent (Ii) 3,562,557 United8 States Patent (ii) 3,562,557 (72) inventor John M. P. Gates (56) References Cited Portland, Oreg. UNITED STATES PATENTS (2) Appl. No. 708,855 2,864,007 12/1958 Clapper........................ 3071255 (22 Filed Feb. 28, 1968 2,933,692 4/1960 Meyers.... ... 307/255X 45) Patented Feb. 9, 1971 3, 140,406 7/1964 Thompson. 307/313X 73 Assignee Tektronix, Inc. 3, 157,797 1/1964 Eshelman....... 3071246 Beaverton, Oreg. 3,171,984 3/1965 Eshelman et al.............. 3071246X a corporation of Oregon 3,444,393 5/1969 Sassler.......................... 307133X Primary Examiner-Stanley D. Miller, Jr. Attorney-Buckhorn, Blore, Klarauist and Sparkman ABSTRACT: A circuit for driving a cathode ray tube deflec y tion blanking plate or the like comprises a pair of complemen 54) COMPLEMENTARY TRANSISTOR CIRCUIT FOR tary transistors having their collector electrodes coupled to DRIVING ANOUTPUTTERMINAL FROM ONE such blanking plate, and having their respective emitters cou VOLTAGE LEVEL TO ANOTHER, INCLUDING pled to positive and negative voltage points. Means intercon TRANSISTOR COUPLNG MEANS BETWEEN nect the transistor bases for coupling a signal therebetween. CoMPLEMENTARY TRANSISTORS The transistors are biased so that one is normally cut off while 7 Claims, 3 Drawing Figs. the other is in saturation. An input provided to one such 52 U.S. Cl....................................................... 307/255, transistor reverses the states of both transistors so that the 3071246; 315/18 transistor which was previously cut off now saturates, and the (5l Int. Cl......................................................... H03k 17/60 previously conducting transistor is cut off. The cathode ray (50 Field of Search............................................ 3071246, tube blanking plate is thereby rapidly driven from one voltage 255,313; 315/18 level to another. + OOV. --OOV. PATENTED FEB 997 3,562,557 -- OOV. IOOV --O V. --OOV. 3. - OV. /32 JOHN M P GATES INVENTOR BY BUCKHORN, BLORE, KLARQUIST & SPARKMAN ATTORNEYS 2 COMPLEMENTARY TRANSESTOR CRCUT FOR DETALED DESCRIPTION EDREWING ANOUTPUTTERMINAL FROM ONE VOLTAGE LEVEL TO ANOTHER, INCLUDING Referring to FIG. 1, a cathode ray tube, illustrated partially TRANSESTOR COUPLNG MEANS BETWEEN at 10, includes a pair of blanking plates 12 and 14. Plate 2 is COMPLEMENTARY TRANSESTORS connected to a positive voltage, e.g. a+100 volts while the op posite plate, plate 14, is driven between a positive voltage, for BACKGROUND OF THE INVENTION example a positive 100 volts, and a negative voltage or During the blanking and unblanking of a cathode ray tube ground. When the potential of plate 14 is approximately the display, a given cathode ray tube electrode may be driven same as that of plate 12, electron beam 16 emitted from from a positive voltage to a relatively negative voltage or O cathode 18 will pass between plates 12 and 4 without sub ground. The cathode ray tube electrode structure and con stantial deflection by the blanking plates. However, if plate 14 necting leads present a certain amount of stray capacitance, so is grounded, electron beam 16 will be attracted strongly towards plate 12. In this manner the beam may be directed the drive must be sufficient to supply displacement current to away from the longitudinal path illustrated for effectively the stray capacitance for fast switching. A usual circuit for 5 driving the blanking electrode in a cathode ray tube comprises blanking the cathode ray tube screen (not shown). The blank an ordinary amplifier having its output terminal connected to ing plate 14 and the lead 20 connecting thereto have stray the blanking electrode of the cathode ray tube, the outputter capacitance to ground indicated by capacitor 22. The dis minal being returned to a supply potential by way of a load re placement current of this stray capacitance must be supplied sistor. The load resistor must not have too large a value or the 20 when driving plate 14 between +100 volts and ground, and time for charging the aforementioned stray capacitance can then back to 100 volts again. be excessive as compared with the speed at which blanking or According to the present invention, a circuit includes an unblanking must take place. Therefore, an amplifier of this output terminal 24 connected to lead 20 and to blanking plate type including a load resistor causes constant power dissipa 14. This circuit is effective for driving the output terminal and tion in the system in one or both of the voltage states. In 25 the blanking plate between a pair of voltage levels and does modern, portable, battery-operated equipment, excessive not employ a power dissipating load resistor. The circuit in power dissipation is undesirable since it shortens battery life. cludes a pair of controlled devices comprising complementary transistors 26 and 28, having both their collector electrodes SUMMARY OF THE INVENTION connected to output terminal 24. Transistor 26 is a PNP 30 transistor and has its emitter coupled to a relatively positive According to the present invention, an output terminal such voltage supply terminal 30, here provided with a potential of as, for example, a terminal connected to a deflection blanking -100 volts. Transistor 28 is an NPN transistor and has its electrode of a cathode ray tube, is driven by a pair of comple emitter electrode connected to a relatively negative voltage mentary transistors. That is, one transistor is a PNP type and supply terminal, here indicated as ground. Resistor 31 con the other transistor is an NPN type. Means are connected 35 between the bases of the two transistors for coupling a signal nects the base of transistor 26 to -100 volts, while resistor 32 therebetween, and the transistor bases are biased such that connects the base of transistor 28 to a --5 volts. Therefore, in one transistor is normally conducting in saturation while the the absence of further input to the transistors, transistor 26 other is normally cut off. An input applied to one of the will be biased beyond cutoff, and resistor 32 provides base transistors switches the conductive states of both transistors 40 current for keeping transistor 28 saturated. At such time, out whereby the previously conducting transistor is cut off, and put terminal 24 and blanking plate 14 are substantially the previously nonconducting transistor is driven to satura grounded through the collector-emitter path of transistor 28. tion. In this manner, the output terminal, e.g. the terminal The bases of transistors 26 and 28 are driven in phase by the connected to a cathode ray blanking electrode, may be rapidly same input driving means, such input driving means including driven between a relatively negative voltage point and a rela 45 means for providing signal drive to them in the presence of a tively positive voltage point, at the same time rapidly charging voltage difference between the bases. In the FEG. embodi stray capacitance and the like. No power dissipating resistor is ment the means for coupling a signal between the bases of employed. transistors 26 and 28 includes NPN transistor 34, connected in It is accordingly an object of the present invention to pro a common base amplifier circuit, having its base connected to vide an improved circuit for driving an output terminal 50 the center tap of a voltage divider comprising resistors 36 and between a pair of voltage levels without the necessity of em 38 disposed between a +5 volts and ground. Resistors 36 and ploying elements dissipating excessive power in the quiescent 38 normally bias transistor 34 in a nonconducting state. The State. collector of transistor 34 is connected to the base of transistor It is a further object of the present invention to provide im 26, and the emitter of transistor 34 is coupled to the base of proved means for driving a blanking electrode of a cathode 55 transistor 28 by way of resistor 40. The input means further in ray tube between voltage levels while supplying displacement cludes a PNP transistor 42 connected in an emitter-follower current for stray circuit capacitance to facilitate rapid configuration, with its collector returned to a -5 volts through switching. resistor 44 while being bypassed to ground by capacitor 46. The subject matter which regard as my invention is par A voltage waveform designated e, is applied at input ter ticularly pointed out and distinctly claimed in the concluding 60 minal 48 which is connected to the base of PNP transistor 42. portion of this specification. The invention, however, both as The emitter of transistor 42 is coupled to the base of transistor to organization and method of operation, together with 28 by resistor 50, providing substantially the same waveform further advantages and objects thereof, may best be un to the base of transistor 28. Transistor 42 furnishes low in derstood by reference to the following description taken in 65 pedance drive for achieving fast rise time operation. A speed connection with the accompanying drawings wherein like up capacitor S2 is shunted across resistor 50 and a similar reference characters refer to like elements. capacitor S4 is shunted across resistors 40 and S0 in series. Yet another speed-up capacitor 56 is connected between the DRAWENGS emitter and collector electrodes of transistor 34. FIG. is a schematic diagram of a circuit according to a first 70 The operation of the FIG. circuit will be discussed with and preferred embodiment of the present invention; reference to the FIG. 2 waveform chart wherein the input FIG. 2 is a waveform chart illustrating operation of the FIG. waveform e is indicated as a negative voltage level inter circuit; and rupted by a series of positive pulses S8. By way of example, the FIG. 3 is a schematic diagram of a circuit according to a input waveform is taken to vary between +1 volts and -1 volts second embodiment of the present invention.
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