D5.1 Report on Performance and Tuning of Runtime Libraries for ARM
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Scalasca User Guide
Scalasca 2.5 User Guide Scalable Automatic Performance Analysis March 2019 The Scalasca Development Team [email protected] The entire code of Scalasca v2 is licensed under the BSD-style license agreement given below, except for the third-party code distributed in the 'vendor/' subdirectory. Please see the corresponding COPYING files in the subdirectories of 'vendor/' included in the distribution tarball for details. Scalasca v2 License Agreement Copyright © 1998–2019 Forschungszentrum Jülich GmbH, Germany Copyright © 2009–2015 German Research School for Simulation Sciences GmbH, Jülich/Aachen, Germany Copyright © 2014–2015 RWTH Aachen University, Germany Copyright © 2003–2008 University of Tennessee, Knoxville, USA Copyright © 2006 Technische Universität Dresden, Germany All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. • Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. • Neither the names of – the Forschungszentrum Jülich GmbH, – the German Research School for Simulation Sciences GmbH, – the RWTH Aachen University, – the University of Tennessee, – the Technische Universität Dresden, nor the names of their contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DIS- CLAIMED. -
TAU, PAPI, Scalasca and Vampir
Parallel Performance Evaluation Tools: TAU, PAPI, Scalasca and Vampir Two day tutorial at LLNL Building 453 R1001 (Armadillo), May 26-27, Livermore, CA Sameer Shende [email protected] http://www.paratools.com/llnl09 Outline Slide # • Outline and workshop goals 2 • Part I: TAU: A quick reference 8 • Part II: Introduction to performance engineering 77 • Part III: PAPI 105 • Part IV: TAU 119 • Part V: Vampir/VNG 266 • Part VI: Scalasca/KOJAK 307 • Lab Session: PAPI, TAU, Vampir and Scalasca examples 385 2 1 Outline • Day 1: – Introduction to performance evaluation tools: TAU, PAPI, Scalasca, and Vampir – Hands-on: – TAU instrumentation at routine, loop level, PAPI hardware performance counter data collection, derived metrics, analyzing performance using TAU’s paraprof profile browser, using Performance database (PerfDMF), memory evaluation, leak detection • Day 2: – Scalasca, TAU PerfExplorer, VampirServer – Hands-on: – Scalasca bottleneck detection tools, PerfExplorer, trace visualization, workshop examples including the NAS Parallel Benchmarks 3.1 3 Workshop Goals • This tutorial is an introduction to portable performance evaluation tools. • You should leave here with a better understanding of… – Concepts and steps involved in performance evaluation – Understanding key concepts in improving and understanding code performance – How to collect and analyze data from hardware performance counters using PAPI – How to instrument your programs with TAU – Automatic instrumentation at the routine level and outer loop level – Manual instrumentation -
Score-P – a Joint Performance Measurement Run-Time Infrastructure for Periscope, Scalasca, TAU, and Vampir
VIRTUAL INSTITUTE – HIGH PRODUCTIVITY SUPERCOMPUTING Score-P – A Joint Performance Measurement Run-Time Infrastructure for Periscope, Scalasca, TAU, and Vampir VI-HPS Team VIRTUAL INSTITUTE – HIGH PRODUCTIVITY SUPERCOMPUTING Congratulations!? . If you made it this far, you successfully used Score-P to . instrument the application . analyze its execution with a summary measurement, and . examine it with one the interactive analysis report explorer GUIs . ... revealing the call-path profile annotated with . the “Time” metric . Visit counts . MPI message statistics (bytes sent/received) . ... but how good was the measurement? . The measured execution produced the desired valid result . however, the execution took rather longer than expected! . even when ignoring measurement start-up/completion, therefore . it was probably dilated by instrumentation/measurement overhead SCORE-P AND SCALASCA PERFORMANCE TOOLS TRAINING, NERSC, JULY 26, 2016 2 VIRTUAL INSTITUTE – HIGH PRODUCTIVITY SUPERCOMPUTING Performance analysis steps . 0.0 Reference preparation for validation . 1.0 Program instrumentation . 1.1 Summary measurement collection . 1.2 Summary analysis report examination . 2.0 Summary experiment scoring . 2.1 Summary measurement collection with filtering . 2.2 Filtered summary analysis report examination . 3.0 Event trace collection . 3.1 Event trace examination & analysis SCORE-P AND SCALASCA PERFORMANCE TOOLS TRAINING, NERSC, JULY 26, 2016 3 VIRTUAL INSTITUTE – HIGH PRODUCTIVITY SUPERCOMPUTING BT-MZ summary analysis result scoring % scorep-score scorep_bt-mz_B.8x4.<jobid>/profile.cubex . Report scoring as textual Estimated aggregate size of event trace: 40 GB Estimated requirements for largest trace buffer (max_buf): 6 GB output Estimated memory requirements (SCOREP_TOTAL_MEMORY): 6 GB (warning: The memory requirements cannot be satisfied by Score-P to avoid intermediate flushes when tracing. -
Profiling and Tracing Tools for Performance Analysis of Large Scale Applications
Available online at www.prace-ri.eu Partnership for Advanced Computing in Europe Profiling and Tracing Tools for Performance Analysis of Large Scale Applications Jerry Erikssonb, Pedro Ojeda-Mayb, Thomas Ponweisera,*, Thomas Steinreitera aRISC Software GmbH, Softwarepark 35, 4232 Hagenberg, Austria bHigh Performance Computing Center North (HPC2N), MIT Huset, Umeå Universitet, 901 87 Umeå, Sweden Abstract The usage of modern profiling and tracing tools is vital for understanding program behaviour, performance bottlenecks and optimisation potentials in HPC applications. Despite their obvious benefits, such tools are still not that widely adopted within the HPC user community. The two main reasons for this are firstly unawareness and secondly the sometimes inhibitive complexity of getting started with these tools. In this work we aim to address this issue by presenting and comparing the capabilities of four different performance analysis tools, which are 1) HPCToolkit, 2) Extrae and Paraver, 3) SCALASCA and 4) the Intel Trace Analyzer and Collector (ITAC). The practical usage of these tools is demonstrated based on case studies on the widely used molecular dynamics simulation code GROMACS. Keywords: Performance Analysis, Profiling, Tracing, HPCToolkit, Extrae, Paraver, SCALASCA, ITAC, GROMACS 1. Introduction Background of this work is a survey conducted by the PRACE project in the beginning of 2016. In order to develop links to European Centres of Excellence (CoEs) and to understand their needs with respect to high performance computing, a questionnaire has been developed and circulated to each of eight selected CoEs. The results of this survey are summarised in the PRACE-4IP deliverable D7.3 [1]. One finding of this survey which motivated the present work is that from the CoE’s answers it is evident that still the use of profiling tools for code optimization is not that well established. -
Best Practice Guide Modern Processors
Best Practice Guide Modern Processors Ole Widar Saastad, University of Oslo, Norway Kristina Kapanova, NCSA, Bulgaria Stoyan Markov, NCSA, Bulgaria Cristian Morales, BSC, Spain Anastasiia Shamakina, HLRS, Germany Nick Johnson, EPCC, United Kingdom Ezhilmathi Krishnasamy, University of Luxembourg, Luxembourg Sebastien Varrette, University of Luxembourg, Luxembourg Hayk Shoukourian (Editor), LRZ, Germany Updated 5-5-2021 1 Best Practice Guide Modern Processors Table of Contents 1. Introduction .............................................................................................................................. 4 2. ARM Processors ....................................................................................................................... 6 2.1. Architecture ................................................................................................................... 6 2.1.1. Kunpeng 920 ....................................................................................................... 6 2.1.2. ThunderX2 .......................................................................................................... 7 2.1.3. NUMA architecture .............................................................................................. 9 2.2. Programming Environment ............................................................................................... 9 2.2.1. Compilers ........................................................................................................... 9 2.2.2. Vendor performance libraries -
CUBE 4.3.4 – User Guide Generic Display for Application Performance Data
CUBE 4.3.4 – User Guide Generic Display for Application Performance Data April 3, 2016 The Scalasca Development Team [email protected] ii Chapter 0. Copyright Copyright Copyright © 1998–2016 Forschungszentrum Jülich GmbH, Germany Copyright © 2009–2015 German Research School for Simulation Sciences GmbH, Jülich/Aachen, Germany All rights reserved. Redistribution and use in source and binary forms, with or without modification, are per- mitted provided that the following conditions are met: • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. • Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. • Neither the names of Forschungszentrum Jülich GmbH or German Research School for Simulation Sciences GmbH, Jülich/Aachen, nor the names of their con- tributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIB - UTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITN - ESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDI - NG, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVIC - ES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIB - ILITY OF SUCH DAMAGE. -
Scalasca 2.3 User Guide Scalable Automatic Performance Analysis
Scalasca 2.3 User Guide Scalable Automatic Performance Analysis May 2016 The Scalasca Development Team [email protected] The entire code of Scalasca v2 is licensed under the BSD-style license agreement given below, except for the third-party code distributed in the 'vendor/' subdirectory. Please see the corresponding COPYING files in the subdirectories of 'vendor/' included in the distribution tarball for details. Scalasca v2 License Agreement Copyright © 1998–2016 Forschungszentrum Jülich GmbH, Germany Copyright © 2009–2015 German Research School for Simulation Sciences GmbH, Jülich/Aachen, Germany Copyright © 2014–2015 RWTH Aachen University, Germany Copyright © 2003–2008 University of Tennessee, Knoxville, USA Copyright © 2006 Technische Universität Dresden, Germany All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. • Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. • Neither the names of – the Forschungszentrum Jülich GmbH, – the German Research School for Simulation Sciences GmbH, – the RWTH Aachen University, – the University of Tennessee, – the Technische Universität Dresden, nor the names of their contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DIS- CLAIMED. -
The Scalasca Performance Toolset Architecture
CONCURRENCY AND COMPUTATION: PRACTICE AND EXPERIENCE Concurrency Computat.: Pract. Exper. 2010; 22:702–719 Prepared using cpeauth.cls [Version: 2002/09/19 v2.02] The Scalasca performance toolset architecture Markus Geimer1, Felix Wolf1,2,3, Brian J.N. Wylie1, Erika Abrah´am´ 3, Daniel Becker1,3, Bernd Mohr1 1 J¨ulich Supercomputing Centre, Forschungszentrum J¨ulich, 52425 J¨ulich, Germany 2 German Research School for Simulation Sciences, 52062 Aachen, Germany 3 Computer Science Department, RWTH Aachen University, 52056 Aachen, Germany SUMMARY Scalasca is a performance toolset that has been specifically designed to analyze parallel application execution behavior on large-scale systems with many thousands of processors. It offers an incremental performance-analysis procedure that integrates runtime summaries with in-depth studies of concurrent behavior via event tracing, adopting a strategy of successively refined measurement configurations. Distinctive features are its ability to identify wait states in applications with very large numbers of processes and to combine these with efficiently summarized local measurements. In this article, we review the current toolset architecture, emphasizing its scalable design and the role of the different components in transforming raw measurement data into knowledge of application execution behavior. The scalability and effectiveness of Scalasca are then surveyed from experience measuring and analyzing real-world applications on a range of computer systems. key words: parallel computing, performance analysis, -
Score-P – a Joint Performance Measurement Run-Time Infrastructure for Periscope, Scalasca, TAU, and Vampir
Score-P – A Joint Performance Measurement Run-Time Infrastructure for Periscope, Scalasca, TAU, and Vampir Markus Geimer1), Bert Wesarg2) With contributions from Andreas Knüpfer2) and Christian Rössel1) 1)FZ Jülich, 2)ZIH TU Dresden Fragmentation of tools landscape • Several performance tools co-exist • With own measurement systems and output formats • Complementary features and overlapping functionality • Redundant effort for development and maintenance • Limited or expensive interoperability • Complications for user experience, support, training Vampir Scalasca TAU Periscope VampirTrace EPILOG / TAU native Online OTF CUBE formats measurement EuroMPI‘12: Hands-on Practical Hybrid Parallel Application Performance Engineering SILC Project Idea • Start a community effort for a common infrastructure – Score-P instrumentation and measurement system – Common data formats OTF2 and CUBE4 • Developer perspective: – Save manpower by sharing development resources – Invest in new analysis functionality and scalability – Save efforts for maintenance, testing, porting, support, training • User perspective: – Single learning curve – Single installation, fewer version updates – Interoperability and data exchange • SILC project funded by BMBF • Close collaboration PRIMA project funded by DOE EuroMPI‘12: Hands-on Practical Hybrid Parallel Application Performance Engineering Partners • Forschungszentrum Jülich, Germany • German Research School for Simulation Sciences, Aachen, Germany • Gesellschaft für numerische Simulation mbH Braunschweig, Germany • -
The Arm Architecture for Exascale HPC
The Arm Architecture for Exascale HPC EXALAT - Lattice Field Theory at the Exascale Dr. Olly Perks - Principal HPC Engineer [email protected] 17th June 2020 © 2020 Arm Limited (or its affiliates) Arm and our role in HPC © 2020 Arm Limited (or its affiliates) What is Arm? • Arm designs IP (such as the Arm ISA) • We do not manufacture hardware • 32-bit RISC instruction encoding • More simplistic but limiting • AArch64 execution state • Atomic memory ops • Half-precision float • Pointer authentication • A64 instruction set • Type2 hypervisor support • RAS support • Nested virtualization 4 © 2020 Arm Limited (or its affiliates) • Statistical profiling • Complex float Why Arm? Especially for Infrastructure / HPC / Scientific Computing / ML? Hardware Software • Flexibility: Allow vendors to differentiate • All based on the same instruction set • Speed and cost of development • Commonality between hardware • Reuse of software • Provide different licensing • Core - Reference design (A53/A72/N1) • Comprehensive software ecosystem • Architecture - Design your own (TX2, A64FX) • Operating systems, compilers, libraries, tools • Not just vendor - third party too • Other hardware components • NoCs, GPUs, memory controllers • “Building blocks” design • Large community • Everything from Android to HPC • Architecture validation for correctness 5 © 2020 Arm Limited (or its affiliates) Variation in the Processor Market Marvell (Cavium) Ampere (X-Gene) eMag Quicksilver Fujitsu Huawei (HiSilicon) 1616 Amazon (Annapurna) EPI / SiPearl Other PHYTIUM 6 © 2020 Arm Limited (or its affiliates) Each generation brings faster performance and new infrastructure specific features 5nm 7nm+ 7nm Poseidon 16nm Zeus Platform Ares Platform Cosmos Platform Platform “N1” 2021 2020 Today 2018 30% Faster System Performance per Generation + New Features Limited Arm © 2018 © Not Just Hardware Applications Performance Open-source, owned, commercial ISV codes, … Engineering … PBS Pro, Altair IBM LSF, SLURM, Arm Forge (DDT, MAP), Rogue Wave, HPC Toolkit, Schedulers Containers, Interpreters, etc. -
Large-Scale Performance Analysis of PFLOTRAN with Scalasca
Mitglied der Helmholtz-Gemeinschaft Large-scale performance analysis of PFLOTRAN 2011-05-26 | 2011-05-26 [email protected] Jülich Supercomputing Centre Brian J. N. Wylie & Mar with Scalasca kus Geimer Overview Dagstuhl challenge ■ PFLOTRAN at large-scale on Cray XT5 & IBM BG/P Scalasca performance analysis toolset ■ Overview of architecture and usage ■ Instrumentation of PFLOTRAN & PETSc ■ Summary & trace measurement experiments ■ Analysis report & trace exploration Scalasca scalability improvement ■ Unification of definition identifiers Conclusions 2011-05-26 | CUG2011 (Fairbanks) Brian J. N. Wylie, Jülich Supercomputing Centre 2 Dagstuhl challenge Demonstrate performance measurement and analysis of PFLOTRAN using “2B” problem dataset and more than 10,000 MPI processes Challenge issued for Dagstuhl seminar 10181 (3-7 May 2010) on “Program development for extreme-scale computing” ■ two months notice with download/build/run instructions ■ accounts/allocations provided by VI-HPS & INCITE/PEAC ■ IBM BG/P (jugene.fz-juelich.de) ■ Cray XT5 (jaguar.nccs.ornl.gov) ■ numerous research groups and vendors presented their results and discussed issues encountered ■ http://www.dagstuhl.de/10181 2011-05-26 | CUG2011 (Fairbanks) Brian J. N. Wylie, Jülich Supercomputing Centre 3 PFLOTRAN 3D reservoir simulator actively developed by LANL/ORNL/PNNL ■ approx. 80,000 lines of Fortran9X, combining solvers for ■ PFLOW non-isothermal, multi-phase groundwater flow ■ PTRAN reactive, multi-component contaminant transport ■ employs PETSc, LAPACK, BLAS & HDF5 I/O libraries ■ 87 PFLOTRAN + 789 PETSc source files ■ parallel I/O tuning via PERI active liaison ■ “2B” input dataset run for 10 timesteps ■ uses 3-dimensional (non-MPI) PETSc Cartesian grid ■ TRAN(sport) step scales much better than FLOW step ■ FLOW step generally faster, but crossover at larger scales 2011-05-26 | CUG2011 (Fairbanks) Brian J. -
Comparing the Usability of Performance Analysis Tools
Comparing the Usability of Performance Analysis Tools Christian Iwainsky and Dieter an Mey Center for Computing and Communication, RWTH Aachen University {iwainsky,anmey}@rz.rwth-aachen.de Abstract. We take a look at the performance analysis tools Vampir, Scalasca, Sun Performance Analyzer and the Intel Trace Analyzer and Collector, which provide execution analysis of parallel programs for opti- mization and scaling purposes. We investigate, from a novice user’s point of view, to what extent these tools support frequently used programming languages and constructs, discuss their performance impact and the in- sight these tools provide focusing on the instrumentation and program analysis. For this we analyzed codes currently used at the RWTH Aachen University: XNS, DROPS and HPL. 1 Introduction High end computing machines for scientific applications are highly parallel com- puters, typically clusters of tightly connected shared memory parallel compute nodes with an increasing number of processor cores. The dominating paradigms for parallel programming in scientific computing are message passing with MPI, multi-threading using OpenMP or a combination of both. However development of parallel software is not an easy task.Tools have been developed to analyze and visualize a parallel program’s runtime behavior and increase the users produc- tivity in optimizing and tuning his code. Performance analysis is typically performed in several phases. During the measurement phase, information about the runtime behavior is collected by in- strumentation or sampling. Sampling an application means that at runtime the program is probed and a set of performance metrics is collected. This set usu- ally contains the program counter, the call stack, memory usage and hardware- counters.