Intel® Software Products Highlights and Best Practices
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Beyond BIOS Developing with the Unified Extensible Firmware Interface
Digital Edition Digital Editions of selected Intel Press books are in addition to and complement the printed books. Click the icon to access information on other essential books for Developers and IT Professionals Visit our website at www.intel.com/intelpress Beyond BIOS Developing with the Unified Extensible Firmware Interface Second Edition Vincent Zimmer Michael Rothman Suresh Marisetty Copyright © 2010 Intel Corporation. All rights reserved. ISBN 13 978-1-934053-29-4 This publication is designed to provide accurate and authoritative information in regard to the subject matter covered. It is sold with the understanding that the publisher is not engaged in professional services. If professional advice or other expert assistance is required, the services of a competent professional person should be sought. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Intel may make changes to specifications, product descriptions, and plans at any time, without notice. Fictitious names of companies, products, people, characters, and/or data mentioned herein are not intended to represent any real individual, company, product, or event. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel, the Intel logo, Celeron, Intel Centrino, Intel NetBurst, Intel Xeon, Itanium, Pentium, MMX, and VTune are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. -
Intel Advisor for Dgpu Intel® Advisor Workflows
Profile DPC++ and GPU workload performance Intel® VTune™ Profiler, Advisor Vladimir Tsymbal, Technical Consulting Engineer, Intel, IAGS Agenda • Introduction to GPU programming model • Overview of GPU Analysis in Intel® VTune Profiler • Offload Performance Tuning • GPU Compute/Media Hotspots • A DPC++ Code Sample Analysis Demo • Using Intel® Advisor to increase performance • Offload Advisor discrete GPUs • GPU Roofline for discrete GPUs Copyright © 2020, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others. 2 Intel GPUs and Programming Model Gen9 Application Workloads • Most common Optimized Middleware & Frameworks in mobile, desktop and Intel oneAPI Product workstations Intel® Media SDK Direct Direct API-Based Gen11 Programming Programming Programming • Data Parallel Mobile OpenCL platforms with C API C++ Libraries Ice Lake CPU Gen12 Low-Level Hardware Interface • Intel Xe-LP GPU • Tiger Lake CPU Copyright © 2020, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others. 3 GPU Application Analysis GPU Compute/Media Hotspots • Visibility into both host and GPU sides • HW-events based performance tuning methodology • Provides overtime and aggregated views GPU In-kernel Profiling • GPU source/instruction level profiling • SW instrumentation • Two modes: Basic Block latency and memory access latency Identify GPU occupancy and which kernel to profile. Tune a kernel on a fine grain level Copyright © 2020, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others. 4 GPU Analysis: Aggregated and Overtime Views Copyright © 2020, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others. -
Intel® Parallel Studio
Intel® Parallel Studio Product Brief Parallelism for Your Development Lifecycle Intel® Parallel Studio Intel® Parallel Studio brings comprehensive parallelism to C/C++ Microsoft Visual Studio* application development. Parallel Studio was created in direct response to the concerns of software industry leaders and developers. From the way the products work together to support the development lifecycle to their unique feature sets, parallelism is now easier and more viable than ever before. The tools are designed so those new to parallelism can learn as they go, and experienced parallel programmers can work more efficiently and with more confidence. Parallel Studio is interoperable with common parallel programming libraries and API standards, such as Intel® Threading Building Blocks (Intel® TBB) and OpenMP*, and provides an immediate opportunity to realize the benefits of multicore platforms. “Intel® Parallel Studio makes the new Envivio 4Caster Series Transcoder’s development faster and more efficient. The tools included in Intel Parallel Studio, such as Intel® Parallel Inspector, Intel® Parallel Amplifier, and Intel® Parallel Composer (which consists of the Intel® C++ Compiler, Intel® IPP, and Intel® TBB) shortens our overall software development time by increasing the code’s reliability and its performance in a multicore multithreaded environment. At the qualification stage, the number of dysfunctions is reduced due to a safer implementation, and the bug tracking becomes easier too. Intel Parallel Studio globally speeds up our software products’ time-to-market”. Eric Rosier V.P. Engineering Envivio Intel® Parallel Studio Tools c. How can you actually boost performance of your threaded application on multicore processors and make the performance scale with additional cores? Intel® Parallel Studio Workflow The workflow diagram below depicts a typical usage model across all Intel Parallel Studio Addresses the Issues Listed Above. -
Getting Started with Oneapi
ONEAPI SINGLE PROGRAMMING MODEL TO DELIVER CROSS-ARCHITECTURE PERFORMANCE Getting started with oneAPI March 2020 How oneAPIaddresses our Heterogeneous World? DIVERSE WORKLOADS DEMAND DIVERSEARCHITECTURES The future is a diverse mix of scalar, vector, matrix, andspatial architectures deployed in CPU, GPU, AI, FPGA, and other accelerators. Optimization Notice Copyright © 2020, Intel Corporation. All rights reserved. Getting started withoneAPI 4 *Other names and brands may be claimed as the property of others. CHALLENGE: PROGRAMMING IN A HETEROGENEOUSWORLD ▷ Diverse set of data-centric hardware ▷ No common programming language or APIs ▷ Inconsistent tool support across platforms ▷ Proprietary solutions on individual platforms S V M S ▷ Each platform requires unique software investment Optimization Notice Copyright © 2020, Intel Corporation. All rights reserved. Getting started withoneAPI 5 *Other names and brands may be claimed as the property of others. INTEL'S ONEAPI CORECONCEPT ▷ Project oneAPI delivers a unified programming model to simplify development across diverse architectures ▷ Common developer experience across SVMS ▷ Uncompromised native high-level language performance ▷ Support for CPU, GPU, AI, and FPGA ▷ Unified language and libraries for ▷ Based on industry standards and expressing parallelism open specifications https://www.oneapi.com/spec/ Optimization Notice Copyright © 2020, Intel Corporation. All rights reserved. Getting started withoneAPI 6 *Other names and brands may be claimed as the property of others. ONEAPI FOR CROSS-ARCHITECTUREPERFORMANCE Optimization Notice Copyright © 2020, Intel Corporation. All rights reserved. Getting started withoneAPI 7 *Other names and brands may be claimed as the property of others. WHAT IS DATA PARALLELC++? WHAT ISDPC++? The language is: C++ + SYCL https://www.khronos.org/sycl/ + Additional Features such as.. -
Michael Steyer Technical Consulting Engineer Intel Architecture, Graphics & Software Analysis Tools
Michael Steyer Technical Consulting Engineer Intel Architecture, Graphics & Software Analysis Tools Optimization Notice Copyright © 2020, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others. Aspects of HPC/Throughput Application Performance What are the Aspects of Performance Intel Hardware Features Multi-core Intel® Omni Intel® Optane™ Intel® Advanced Intel® Path HBM DC persistent Vector Xeon® Extensions 512 Architecture memory (Intel® AVX-512) processor Distributed memory Memory I/O Threading CPU Core Message size False Sharing File I/O Threaded/serial ratio uArch issues (IPC) Rank placement Access with strides I/O latency Thread Imbalance Vectorization Rank Imbalance Latency I/O waits RTL overhead FPU usage efficiency RTL Overhead Bandwidth System-wide I/O (scheduling, forking) Network Bandwidth NUMA Synchronization Cluster Node Core Optimization Notice Copyright © 2020, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others. IntelWhat Parallel are the Studio Aspects Tools covering of Performance the Aspects Intel Hardware Features Multi-core Intel® Intel® Omni Intel® Optane™ Advanced Intel®Path DC persistent Intel® Vector HBM Extensions Architectur Intel® VTune™memory AmplifierXeon® processor 512 (Intel® Tracee Intel®AVX-512) DistributedAnalyzer memory Memory I/O Threading AdvisorCPU Core Messageand size False Sharing File I/O Threaded/serial ratio uArch issues (IPC) Rank placement Access with strides I/O latency Thread Imbalance Vectorization RankCollector Imbalance Latency I/O waits RTL overhead FPU usage efficiency RTL Overhead Bandwidth System-wide I/O (scheduling, forking) Network Bandwidth NUMA Synchronization Cluster Node Core Optimization Notice Copyright © 2020, Intel Corporation. All rights reserved. -
Hands-On Intel® Software Development & Oneapi WORKSHOP
Hands-on Intel® Software Development & oneAPI WORKSHOP May 26-27, 2020 Scandic Solli, Parkveien 68 Box 2458 Solli, 0202 Oslo AGENDA DAY 1 - Technical Computing & Developer Tools - May 26 Timing Sessions 08:30 – 09:00 Registration & Light breakfast Part 1: Coding for maximum performance using the new Intel® Parallel Studio XE 2020 A refresher on the Intel® Hardware Architecture for Software Developers and Architects This session will offer in-depth insights into the current and future Intel® hardware platforms tailored to the 09:00 -09:45 needs of software developers, software architects, HPC and AI experts. We will cover the latest Intel® processors and the future Intel® GPU architecture. Developing code for Intel® architecture: how to achieve maximum performance using the new Intel® Parallel Studio XE 2020 09:45 – 10:30 Learn how Intel® Software Development Tools will help you to achieve optimal performance in your High Performance Computing, Artificial Intelligence ,and IoT projects. Includes a look at the new Intel® Parallel Studio XE 2020 tools which are designed to take advantage of the latest generation of Intel processors. 10:30 – 11:00 Coffee Break How to optimize and maximize code performance Learn how to use some of the advanced features of Intel® VTune™ Amplifier profile your applications. See how you can use event-based and architectural analysis to fine-tune your code so that it is taking full 11:00 – 12:00 advantage of the latest processor features of the target CPU. Learn how to use Intel Advisor, a powerful tool for tracking down and solving vectorization problems. In this session we will demonstrate how the Intel Advisor vector analysis and associated Roofline Model can be used to identify and help fixing vectorization problems. -
Evaluating Techniques for Parallelization Tuning in MPI, Ompss and MPI/Ompss
Evaluating techniques for parallelization tuning in MPI, OmpSs and MPI/OmpSs Advisors: Author: Prof. Jesús Labarta Vladimir Subotic´ Prof. Mateo Valero Prof. Eduard Ayguade´ A THESIS SUBMITTED IN FULFILMENT OF THE REQUIREMENTS FOR THE DEGREE OF Doctor per la Universitat Politècnica de Catalunya Departament d’Arquitectura de Computadors Barcelona, 2013 i Abstract Parallel programming is used to partition a computational problem among multiple processing units and to define how they interact (communicate and synchronize) in order to guarantee the correct result. The performance that is achieved when executing the parallel program on a parallel architec- ture is usually far from the optimal: computation unbalance and excessive interaction among processing units often cause lost cycles, reducing the efficiency of parallel computation. In this thesis we propose techniques oriented to better exploit parallelism in parallel applications, with especial emphasis in techniques that increase asynchronism. Theoretically, this type of parallelization tuning promises multiple benefits. First, it should mitigate communication and synchro- nization delays, thus increasing the overall performance. Furthermore, parallelization tuning should expose additional parallelism and therefore increase the scalability of execution. Finally, increased asynchronism would allow more flexible communication mechanisms, providing higher toler- ance to slower networks and external noise. In the first part of this thesis, we study the potential for tuning MPI par- allelism. More specifically, we explore automatic techniques to overlap communication and computation. We propose a speculative messaging technique that increases the overlap and requires no changes of the orig- inal MPI application. Our technique automatically identifies the applica- tion’s MPI activity and reinterprets that activity using optimally placed non-blocking MPI requests. -
Introduction to Intel Performance Tools Part
Introduction to Intel Performance Tools Part 1/2 Doug Roberts SHARCNET / COMPUTE CANADA Intel® Performance Tools o Intel Advisor - Optimize Vectorization and Thread Prototyping for C, C++, Fortran o Intel Inspector - Easy-to-use Memory and Threading Error Debugger for C, C++, Fortran o Intel Vtune Amplifier - Serial/Threaded Performance Profiler for C, C++, Fortran, Mixed Python o Intel Trace Analyzer and Collector - Understand MPI application behavior for C, C++, Fortran, OpenSHMEM o Intel Distribution for Python - High-performance Python powered by native Intel Performance Libraries Intel® Parallel Studio XE – Cluster Edition https://software.intel.com/en-us/parallel-studio-xe o Intel Advisor* https://software.intel.com/en-us/intel-advisor-xe o Intel Inspector* https://software.intel.com/en-us/intel-inspector-xe o Intel Vtune Amplifier* https://software.intel.com/en-us/intel-vtune-amplifier-xe o Intel Trace Analyzer and Collector* https://software.intel.com/en-us/intel-trace-analyzer o Intel Distribution for Python https://software.intel.com/en-us/distribution-for-python * Product Support → Training, Docs, Faq, Code Samples Initializating the Components – The Intel Way ssh graham.sharcnet.ca cd /opt/software/intel/18.0.1/parallel_studio_xe_2018.1.038 source psxevars.sh → linux/bin/compilervars.sh → clck_2018/bin/clckvars.sh → itac_2018/bin/itacvars.sh → inspector_2018/inspxe-vars.sh → vtune_amplifier_2018/amplxe-vars.sh → advisor_2018/advixe-vars.sh Examples ls /opt/software/intel/18.0.1/parallel_studio_xe_2018.1.038/samples_2018/en -
Accelerate AI, HPC, Enterprise & Cloud Applications
Accelerate AI, HPC, Enterprise & Cloud Applications April 2019 @ CiTIUS: Centro Singular de Investigación en Tecnoloxías da Información Intel Computing Performance and Software Products (CPDP) Edmund Preiss Agenda • Intel Software Development Tools • Intel optimized AI Solutions Optimization Notice Copyright © 2018, Intel Corporation. All rights reserved. 3 *Other names and brands may be claimed as the property of others. Intel® Software Developer Tools & SDKs Intel® Parallel Studio XE Intel® System Studio Comprehensive Enterprise , HPC Embedded Tools Suite Tools suite Comprehensive, all-in-one, cross-platform Shared and distributed memory system & IoT development tool suite systems Simplifies system bring-up, boosts Code creation and versatile SW performance and power efficiency, Analysis Tools strengthens system reliability Intel® Media Server Studio OpenVINO™ Media Encode/Decode Tools Machine Learning / Deep Learning Inference Media SDK Computer Vision SDK Graphics Perf Analyzer Deep Learning (DL) Deployment Toolkit Computer Vision SDK Deep Learning Algorithms Open CL SDK Optimized DL Frameworks Context SDK Optimization Notice Copyright © 2018, Intel Corporation. All rights reserved. INTEL CONFIDENTIAL 11 *Other names and brands may be claimed as the property of others. What’s Inside Intel® Parallel Studio XE Comprehensive Software Development Tool Suite Cluster Edition Composer Edition Professional Edition BUILD ANALYZE SCALE Compilers & Libraries Analysis Tools Cluster Tools C / C++ Compiler Intel® Math Kernel Library Intel® VTune™ -
Intel(R) Math Kernel Library for Linux* OS User's Guide
Intel® Math Kernel Library for Linux* OS User's Guide MKL 10.3 - Linux* OS Document Number: 315930-012US Legal Information Legal Information INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL(R) PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information. The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. -
Intel® Math Kernel Library for Windows* OS User's Guide
Intel® Math Kernel Library for Windows* OS User's Guide Intel® MKL - Windows* OS Document Number: 315930-027US Legal Information Contents Contents Legal Information................................................................................7 Introducing the Intel® Math Kernel Library...........................................9 Getting Help and Support...................................................................11 Notational Conventions......................................................................13 Chapter 1: Overview Document Overview.................................................................................15 What's New.............................................................................................15 Related Information.................................................................................15 Chapter 2: Getting Started Checking Your Installation.........................................................................17 Setting Environment Variables ..................................................................17 Compiler Support.....................................................................................19 Using Code Examples...............................................................................19 What You Need to Know Before You Begin Using the Intel® Math Kernel Library...............................................................................................19 Chapter 3: Structure of the Intel® Math Kernel Library Architecture Support................................................................................23 -
Quick-Reference Guide to Optimization with Intel® Compilers
Quick Reference Guide to Optimization with Intel® C++ and Fortran Compilers v19.1 For IA-32 processors, Intel® 64 processors, Intel® Xeon Phi™ processors and compatible non-Intel processors. Contents Application Performance .............................................................................................................................. 2 General Optimization Options and Reports ** ............................................................................................. 3 Parallel Performance ** ................................................................................................................................ 4 Recommended Processor-Specific Optimization Options ** ....................................................................... 5 Optimizing for the Intel® Xeon Phi™ x200 product family ............................................................................ 6 Interprocedural Optimization (IPO) and Profile-Guided Optimization (PGO) Options ................................ 7 Fine-Tuning (All Processors) ** ..................................................................................................................... 8 Floating-Point Arithmetic Options .............................................................................................................. 10 Processor Code Name With Instruction Set Extension Name Synonym .................................................... 11 Frequently Used Processor Names in Compiler Options ...........................................................................