M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 47 CHAPTER 2 First-Pass Introduction to Microfabrication 2.0 PREVIEW A first time student of MEMS should note two important facts about the microfabrication tech- nology used to prototype and manufacture MEMS devices. First, MEMS fabrication represents a paradigm shift from traditional machining and manufacturing processes. It does not involve methods such as milling, lathing, polishing, joining, and welding, at least at the present stage. A student of MEMS, who is otherwise unfamiliar with the integrated circuit fabrication process, should first be acquainted with a new framework of manufacturing, to the point of being aware of its unique features and limitations. Secondly, the portfolio of MEMS fabrication techniques (the micromachining “tool box”) is rapidly expanding, towards the goals of increasing the variety of materials involved, increasing the fabrication efficiency, and reducing the cost of manufacturing. Section 2.1 presents an overview of the general framework of microfabrication using sili- con wafers. Section 2.2 briefly overviews essential process techniques pertinent to a beginning student. In Section 2.3, I will discuss a representative process flow for a transistor, a building block of modern integrated circuits. This discussion is highly relevant because the microma- chining process is derived from the IC industry.This is followed by a discussion of bulk and sur- face micromachining process based on silicon (Section 2.4.). Section 2.5 will expose readers to the concept and importance of integration scheme, packaging, and encapsulation. New materi- als beyond silicon are being incorporated into the MEMS research field actively. Some of these materials and their associated fabrication processes are reviewed in Section 2.6. In Section 2.7, I will discuss major points of consideration when selecting a microfabrication process. 2.1 OVERVIEW OF MICROFABRICATION MEMS and IC devices are generally made on single crystal silicon wafers. Figure 2.1 diagrams the overall process from the production of such wafers to packaging of individual device chips. 47 M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 48 48 Chapter 2 First-Pass Introduction to Microfabrication mechanical draw [100] wafer [100] polishing crystal multi-step rod process crystal die seed [100] sawing molten dicing silicon die packaging chip bonding wires pins FIGURE 2.1 Wafer process steps. Bulk silicon with crystalline consistency does not exist in nature, and must be prepared through laborious industrial processes. To make bulk crystal silicon, one starts with a perfect single crystal silicon seed. It is dipped into a molten silicon pool and slowly drawn out of the liq- uid. Silicon crystallizes when drawn into the atmosphere and establishes crystallinity consistent with that of the initial seed. Rods of single crystal with various diameters and longitudinal crys- tal orientation can be formed this way.The rods are sawed into thin, circular slices and polished to form wafers. A wafer goes through a multi-step fabrication process in a clean room, where dust, particles, and even ions in water are tightly controlled. The cleanliness of air in a clean room is classified according to the concentration of air-borne particles (with sizes larger than 0.5 mm).According to a standard method for characterizing the cleanliness level of a cleanroom, a class 1 cleanroom has fewer than 1 particle and a class 100 cleanroom has fewer than 100 particles per ft3 of air sampled. As a reference, average outdoor air contains more than 400,000 particles per ft3. Generally speak- ing, a class 1000, 100, 10, 1, and 0.1 cleanroom can support production down to approximately 4 mm, 1.25 mm, 0.7 mm, 0.3 mm, and <0.1 mm, respectively. State of the art integrated circuits uses linewidth smaller than 0.18 mm since 1999. Water (for rinsing) and chemical solutions must go through stringent, costly manufactur- ing and conditioning processes. Ions in water (e.g., sodium ions), even in trace amount, will mi- grate into silicon and thin film materials upon direct contact. These ions may become trapped charges in dielectrics, and hurt device performance. De-ionized water (more broadly speaking, ultrapure water) used in semiconductor manufacturing has resistivity in excess of 18 MÆ, com- pared to a resistivity of less than 50 kÆ for tap waters. Precision patterns are made using photolithographic patterning method. Collimated light passes through a mask and an image-reduction lens before hitting the wafer, in a process akin M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 49 2.1 Overview of Microfabrication 49 to taking a photograph of an object through a telephoto length and recording the image on a photosensitive film. In this case, the object being photographed is the mask and the film is the wafer, coated with a photosensitive film. Various wavelength of light can be used. Light with higher energy (and hence smaller wavelength) is capable of producing smaller linewidths. The ultimate resolution is dictated by the diffraction limit. Using a machine-automated photolithography process called step-and-repeat, many iden- tical units can be made on a same wafer with high linewidth resolution (0.1 mm or smaller in commercial processes). The machine used for performing the step-and-repeat process is called a stepper.The way a stepper works is described as follows.After a reduced image of the mask is printed to an area on a wafer, the wafer is translated by a precise distance, and another expo- sure is made. Many identical devices, called dies, are made on one given wafer in a single pass. This differentiates MEMS process from conventional manufacturing technology, which gener- ally deals with one part at a time. The larger the wafer, the more dies are made in a given batch. According to Figure 2.2, if the die size is 1 1cm2, there could be roughly 21 dies on a 2Љ wafer, 82 on a 4Љ wafer, 178 on a 6Љ wafer, 314 on an 8Љ wafer, and 770 on a 10Љ one. The economy of scale when moving to a larger wafer is compelling. However, readers should note that there is cost associated with up- grading the wafer sizes.A piece of machine designed to handle a 4Љ dia wafer will not be able to handle a 6Љ dia wafer, and so on. When the decision to upgrade the wafer size is made, almost every piece of equipment in the entire fab line needs to be purchased, easily amounting to in- vestments of tens of millions of US dollars for a modest manufacturing operation. Further, it is noteworthy that only large volume products would warrants the full benefits of larger wafers. For small volume products, the benefit of parallel fabrication is easily offset by the fixed cost of setup process and making high-resolution masks. 4" wafer 6" wafer 2" wafer 8" wafer FIGURE 2.2 How many dies can you 10" wafer harvest from a wafer? M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 50 50 Chapter 2 First-Pass Introduction to Microfabrication These dies have spacings between them so that they can be mechanically cut and sepa- rated. Each cut die, called a chip, can then be electrically connected and encapsulated for commercial resale. The process of incorporating a loose die to a housing and a system is called packaging. In a given process, a percentage of dies with satisfactory performance is called the process yield. The yield deeply affects the economy of fabrication and the cost of final devices. It is de- termined by the choices of design, materials, and processes in complex ways. For industry, the yield figure is a guarded secret. Should you approach a person from industry and ask him/her about the yield of their process, the best answer you can get is a polite “no”. In a number of important ways, the MEMS process and conventional macroscale machin- ing differs drastically: 1. Silicon, a principal substrate material for MEMS and integrated circuit, is mechanically brittle and cannot be shaped by machine cutting tools; 2. MEMS and integrated circuits are made on planar crystalline wafers. The planarity is not just a matter of convenience for automated wafer processing. When lithography pattern- ing is conducted on a planar substrate, a consistent focus distance is ensured, leading to uniformity and resolution. The planarity of a wafer is also important to ensure the entire wafer surface has identical crystal orientation. 3. Loose dies are generally too small and numerous to be handled by human labor. They must be compatible with automated sorting and pick-and-place machines. A chip is placed into a package, which is then mounted on a circuit board (Figure 2.3). Take the example of a smart phone (Figure 2.4), a consumer electronics system with many compo- nents, including display, battery, computer chip, camera, and sensors (e.g., inclination sensors, motion sensors, microphone, touch screen, etc). A microphone chip is highlighted in the dia- gram and shown in zoomed view in the lower half of the figure. The chip consists of a package casing within which the diced silicon die is mechanically mounted and electrically connected by bonding wires (Figure 2.3). There are many possible variants for integrating mechanical ele- ments with circuitry. This book focuses on the segment of the process flow between a bare wafer and an undiced wafer with fabricated devices. However, general understanding about the packaging schemes is important for a MEMS developer. wafer die dicing chip FIGURE 2.3 package A process illustrating (module) the process from a wafer to die to package circuit and to the circuit board. board M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 51 2.2 Essential Overview of Frequently Used Microfabrication Processes 51 touch screen keys track-ball one ph rt a m s battery on board computer circuit and other ICs board camera MEMS lens microphone package discrete circuit elements package mechanical electrical bonding casing elements elements wire package metal external FIGURE 2.4 wire leads wire wafer leads Diagram showing the interior elements of a doped smart phone, a pack- circuit semi- conductor aged sensor chip, and board regions interior components of the chip package.