DOCSLIB.ORG

First-Pass Introduction to Microfabrication

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
First-Pass Introduction to Microfabrication M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 47 CHAPTER 2 First-Pass Introduction to Microfabrication 2.0 PREVIEW A first time student of MEMS should note two important facts about the microfabrication tech- nology used to prototype and manufacture MEMS devices. First, MEMS fabrication represents a paradigm shift from traditional machining and manufacturing processes. It does not involve methods such as milling, lathing, polishing, joining, and welding, at least at the present stage. A student of MEMS, who is otherwise unfamiliar with the integrated circuit fabrication process, should first be acquainted with a new framework of manufacturing, to the point of being aware of its unique features and limitations. Secondly, the portfolio of MEMS fabrication techniques (the micromachining “tool box”) is rapidly expanding, towards the goals of increasing the variety of materials involved, increasing the fabrication efficiency, and reducing the cost of manufacturing. Section 2.1 presents an overview of the general framework of microfabrication using sili- con wafers. Section 2.2 briefly overviews essential process techniques pertinent to a beginning student. In Section 2.3, I will discuss a representative process flow for a transistor, a building block of modern integrated circuits. This discussion is highly relevant because the microma- chining process is derived from the IC industry.This is followed by a discussion of bulk and sur- face micromachining process based on silicon (Section 2.4.). Section 2.5 will expose readers to the concept and importance of integration scheme, packaging, and encapsulation. New materi- als beyond silicon are being incorporated into the MEMS research field actively. Some of these materials and their associated fabrication processes are reviewed in Section 2.6. In Section 2.7, I will discuss major points of consideration when selecting a microfabrication process. 2.1 OVERVIEW OF MICROFABRICATION MEMS and IC devices are generally made on single crystal silicon wafers. Figure 2.1 diagrams the overall process from the production of such wafers to packaging of individual device chips. 47 M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 48 48 Chapter 2 First-Pass Introduction to Microfabrication mechanical draw [100] wafer [100] polishing crystal multi-step rod process crystal die seed [100] sawing molten dicing silicon die packaging chip bonding wires pins FIGURE 2.1 Wafer process steps. Bulk silicon with crystalline consistency does not exist in nature, and must be prepared through laborious industrial processes. To make bulk crystal silicon, one starts with a perfect single crystal silicon seed. It is dipped into a molten silicon pool and slowly drawn out of the liq- uid. Silicon crystallizes when drawn into the atmosphere and establishes crystallinity consistent with that of the initial seed. Rods of single crystal with various diameters and longitudinal crys- tal orientation can be formed this way.The rods are sawed into thin, circular slices and polished to form wafers. A wafer goes through a multi-step fabrication process in a clean room, where dust, particles, and even ions in water are tightly controlled. The cleanliness of air in a clean room is classified according to the concentration of air-borne particles (with sizes larger than 0.5 mm).According to a standard method for characterizing the cleanliness level of a cleanroom, a class 1 cleanroom has fewer than 1 particle and a class 100 cleanroom has fewer than 100 particles per ft3 of air sampled. As a reference, average outdoor air contains more than 400,000 particles per ft3. Generally speak- ing, a class 1000, 100, 10, 1, and 0.1 cleanroom can support production down to approximately 4 mm, 1.25 mm, 0.7 mm, 0.3 mm, and <0.1 mm, respectively. State of the art integrated circuits uses linewidth smaller than 0.18 mm since 1999. Water (for rinsing) and chemical solutions must go through stringent, costly manufactur- ing and conditioning processes. Ions in water (e.g., sodium ions), even in trace amount, will mi- grate into silicon and thin film materials upon direct contact. These ions may become trapped charges in dielectrics, and hurt device performance. De-ionized water (more broadly speaking, ultrapure water) used in semiconductor manufacturing has resistivity in excess of 18 MÆ, com- pared to a resistivity of less than 50 kÆ for tap waters. Precision patterns are made using photolithographic patterning method. Collimated light passes through a mask and an image-reduction lens before hitting the wafer, in a process akin M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 49 2.1 Overview of Microfabrication 49 to taking a photograph of an object through a telephoto length and recording the image on a photosensitive film. In this case, the object being photographed is the mask and the film is the wafer, coated with a photosensitive film. Various wavelength of light can be used. Light with higher energy (and hence smaller wavelength) is capable of producing smaller linewidths. The ultimate resolution is dictated by the diffraction limit. Using a machine-automated photolithography process called step-and-repeat, many iden- tical units can be made on a same wafer with high linewidth resolution (0.1 mm or smaller in commercial processes). The machine used for performing the step-and-repeat process is called a stepper.The way a stepper works is described as follows.After a reduced image of the mask is printed to an area on a wafer, the wafer is translated by a precise distance, and another expo- sure is made. Many identical devices, called dies, are made on one given wafer in a single pass. This differentiates MEMS process from conventional manufacturing technology, which gener- ally deals with one part at a time. The larger the wafer, the more dies are made in a given batch. According to Figure 2.2, if the die size is 1 1cm2, there could be roughly 21 dies on a 2Љ wafer, 82 on a 4Љ wafer, 178 on a 6Љ wafer, 314 on an 8Љ wafer, and 770 on a 10Љ one. The economy of scale when moving to a larger wafer is compelling. However, readers should note that there is cost associated with up- grading the wafer sizes.A piece of machine designed to handle a 4Љ dia wafer will not be able to handle a 6Љ dia wafer, and so on. When the decision to upgrade the wafer size is made, almost every piece of equipment in the entire fab line needs to be purchased, easily amounting to in- vestments of tens of millions of US dollars for a modest manufacturing operation. Further, it is noteworthy that only large volume products would warrants the full benefits of larger wafers. For small volume products, the benefit of parallel fabrication is easily offset by the fixed cost of setup process and making high-resolution masks. 4" wafer 6" wafer 2" wafer 8" wafer FIGURE 2.2 How many dies can you 10" wafer harvest from a wafer? M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 50 50 Chapter 2 First-Pass Introduction to Microfabrication These dies have spacings between them so that they can be mechanically cut and sepa- rated. Each cut die, called a chip, can then be electrically connected and encapsulated for commercial resale. The process of incorporating a loose die to a housing and a system is called packaging. In a given process, a percentage of dies with satisfactory performance is called the process yield. The yield deeply affects the economy of fabrication and the cost of final devices. It is de- termined by the choices of design, materials, and processes in complex ways. For industry, the yield figure is a guarded secret. Should you approach a person from industry and ask him/her about the yield of their process, the best answer you can get is a polite “no”. In a number of important ways, the MEMS process and conventional macroscale machin- ing differs drastically: 1. Silicon, a principal substrate material for MEMS and integrated circuit, is mechanically brittle and cannot be shaped by machine cutting tools; 2. MEMS and integrated circuits are made on planar crystalline wafers. The planarity is not just a matter of convenience for automated wafer processing. When lithography pattern- ing is conducted on a planar substrate, a consistent focus distance is ensured, leading to uniformity and resolution. The planarity of a wafer is also important to ensure the entire wafer surface has identical crystal orientation. 3. Loose dies are generally too small and numerous to be handled by human labor. They must be compatible with automated sorting and pick-and-place machines. A chip is placed into a package, which is then mounted on a circuit board (Figure 2.3). Take the example of a smart phone (Figure 2.4), a consumer electronics system with many compo- nents, including display, battery, computer chip, camera, and sensors (e.g., inclination sensors, motion sensors, microphone, touch screen, etc). A microphone chip is highlighted in the dia- gram and shown in zoomed view in the lower half of the figure. The chip consists of a package casing within which the diced silicon die is mechanically mounted and electrically connected by bonding wires (Figure 2.3). There are many possible variants for integrating mechanical ele- ments with circuitry. This book focuses on the segment of the process flow between a bare wafer and an undiced wafer with fabricated devices. However, general understanding about the packaging schemes is important for a MEMS developer. wafer die dicing chip FIGURE 2.3 package A process illustrating (module) the process from a wafer to die to package circuit and to the circuit board. board M02_CHAN2240_02_PIE_C02.qxd 2/25/11 3:30 PM Page 51 2.2 Essential Overview of Frequently Used Microfabrication Processes 51 touch screen keys track-ball one ph rt a m s battery on board computer circuit and other ICs board camera MEMS lens microphone package discrete circuit elements package mechanical electrical bonding casing elements elements wire package metal external FIGURE 2.4 wire leads wire wafer leads Diagram showing the interior elements of a doped smart phone, a pack- circuit semi- conductor aged sensor chip, and board regions interior components of the chip package.
Load more

Recommended publications
  • Life Cycle Analysis of High-Performance Monocrystalline Silicon Photovoltaic Systems: Energy Payback Times and Net Energy Production Value
    27th European Photovoltaic Solar Energy Conference and Exhibition LIFE CYCLE ANALYSIS OF HIGH-PERFORMANCE MONOCRYSTALLINE SILICON PHOTOVOLTAIC SYSTEMS: ENERGY PAYBACK TIMES AND NET ENERGY PRODUCTION VALUE Vasilis Fthenakis1,2, Rick Betita2, Mark Shields3, Rob Vinje3, Julie Blunden3 1 Brookhaven National Laboratory, Upton, NY, USA, tel. 631-344-2830, fax. 631-344-3957, [email protected] 2Center for Life Cycle Analysis, Columbia University, New York, NY 10027, USA 3SunPower Corporation, San Jose, CA, USA ABSTRACT: This paper summarizes a comprehensive life cycle analysis based on actual process data from the manufacturing of Sunpower 20.1% efficient modules in the Philippines and other countries. Higher efficiencies are produced by innovative cell designs and material and energy inventories that are different from those in the production of average crystalline silicon panels. On the other hand, higher efficiencies result to lower system environmental footprints as the system area on a kW basis is smaller. It was found that high efficiencies result to a net gain in environmental metrics (i.e., Energy Payback Times, GHG emissions) in comparison to average efficiency c-Si modules. The EPBT for the Sunpower modules produced in the Philippines and installed in average US or South European insolation is only 1.4 years, whereas the lowest EPBT from average efficiency c-Si systems is ~1.7 yrs. To capture the advantage of high performance systems beyond their Energy Payback Times, we introduced the metric of Net Energy Production Value (NEPV), which shows the solar electricity production after the system has “paid-off” the energy used in its life-cycle. The SunPower modules are shown to produce 45% more electricity than average efficiency (i.e., 14%) c-Si PV modules.
    [Show full text]
  • New Challenges and Possibilities for Silicon Based Solar Cells
    1 New challenges and possibilities for silicon based solar cells Marisa Di Sabatino Dept of Materials Science and Engineering NTNU 2 Outline -What is a solar cell? -How does it work? -Silicon based solar cells manufacturing -Challenges and Possibilities -Concluding remarks 3 What is a solar cell? • It is a device that converts the energy of the sunlight directly into electricity. CB PHOTON Eph=hc/λ VB Electron-hole pair 4 How does a solar cell work? 5 How does a solar cell work? Current Semiconductor Eg + - P-n junction Metallic contacts Turid Worren Reenaas 6 How does a solar cell work? - Charge generation (electron-hole pairs) - Charge separation (electric field) - Charge transport 7 - Charge generation (electron-hole pairs) - Charge separation (electric field) - Charge transport Eph>>Eg Eph<<Eg Eph>Eg Eg CB Eph VB 8 - Charge generation (electron-hole pairs) - Charge separation (electric field) - Charge transport p-type C - - - - Fermi level - + + + + + n-type n-p junction v + - Electric field 9 - Charge generation (electron-hole pairs) - Charge separation (electric field) - Charge transport Back and front side of a silicon solar cell 10 Semiconductors Materials for solar cells 11 Why Silicon? Silicon: abundant, cheap, well-known technology 12 Silicon solar cell value chain 13 Silicon solar cells value chain From sand to solar cells… Raw Materials Efficiency Crystallization Isc, Voc, FF Feedstock Solar cell process Photo: Melinda Gaal 14 Multicrystalline silicon solar cells Directional solidification 15 Monocrystalline silicon solar cells Czochralski process 16 Crystallization methods for PV silicon • Multicrystalline silicon ingots: – Lower cost than monocrystalline – More defects (dislocations and impurities) • Monocrystalline silicon ingots: – Higher cost and lower yield – Oxygen related defects – Structure loss 17 Czochralski PV single crystal growth • Dominating process for single crystals • Both p (B-doped) and n (P-doped) type crystals • Growth rate 60 mm/h Challenges: •Productivity low due to slow growth, long cycle time..
    [Show full text]
  • 15Th Workshop on Crystalline Silicon Solar Cells and Modules: Materials and Processes
    A national laboratory of the U.S. Department of Energy Office of Energy Efficiency & Renewable Energy National Renewable Energy Laboratory Innovation for Our Energy Future th Proceedings 15 Workshop on Crystalline NREL/BK-520-38573 Silicon Solar Cells and Modules: November 2005 Materials and Processes Extended Abstracts and Papers Workshop Chairman/Editor: B.L. Sopori Program Committee: M. Al-Jassim, J. Kalejs, J. Rand, T. Saitoh, R. Sinton, M. Stavola, R. Swanson, T. Tan, E. Weber, J. Werner, and B. Sopori Vail Cascade Resort Vail, Colorado August 7–10, 2005 NREL is operated by Midwest Research Institute ● Battelle Contract No. DE-AC36-99-GO10337 th Proceedings 15 Workshop on Crystalline NREL/BK-520-38573 Silicon Solar Cells and Modules: November 2005 Materials and Processes Extended Abstracts and Papers Workshop Chairman/Editor: B.L. Sopori Program Committee: M. Al-Jassim, J. Kalejs, J. Rand, T. Saitoh, R. Sinton, M. Stavola, R. Swanson, T. Tan, E. Weber, J. Werner, and B. Sopori Vail Cascade Resort Vail, Colorado August 7–10, 2005 Prepared under Task No. WO97G400 National Renewable Energy Laboratory 1617 Cole Boulevard, Golden, Colorado 80401-3393 303-275-3000 • www.nrel.gov Operated for the U.S. Department of Energy Office of Energy Efficiency and Renewable Energy by Midwest Research Institute • Battelle Contract No. DE-AC36-99-GO10337 NOTICE This report was prepared as an account of work sponsored by an agency of the United States government. Neither the United States government nor any agency thereof, nor any of their employees, makes any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any information, apparatus, product, or `process disclosed, or represents that its use would not infringe privately owned rights.
    [Show full text]
  • MEMS Technology for Physiologically Integrated Devices
    A BioMEMS Review: MEMS Technology for Physiologically Integrated Devices AMY C. RICHARDS GRAYSON, REBECCA S. SHAWGO, AUDREY M. JOHNSON, NOLAN T. FLYNN, YAWEN LI, MICHAEL J. CIMA, AND ROBERT LANGER Invited Paper MEMS devices are manufactured using similar microfabrica- I. INTRODUCTION tion techniques as those used to create integrated circuits. They often, however, have moving components that allow physical Microelectromechanical systems (MEMS) devices are or analytical functions to be performed by the device. Although manufactured using similar microfabrication techniques as MEMS can be aseptically fabricated and hermetically sealed, those used to create integrated circuits. They often have biocompatibility of the component materials is a key issue for moving components that allow a physical or analytical MEMS used in vivo. Interest in MEMS for biological applications function to be performed by the device in addition to (BioMEMS) is growing rapidly, with opportunities in areas such as biosensors, pacemakers, immunoisolation capsules, and drug their electrical functions. Microfabrication of silicon-based delivery. The key to many of these applications lies in the lever- structures is usually achieved by repeating sequences of aging of features unique to MEMS (for example, analyte sensitivity, photolithography, etching, and deposition steps in order to electrical responsiveness, temporal control, and feature sizes produce the desired configuration of features, such as traces similar to cells and organelles) for maximum impact. In this paper, (thin metal wires), vias (interlayer connections), reservoirs, we focus on how the biological integration of MEMS and other valves, or membranes, in a layer-by-layer fashion. The implantable devices can be improved through the application of microfabrication technology and concepts.
    [Show full text]
  • Research Into Fabrication and Popularization of Organic Thin Film Solar Cells, Chemical Engineering Transactions, 55, 25-30 DOI:10.3303/CET1655005 26
    25 A publication of CHEMICAL ENGINEERING TRANSACTIONS VOL. 55, 2016 The Italian Association of Chemical Engineering Online at www.aidic.it/cet Guest Editors: Tichun Wang, Hongyang Zhang, Lei Tian Copyright © 2016, AIDIC Servizi S.r.l., ISBN 978-88-95608-46-4; ISSN 2283-9216 DOI: 10.3303/CET1655005 Research into Fabrication and Popularization of Organic Thin Film Solar Cells Bin Zhang*a, Yan Lia, Shanlin Qiaob, Le Lic, Zhanwen Wanga a Hebei Chemical & Pharmaceutical College, No. 88 Fangxing Road, Shijiazhuang, Hebei Province, China; b Qingdao Institute of Bioenergy and Bioprocess Technology, Chinese Academy of Sciences, No. 189 Songling Road, Qingdao, Shandong Province, China c Shijiazhuang Naienph Chemical Technology Co., Ltd, No. 12 Shifang Road, Shijiazhuang, Hebei Province, China. [email protected] An analysis was conducted herein on the research status of several popular solar cells at the present stage, including silicon solar cell, thin film photovoltaic cell, and dye-sensitized solar cell (DSSC). In doing so, we concluded that the current situations provide a favorable objective environment for the popularization of organic thin film solar cells. Finally, we reviewed the merits and demerits of the organic thin film solar cell together with the major research focus on and progress of it, and summarized obstacles to and development trails of the popularization of organic thin film solar cells. 1. Introduction As the energy crisis further deepens in the 21st century, the existing development level for solar cells has already failed to satisfy increasing social demands for energy. This phenomenon is mainly reflected in the costly high-purity silicon solar panels, in the defects at new amorphous silicon (a-Si) during energy conversion, and in the limited theoretical energy conversion efficiency (around 25%) of silicon solar panels as well.
    [Show full text]
  • SUMCO Products That Support Our Lives
    SUMCO Products that Support Our Lives SUMCO manufactures silicon wafers, a key material in semiconductor devices. Semiconductor devices that use SUMCO’s silicon Trains, Bullet Trains Devices called power semiconductors are Medical Equipments In the medical field, medical equipment has wafers support our lives in a variety of ways, from electronic devices around us such as mobile phones, computers, smartphones used to control electric power. These devices continued to evolve, with the advent of high- and digital appliances to automobiles, medical equipment, industrial machinery control units, as well as the control of public are technically complex and require reliable precision diagnostic imaging equipment and transportation and infrastructure. control of large amounts of power and power surgery robots capable of precise control. saving performance, making this a specialized A large number of silicon wafers are used field. in these medical devices, and the silicon Power supply control for heavy electric wafers that serve as their substrates require machinery, in particular, such as electric trains high reliability, especially as human lives are that use power of over 1000V, requires special involved. SUMCO’s silicon wafers contribute to know-how for the silicon wafers, as well. the advance of medicine. Automobiles Numerous semiconductor devices Data Centers With smartphones and computers are at work inside motor vehicles. An (Server Rooms) becoming increasingly sophisticated, extremely high level of quality and vast quantities of data in the form of Power Generation reliability is required for silicon wafers high-quality photographs and vid- Smart Card Devices Facilities and Public to be used for motor control in electric eos are being processed in the cloud vehicles (EV) and hybrid vehicles (HV/ and stored in data centers.
    [Show full text]
  • Design of a Microelectronic Manufacturing Laboratory
    2006-1635: DESIGN OF A MICROELECTRONIC MANUFACTURING LABORATORY Stilson Applin, Montana State University Todd Kaiser, Montana State University Page 11.407.1 Page © American Society for Engineering Education, 2006 Design of a Microelectronic Manufacturing Laboratory Abstract The design of an undergraduate microelectronic manufacturing laboratory for teaching will be described in the following paper. This laboratory emphasizes learning the processes of semiconductor manufacturing and clean room protocol. The laboratory is housed in a 500 square foot, class 10,000 facility. In the laboratory the students, with a junior standing and a science based background, will use a pre-made six mask set to create P and N type transistors as well as inverters and diodes. The students will be conducting oxidization, RCA clean, photolithography, etching, diffusion, metallization and other processes. A brief description of these processes and the methods used to teach them will also be described. In addition to these processes students will also learn about clean room protocol, chemical safety, and testing devices. All of these skills will be marketable to future employers and graduate schools. These same skills and processes will be covered in a seminar course for educators, with the main purpose of inspiring the high school teachers to teach about semiconductor manufacturing. The cost effective design is what makes the laboratory unique. The expenditure control is important due to the size of the Electrical Engineering department. The department has only 250 undergraduates and 40 graduate students, thus internal funding is difficult to obtain. A user fee paid by the students will cover the funding. This fee will be small and manageable for any college student.
    [Show full text]
  • Advanced Solar Technology Sample
    ADVANCED SOLAR TECHNOLOGY SAMPLE TECHNOLOGY ACQUISITION REPORT CONTENTS Technology 1: Microsystems Enabled Photovoltaics (MEPV) - Photovoltaic solar concentrator ............... 4 Technology 2: Method and apparatus for integrating an infrared (ir) photovoltaic cell on a thin film photovoltaic cell ............................................................................................................................................ 7 Technology 3: Photovoltaic cells with quantum dots with built-in-charge and methods of making same 10 Technology 4: Super-transparent electodes for photovoltaic applications ................................................. 13 Technology 5: Optical concentrator and associated photovoltaic devices ................................................. 15 Technology 6: Hybrid photovoltaic devices and applications thereof ........................................................ 18 Technology 7: Methods of manufacturing photovoltaic electrodes ............................................................ 20 Technology 8: Thin film photovoltaic cell structure, nanoantenna, and method for manufacturing ......... 23 Technology 9: Apparatuses, systems and methods for cleaning photovoltaic devices .............................. 26 Technology 10: Photovoltaic structures having a light scattering Interface layer and methods of making the same ....................................................................................................................................................... 28 Technology 11: Rapid thermal
    [Show full text]
  • A Review of Current Methods in Microfluidic Device Fabrication And
    inventions Review A Review of Current Methods in Microfluidic Device Fabrication and Future Commercialization Prospects Bruce K. Gale * ID , Alexander R. Jafek ID , Christopher J. Lambert ID , Brady L. Goenner, Hossein Moghimifam, Ugochukwu C. Nze ID and Suraj Kumar Kamarapu ID Department of Mechanical Engineering, University of Utah, Salt Lake City, UT 84112, USA; [email protected] (A.R.J.); [email protected] (C.J.L.); [email protected] (B.L.G.); [email protected] (H.M.); [email protected] (U.C.N.); [email protected] (S.K.K.) * Correspondence: [email protected]; Tel.: +1-801-585-5944 Received: 30 June 2018; Accepted: 20 August 2018; Published: 28 August 2018 Abstract: Microfluidic devices currently play an important role in many biological, chemical, and engineering applications, and there are many ways to fabricate the necessary channel and feature dimensions. In this review, we provide an overview of microfabrication techniques that are relevant to both research and commercial use. A special emphasis on both the most practical and the recently developed methods for microfluidic device fabrication is applied, and it leads us to specifically address laminate, molding, 3D printing, and high resolution nanofabrication techniques. The methods are compared for their relative costs and benefits, with special attention paid to the commercialization prospects of the various technologies. Keywords: microfabrication; nanofabrication; microfluidics; nanofluidics; 3D printing; laminates; molding 1. Introduction Microfluidics is a growing field of research which pertains to the manipulation of fluids on the microscale level, and it is identified most commonly by devices with critical dimensions of less than 1 mm.
    [Show full text]
  • A New Slicing Method of Monocrystalline Silicon Ingot by Wire EDM
    cf~ Paper International Journal of Electrical Machining, No. 8, January 2003 A New Slicing Method of Monocrystalline Silicon Ingot by Wire EDM Akira OKADA *, Yoshiyuki UNO *, Yasuhiro OKAMOTO*, Hisashi ITOH* and Tameyoshi HlRANO** (Received May 28, 2002) * Department of Mechanical Engineering, Okayama University, Okayama 700-8530, Japan ** Toyo Advanced Technologies Co., Ltd., Hiroshima 734-8501, Japan Abstract Monocrystalline silicon is one of the most important materials in the semiconductor industry because of its many excellent properties as a semiconductor. In the manufacturing process of silicon wafers, inner diameter(lD) blade and multi wire saw have conventionally been used for slicing silicon ingots. However, some problems in efficiency, accuracy, slurry treatment and contamination are experienced when applying this method to large­ scale wafers of 12 or 16 inch diameter expected to be used in the near future. Thus, the improvement of conventional methods or a new slicing method is strongly required. In this study, the possibility of slicing a silicon ingot by wire EDM was discussed and the machining properties were experimentally investigated. A silicon wafer used as substrate for epitaxial film growth has low resistivity in the order of 0.01 g .cm, which makes it possible to cut silicon ingots by wire EDM. It was clarified that the new wire EDM has potential for application as a new slicing method, and that the surface roughness using this method is as small as that using the conventional multi wire saw method. Moreover, it was pointed out that the contamination due to the adhesion and diffusion of wire electrode material into the machined surface can be reduced by wire EDM under the condition of low current and long discharge duration.
    [Show full text]
  • A Study on the Countermeasures and Suggestions of Technology
    4th International Education, Economics, Social Science, Arts, Sports and Management Engineering Conference (IEESASM 2016) A Study on the Countermeasures and Suggestions of Technology Transfer in the Solar Cells Industry in China Lvcheng Lia, Guoping Chengb School of Management, Wuhan University of Technology, Wuhan 430070, China [email protected], [email protected] Keywords: solar cells; technology transfer; countermeasures and suggestions Abstract. This paper analyzes the development and industrialization of solar cells of three generations: mono-crystalline silicon and polycrystalline silicon solar cell, thin-film solar cell and nanocrystalline solar cell. It is believed that technology transfer and university-industry collaboration play important roles in the solar cells industry; and put forward reasonable suggestions for improvements from the aspects of financial subsidies, intellectual property, risk compensation system, technology transfer intermediary and cultivation of talents. 1. Introduction New energy technology is one of the most important topics for human's development in the 21st century. The traditional energy sources such as oil and natural gas, have some serious problems like pollution and storage, which cannot satisfy the requirements of human beings and conflict with the sustainable development. As an important component of new energy, solar energy exhibits the advantages of low carbon emission, clean production, flexibility and renewability, which is ideal to be applied as a new alternative energy and has become the focus of the scientific community and industry. Presently, the solar cells have already been used in national defense, communications, computers, transportation and many other fields. Due to China's unique geographical advantages, to develop the solar energy is the trend of the time.
    [Show full text]
  • Microfabrication and Microfluidics for 3D Brain-On-Chip
    Microfabrication and microfluidics for 3D brain-on-chip Bart Schurink Microfabrication and microfluidics for 3D brain-on-chip Bart Schurink i Members of the committee: Chairman Prof. dr. ir. J.M.W. Hilgenkamp (voorzitter) Universiteit Twente Promotor Prof. dr. J.G.E. Gardeniers Universiteit Twente Co-promotor/supervisor Dr. R. Luttge Universiteit Eindhoven Members Prof. dr. J.C.T. Eijkel University of Twente Prof. dr. H.B.J. Karperien University of Twente Prof. dr. A.S. Holmes Imperial College London Prof. dr. ir. J.M.J. den Toonder Technical University of Eindhoven Prof. dr. ir. R. Dekker Delft University of Technology The work in this thesis was carried out in the Mesoscale Chemical Systems group and MESA+ Institute for Nanotechnology, University of Twente. It is part of the MESOTAS project financially supported by ERC, Starting Grant no. 280281 Title: Microfabrication and microfluidics for 3D brain-on-chip Author: Bart Schurink ISBN: 978-90-365-4142-8 DOI: 10.3990/1.9789036541428 Publisher: Gildeprint, Enschede, The Netherlands Copyright © 2016 by Bart Schurink, Enschede, The Netherlands. No part of the this book may be copied, photocopied, reproduced, translated or reduced to any electronic medium or machine-readable form, in whole or in part, without specific permission of the author. ii Microfabrication and microfluidics for 3D brain-on-chip PROEFSCHRIFT ter verkrijging van de graad van doctor aan de Universiteit Twente, op gezag van de rector magnificus, Prof. dr. H. Brinksma, volgens besluit van het College voor Promoties in het openbaar te verdedigen op donderdag 23 juni 2016 door Bart Schurink Geboren op 6 november 1982 te Oldenzaal, Nederland iii Dit proefschrift is goedgekeurd door de promotor: Prof.
    [Show full text]