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Y86 Programming 10/28/2019 Outline Chapter 4 Introduction to assembly programing Processor Architecture: Y86 Introduction to Y86 Y86 instructions, encoding and execution (Sections 4.1 & 4.3) with material from Dr. Bin Ren, College of William & Mary 1 2 Assembly Assembly Operations Perform arithmetic function on register or memory data The CPU uses machine language to perform all its operations Transfer data between memory and register Machine code (pure numbers) is generated by translating each . Load data from memory into register (read) instruction into binary numbers that the CPU uses . Store register data into memory (write) This process is called "assembling"; conversely, we can take Transfer control assembled code and disassemble it into (mostly) human . Unconditional jumps to/from procedures (calls) readable assembly language . Conditional branches (if, switch, for, while, etc) Assembly is a much more readable translation of machine language, and it is what we work with if we need to see what the computer is doing There are many different kinds of assembly languages; we'll focus on the Y86/IA32 language as defined in the text and on our system (also SPARC and MIPS) 3 4 ISA – Instruction Set Architecture ISA-More explanations ISA – instruction set architecture . Format and behavior of a machine level program . Defines . The processor state (see the CPU fetch-execute cycle) . The format of the instructions . The effect of each of these instructions on the state . Abstractions . Instruction executed “in sequence” – Technically defined to be completing one instruction before starting the next – Pipelining – Concurrent execution (but not really) . Memory addresses are virtual addresses – Very large byte-addressable array – Address space managed by the OS (virtual physical) – Contains both executable code of the program AND its data » Run-time stack » Block of memory for user (global and heap) 5 6 1 10/28/2019 Generic Instruction Cycle Hardware abstractions An instruction cycle is the basic operation cycle of a computer. It is the process by which a computer retrieves a Program Counter (PC) . Register %eip (X86) program instruction from its memory, determines what . Address in memory of the next instruction to be executed actions the instruction requires, and carries out those Integer Register File actions. This cycle is repeated continuously by the central . Contains eight named locations for storing 32-bit values processing unit (CPU), from bootup to when the computer . Can hold addresses (C pointers) or integer data . Have other special duties is shut down. Floating point registers Condition Code registers 1. Fetching the instruction . Hold status information . About arithmetic or logical instruction executed 2. Decode the instruction – CF (carry flag) 3. Memory and addressing issues – OF (overflow flag) – SF (sign flag) 4. Execute the instruction – ZF (zero flag) Memory 7 8 Machine instruction example Outline C code Introduction to assembly programing . Add two signed integers int t = x + y; Introduction to Y86 Assembly Y86 instructions, encoding and execution . Add 2 4-byte integers addl 8(%ebp),%eax Operands . X: register %eax . Y: memory M[%ebp+8] . T: register %eax . Return function value in %eax Object code 03 45 08 . 3 byte instruction . Stored at address: 0x???????? 9 10 Y86: A Simpler Instruction Set Y86 abstractions IA32 has a lot more instructions The Y86 has IA32 has a lot of quirks . 8 32-bit registers with the same names as the IA32 32-bit registers Y86 is a subset of IA32 instructions . 3 condition codes: ZF, SF, OF Y86 has a simpler encoding scheme than IA32 . no carry flag Y86 is easier . interprets integers as signed . to reason about hardware . a program counter (PC) . first-time programming in assembly language . a program status byte: AOK, HLT, ADR, INS . memory: up to 4 GB to hold program and data The Y86 does not have . floating point registers or instructions http://voices.yahoo.com/the-y86-processor-simulator-770435.html?cat=15 http://y86tutoring.wordpress.com/ 11 12 2 10/28/2019 Y86 Memory and Stack yis and yas and the Y86 Simulator check on high address 1. A huge array of bytes; . how to set up $PATH Y86 Stack 2. Set the bottom of the stack far . how to connect Linux with X display enough away from the code; 3. The location of your code should add the following variables to $PATH always start from 0x0. /home/bren/Software/sim/misc . /home/bren/Software/sim/pipe How to set up the starting point of stack and code? . /home/bren/Software/sim/seq directive: .pos address-in-hex otherwise, use absolute path . /home/bren/Software/sim/misc/yas Y86 Code . /home/bren/Software/sim/misc/yis low address example code was assembled during the build process and is in /home/bren/Software/sim/y86-code 13 14 YIS and YAS and the Y86 Simulator Run Y86 program how to assemble and run code irmovl $55,%edx % yas y86prog1.ys . % yas prog.ys rrmovl %edx, %ebx % yis y86prog1.yo irmovl Array, %eax Stopped in 6 steps at PC = 0x1a. assembles program rmmovl %ebx,4(%eax) Status 'HLT' . creates *.yo file mrmovl 0(%eax),%ecx CC Z=1 S=0 O=0 halt Changes to registers: . % yis prog.yo %eax: 0x00000000 0x0000001c %ecx: 0x00000000 0x0000006f . instruction set simulator – gives output and changes .align 4 Array: %edx: 0x00000000 0x00000037 – changes shown as original value/new value pairs .long 0x6f %ebx: 0x00000000 0x00000037 .long 0x84 . % ssim -g prog.yo & Changes to memory: . graphical simulator y86prog1.ys 0x0020: 0x00000084 0x00000037 . SimGuide: http://csapp.cs.cmu.edu/public/simguide.pdf 15 16 Y86 Simulator program code Y86 Simulator displays . contents of memory . processor state . fetch-execute loop . register file . status . condition codes 17 18 3 10/28/2019 Y86 Notes Y86 Notes Y86 is an assembly language instruction set Y86 features . simpler than but similar to IA32 . 8 32-bit registers with the same names as the IA32 32-bit registers . but not as compact (as we will see) . different names from those in text, such as %rax, which are 64-bit . F indicates no register Y86 features . 3 condition codes: ZF, SF, OF . 8 32-bit registers with the same names as the IA32 32-bit registers . a program counter (PC) . 3 condition codes: ZF, SF, OF . a program status byte: AOK, HLT, ADR, INS . no carry flag - interpret integers as signed . memory: up to 4 GB to hold program and data . a program counter (PC) . holds the address of the instruction currently being executed RF: Program registers CC: Condition Stat: Program Status codes . a program status byte: AOK, HLT, ADR, INS 0 % eax 6 % esi ZF SF OF 1 7 . state of program execution %ecx %edi DMEM: Memory PC . memory: up to 4 GB to hold program and data 2 % edx 4 % esp 3 % ebx 5 % ebp 19 20 Outline Learning Y86 Assembler Directives Introduction to assembly programing Status conditions and Exceptions Introduction to Y86 Instructions Y86 instructions, encoding and execution . Operations . Branches . Moves Addressing Modes Stack Operations Subroutine Call/Return How to encode and execute each instruction 21 22 Y86 Assembler Directives Status Conditions 23 24 4 10/28/2019 Y86 Exceptions Y86 Exceptions What happens when an invalid assembly instruction is found? What are some possible causes of exceptions? . how would this happen? . invalid operation . generates an exception . divide by 0 . sqrt of negative number In Y86 an exception halts the machine . memory access error (address too large) . stops executing . hardware error . on a real system, this would be handled by the OS and only the current process would be terminated Y86 handles 3 types of exceptions: . HLT instruction executed . invalid address encountered . invalid instruction encountered . in each case, the status is set 25 26 Y86 Instructions Y86 Instructions format Each accesses and modifies some part(s) of the program . 1–6 bytes of information read from memory state . Can determine the type of instruction from first byte . Can determine instruction length from first byte largely a subset of the IA32 instruction set . Not as many instruction types . includes only 4-byte integer operations “word” . Simpler encoding than with IA32 . has fewer addressing modes . smaller set of operations registers . rA or rB represent one of the registers (0-7) . 0xF denotes no register (when needed) . no partial register options (must be a byte) 27 28 Move Operation Move Operation different opcodes for 4 types of moves . register to register (opcode = 2) . notice conditional move has opcode 2 as well . immediate to register (opcode = 3) . register to memory (opcode = 4) . memory to register (opcode = 5) 29 30 5 10/28/2019 Move Operation Supported Arithmetic Operations the only memory addressing mode is base register + displacement OP1 (opcode = 6) # y86cc.ys memory operations always move 4 bytes (no byte or word . only takes registers as operands .pos 0x0 . only work on 32 bits irmovl $1, %eax memory operations, i.e., no 8/16-bit move) irmovl $0, %ebx . note: no “or” and “not” ops source or destination of memory move must be a register irmovl $1, %ecx . only instructions to set CC addl %eax, %eax andl %ebx, %ebx . starting point ZF=1, SF=0, OF=0 subl %eax, %ecx irmovl $0x7fffffff, %edx addl %edx, %edx arithmetic instructions halt . addl rA, rB R[rB] ← R[rB] + R[rA] . subl rA, rB R[rB] ← R[rB] − R[rA] . andl rA, rB R[rB] ← R[rB] & R[rA] . xorl rA, rB R[rB] ← R[rB] ^ R[rA] CORRECTION = F 31 32 Jump Instructions Jump Instruction Types jump instructions (opcode = 7) Unconditional jumps What about checking OF? . fn = 0 for unconditional jump . jmp Dest PC ← Dest . fn =1-6 for <= < = != >= > Conditional jumps . refer to generically as jXX . jle Dest PC ← Dest if last result ≤ 0 .
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