ECE317 : Feedback and Control

Lecture : Design using Bode plots, compensation

Dr. Richard Tymerski Dept. of Electrical and Computer Engineering Portland State University

1 Course roadmap Modeling Analysis Design Laplace transform Stability Design specs • Pole locations Transfer function • Routh-Hurwitz Frequency domain Block Diagram Time response Linearization Bode plot • Transient • Steady state (error) Models for systems Compensation • electrical Frequency response • mechanical Design examples • Bode plot • example system

Matlab & PECS simulations & laboratories

2 Notes on Bode plot (review)

• Advantages • Without computer, Bode plot can be sketched easily by using straight-line approximations. • GM, PM, crossover frequencies are easily determined on Bode plot. • Controller design on Bode plot is simple.

3 Compensators

4 Application to the lab:

5 Uncompensated System Loop Gain, T(s):

6 Uncompensated System Loop Gain, T(s):

Example used here:

7 Uncompensated System Asymptotic Bode plot:

Phase margin = 0∘ ⇒ compensator is needed

8 Lead Compensation

Asymptotic Bode plot:

9 Lead Compensation • The basic idea of using a lead compensator is to provide a phase boost at the unity gain crossover frequency • Will extend bandwidth (i.e. unity gain crossover frequency) while also providing phase boost • Maximum phase boost occurs at:

• Set f to the new crossover frequency:

10 Lead Compensation Lead compensator transfer function:

Lead Compensated Loop Gain:

11 Lead Compensation Combining:

12 Lead Compensation

Focusing around 푓푐:

Phase margin:

13 Lead Compensation

Set the unity gain frequency, 푓푐:

Found 휔푧 and 휔푝, will next find 퐺퐶표

14 Lead Compensation

Finding 퐺퐶표: • Focus on magnitude response

15 Lead Compensation Bode asymptotic magnitude response review:

Given a magnitude of A at a frequency 푓퐴, the magnitude expression for a line sloping at:

-20dB/dec 1) -20 dB/dec:

2) -40 dB/dec:

-40dB/dec 16 Lead Compensation

Finding 퐺퐶표:

푓푐 @ 푓푧 magnitude is: 푓푧 1 0dB -20dB/dec

2 푓표 @ 푓푧 magnitude is: ToGc -40dB/dec o 푓푧

1 0dB -20dB/dec 17 Lead Compensation

Finding 퐺퐶표: • Equating the two expressions for the magnitude at 푓푧 :

At 푓푧:

• All quantities on the right are known, so

we can solve for 퐺퐶표 18 Lead Compensation

Finding 퐺퐶표:

퐺푐표 = 3.4

Design of lead compensator is complete

19 Lead Compensation Exact loop gain using Matlab :

Phase margin = 55.9∘ 20 Lead Compensation Time response to input voltage change using PECS:

Non-zero steady state error

Need a different compensator to null SS error 21 New Compensator: Dominant Pole with Lead Compensation Given the following magnitude response, what is the transfer function?:

-20dB/dec

Answer: 1) The low frequency asymptote is that of a pole at zero where 휔 the magnitude at 푓 is A  A 퐴 퐴 푠 푠 2) This is followed by a zero at 푓퐴: 1 + 휔퐴 휔 푠 3) Combining results in transfer function: A 퐴 1 + 푠 휔퐴 22 Dominant Pole with Lead Compensation

Added low frequency compensation: Combining: 1) Set 푓퐴 (where 푓퐴 ≤ 푓표) 2) Adjust A to match low frequency -20dB/dec magnitude 푇 퐺 표 푐표 lead + Lead compensated system: -20dB/dec

-40dB/dec -40dB/dec

1 0dB

1 0dB -20dB/dec -20dB/dec

23 Dominant Pole with Lead Compensation

Compensated loop gain:

24 Dominant Pole with Lead Compensation

At frequency 휔퐴 the magnitude of the compensated loop gain is given by:

This should equal the low frequency gain of the lead compensated loop gain:

25 Dominant Pole with Lead Compensation

휔퐴 = 2휋푓퐴. How to choose 푓퐴?

푓 Answer: 푓 ≤ 푓 and 푓 ≤ 푐 so 퐴 0 퐴 10 as to maximize phase lead at 푓푐 from the zero at 푓퐴. -20dB/dec Note: There are disadvantages -40dB/dec in making 푓퐴 too low (as shown in the next few slides)

1 0dB -20dB/dec

26 Dominant Pole with Lead Compensation Compensator transfer function:

Four parameters needed to be determined: 휔푧, 휔푝, 휔퐴, and 휔퐼

Design of Dominant Pole with Lead Compensator is now complete

• Let’s look closer at the how to choose 휔퐴 (which also changes the value of 휔퐼)

27 Dominant Pole with Lead Compensation Phase response of lead compensated loop gain combined with low frequency compensation with 푓 푓 = 푐 : 퐴 10

Note: 푓퐴 is denoted as 푓1 in the figure along side (and in subsequent figures)

28 Dominant Pole with Lead Compensation Asymptotic Bode plot for compensated loop gain 푓 (푓 = 푐 ) : 퐴 10

Note: 푓퐴 is denoted as 푓1 in the figure along side

29 Dominant Pole with Lead Compensation 푓 Exact Bode plot for compensated loop gain (푓 = 푐 ) : 퐴 10

Phase margin = 50.5∘ 30 Dominant Pole with Lead Compensation Associated time response to input voltage change:

Settling time ≈ 1 ms

31 Dominant Pole with Lead Compensation Phase response of lead compensated loop gain combined with low frequency compensation with 푓 푓 = 푐 : 퐴 33

Note: 푓퐴 is denoted as 푓1 in the figure along side

32 Dominant Pole with Lead Compensation Asymptotic Bode plot for compensated loop gain 푓 (푓 = 푐 ) : 퐴 33

Note: 푓퐴 is denoted as 푓1 in the figure along side

33 Dominant Pole with Lead Compensation 푓 Exact Bode plot for compensated loop gain (푓 = 푐 ) : 퐴 33

Phase margin = 54.3∘ 34 Dominant Pole with Lead Compensation Associated time response to input voltage change:

Settling time ≈ 4 ms Slower settling time The first design is better 35 Summary • Looked closely at the design of two compensators i) lead ii) dominant pole (integrator) with lead • Derived the formulas needed to design, not just used available formulas • Lead compensator: extends bandwidth while boosting the phase which can result in quick response with a good phase margin (minimal overshoot) • dominant pole with lead compensator: has the properties of the lead compensator together with an integrator which provides zero steady state error • Next, frequency domain specifications

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