Twitter Heron with Infiniband and Omni-Path

Total Page:16

File Type:pdf, Size:1020Kb

Twitter Heron with Infiniband and Omni-Path Low Latency Stream Processing: Twitter Heron with Infiniband and Omni-Path Supun Kamburugamuve1 Karthik Ramasamy2, Martin Swany1 and Geoffrey Fox1 1School of Informatics and Computing, Indiana University Bloomington 2Twitter Inc. Submission Type: Research Abstract performance interconnects feature microsecond latencies and large bandwidths. Thanks to recent advancements Worldwide data production is increasing both in volume in hardware, some of these high performance networks and velocity, and with this acceleration, data needs to be have become cheaper to set up than their Ethernet coun- processed in streaming settings as opposed to the tradi- terparts. With multi-core and many-core systems having tional store and process model. Distributed streaming large numbers of CPUs in a single node, the demand for frameworks are designed to process such data in real time high performance networking is increasing exponentially with reasonable time constraints. Twitter Heron is a pro- as well. duction ready large scale distributed stream processing There are many distributed streaming frameworks framework developed at Twitter. In order to scale stream- available today for processing large amounts of streaming ing applications to large numbers of nodes, the network data in real time. Such systems are largely designed and is of utmost importance. High performance computing optimized for commodity hardware and clouds. Apache (HPC) clusters feature interconnects that can perform at Storm [1] was one of the most popular early systems de- higher levels than traditional Ethernet. In this work the veloped for processing streaming data. Twitter Heron [2] authors present their findings on integrating Twitter Heron is a next-generation version of Storm with an improved distributed stream processing system with two high per- architecture for large-scale data processing. It features a formance interconnects; Infiniband and Intel Omni-Path. hybrid design with some of the performance-critical parts written in C++ and others written in Java. This architec- ture allows the integration of high performance enhance- 1 Introduction ments naively rather than going through native wrappers such as JNI. This work take advantage of these architec- With ever increasing data production by users and ma- tural enhancements to integrate high performance inter- chines alike, the amount of data that needs to be processed connects naively to Heron to accelerate its communica- has increased dramatically. This must be achieved both in tions. real time and as batches to satisfy different use cases. Ad- Advanced hardware features are seldom used in the Big ditionally, with the adoption of devices into Internet of Data computing frameworks, mostly because they are ac- Things setups, the amount of real time data are exploding, cessible only to low level programming languages and and must be processed with reasonable time constraints. most Big Data systems are written on Java platform. In- In real time distributed stream analytics, the large data finiband [3] is an open standard protocol for high perfor- streams are partitioned and processed in distributed sets of mance interconnects that is widely used in today’s high machines to keep up with the high volume data rates. By performance clusters. Omni-Path [4] is a proprietary in- definition of large-scale streaming data processing, net- terconnect developed by Intel and is available with the works are a crucial component in transmitting messages latest Knights Landing architecture-based many-core pro- between the processing units for achieving efficient data cessors. processing. In this work the authors explore how to leverage these High performance computing (HPC) clusters are de- hardware features in the context of distributed streaming signed to perform large computations with advanced pro- framework Twitter Heron. In particular the authors show cessors, memory, IO systems and high performance inter- how they leveraged the Infiniband and Intel Omni-Path connects. For efficient parallel computations at very large communications to improve the latency of the system. scale, the network between the nodes is vital in order to The main contribution in this work is to showcase the im- scale the applications to thousands of nodes. These high portance of using high performance interconnects for dis- 1 tributed stream processing. There are many differences 2.3 Channel & Memory Semantics in hardware available for communications with different bandwidths, latencies and processing models. Even Eth- High performance interconnects generally supports two ernet has comparable hardware available to some of the modes of operations called channel and remote memory high performance interconnects; it is not our goal to show access. With channel semantics queues are used for mes- that one particular technology is superior to others, as dif- sage communication. In memory semantics a process can ferent environments may have alternate sets of these tech- read from or write directly to the memory of a remote ma- nologies and with these implementation Heron can take chine. advantage of such environments. In channel mode, two queue pairs for transmission and The remainder of the paper is organized as follows. receive operations are used. To transfer a message, a de- Section 2 presents the background information on Infini- scriptor is posted to the transfer queue, which includes the band and Omni-Path. Section 3 describes the Heron ar- address of the memory buffer to transfer. For receiving a chitecture in detail and section 4 the implementation de- message, a descriptor needs to be submitted along with tails. Next the experiments conducted are described in a pre-allocated receive buffer. The user program queries sections 5 and results are presented and discussed in sec- the completion queue associated with a transmission or a tion 6. Section 7 presents related work. The paper con- receiving queue to determine the success or failure of a cludes with a look at future work. work request. Once a message arrives, the hardware puts the message into the posted receive buffer and the user program can determine this event through the completion 2 Background queue. Note that this mode requires the receiving buffers to be pre-posted before the transmission can happen suc- 2.1 Infiniband cessfully. Infiniband is one of the most widely used high perfor- The remote direct memory access mode is generally mance fabrics. It provides a variety of capabilities includ- called RDMA. With RDMA, two processes preparing to ing message channel semantics, remote memory access communicate, register memory and share the details with and remote atomic memory operations, supporting both the other party. Read and write operations are used in- connection-oriented and connectionless endpoints. Infini- stead of send and receive operations. These are one-sided band is programmed using the Verbs API, which is avail- and do not need any software intervention from the other able in all major platforms. The current hardware is capa- side. If a process wishes to write to remote memory, it can ble of achieving up to 100Gbps speeds with microsecond post a write operation with the local addresses of the data. latencies. Infiniband does not require the OS Kernel in- The completion of the write operation can be detected us- tervention to transfer packets from user space to the hard- ing the completion queue associated. The receiving side is ware. Unlike in TCP, its protocol aspects are handled by not notified about the write operation and has to use out- the hardware. These features mean less CPU time is re- of-band mechanisms to figure out the write. The same is quired by the network compared to TCP for transferring true for remote reads as well. the same amount of data. Because the OS Kernel is by- passed by the communications, the memory for transfer- ring data has to be registered in the hardware. 2.4 Openfabrics API 2.2 Intel Omni-Path Openfabrics 1 provides a library called libfabric that hides Omni-Path is a high performance fabric developed by In- the details of common high performance fabric APIs be- tel. Omni-Path fabric is relatively new compared to Infini- hind a uniform API. Because of the advantage of such an band and there are fundamental differences between the API, we chose to use libfabric as our programming library two. Omni-Path does not offload the protocol handling to for implementing the high performance communications network hardware and it doesn’t have the connection ori- for Heron. Libfabric is a thin wrapper API and it sup- ented channels as in Infiniband. Unlike in Infiniband the ports different providers including Verbs, Aries intercon- Omni-Path network chip can be built into the latest Intel nect from Cray through GNI, Intel Omni-Path, and Sock- Knights Landing processors. Omni-Path supports tagged ets. The libfabcirc API closely resembles the structure of messaging with a 96 bit tag in each message. A Tag can Verbs API. For example, for channel semantics, it pro- carry any type of data and this information can be used at vides send/receive operations with completion queues to the application to distinguish between different messages. get notifications about the operations. Omni-Path is designed and optimized for small high fre- quency messaging. 1https://www.openfabrics.org/ 2 2.5 TCP vs High performance Intercon- Apache Storm with many enhancements to the underlying nects engine architecture. It retains the same Storm API, allow- ing applications written in Storm to be deployed with no TCP is one of the most successful protocols in the brief or minimal code changes. history of computers. It provides a simple yet power- ful API for transferring data reliably across the Internet using unreliable links and protocols underneath. One of 3.1 Heron Data Model the biggest advantages of TCP is its wide adoption and A stream is an unbounded sequence of high level objects simplicity to use. Virtually every computer has access to named events or messages.
Recommended publications
  • What Is It and How We Use It
    Infiniband Overview What is it and how we use it What is Infiniband • Infiniband is a contraction of "Infinite Bandwidth" o can keep bundling links so there is no theoretical limit o Target design goal is to always be faster than the PCI bus. • Infiniband should not be the bottleneck. • Credit based flow control o data is never sent if receiver can not guarantee sufficient buffering What is Infiniband • Infiniband is a switched fabric network o low latency o high throughput o failover • Superset of VIA (Virtual Interface Architecture) o Infiniband o RoCE (RDMA over Converged Ethernet) o iWarp (Internet Wide Area RDMA Protocol) What is Infiniband • Serial traffic is split into incoming and outgoing relative to any port • Currently 5 data rates o Single Data Rate (SDR), 2.5Gbps o Double Data Rate (DDR), 5 Gbps o Quadruple Data Rate (QDR), 10 Gbps o Fourteen Data Rate (FDR), 14.0625 Gbps o Enhanced Data Rate (EDR) 25.78125 Gbps • Links can be bonded together, 1x, 4x, 8x and 12x HDR - High Data Rate NDR - Next Data Rate Infiniband Road Map (Infiniband Trade Association) What is Infiniband • SDR, DDR, and QDR use 8B/10B encoding o 10 bits carry 8 bits of data o data rate is 80% of signal rate • FDR and EDR use 64B/66B encoding o 66 bits carry 64 bits of data Signal Rate Latency SDR 200ns DDR 140ns QDR 100ns Hardware 2 Hardware vendors • Mellanox o bought Voltaire • Intel o bought Qlogic Infiniband business unit Need to standardize hardware. Mellanox and Qlogic cards work in different ways.
    [Show full text]
  • IBM Flex System IB6131 Infiniband Switch User's Guide
    IBM Flex System IB6131 InfiniBand Switch User’s Guide ii IBM Flex System IB6131 InfiniBand Switch User’s Guide IBM Flex System IB6131 InfiniBand Switch User’s Guide Note: Before using this information and the product it supports, read the general information in , ʺAppen‐ dix B: Noticesʺ on page 33, the Safety Information and Environmental Notices and Userʹs Guide docu‐ ments on the IBM Notices for Network Devices CD, and the Warranty Information document that comes with the product. First Edition February 2012 © Copyright IBM Corporation 2012. US Government Users Restricted Rights – Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Safety . vii Chapter1. Introduction . 1 Related documentation. 1 Notices and statements in this document . 3 Features and specifications. 3 Specifications . 4 Major components of the switch . 5 Chapter2. Installing the switch and basic setup. 7 Installing the IBM Flex system blade . 7 CMM . 7 Serial port access (Method 1) . 7 Configuration . 9 Configuration Wizard (Method 2) . 9 Cabling the switch . 15 Chapter3. LEDs and interfaces. 17 Port LEDs . 17 Switch status lights . 17 Power LED . 18 Fault LED . 18 Unit identification switch identifier LED . 18 RS‐232 interface through mini connector. 18 RJ‐45 Ethernet connector . 19 Configuring the IBM Flex System IB6131 InfiniBand switch . 19 Rerunning the Wizard. 19 Updating the switch software . 20 Chapter4. Connecting to the switch platform . 25 Starting an SSH connection to the switch (CLI) . 25 Starting a WebUI connection to the switch . 25 Managing the IBM Flex System IB6131 InfiniBand switch . 26 Chapter5. Solving problems . 27 Running POST .
    [Show full text]
  • Global MV Standards English
    www.visiononline.org www.emva.org www.jiia.org www.china-vision.org www.vdma.com/vision Member-supported trade associations promote the growth of the global vision and imaging industry. Standards development is key to the success of the industry and its trade groups help fund, maintain, manage and promote standards. In 2009, three leading vision associations, AIA, EMVA and JIIA began a cooperative initiative to coordinate the development of globally adopted vision standards. In 2015 they were joined by CMVU and VDMA-MV. This publication is one product of this cooperative effort. Version: April 2016 Copyright 2013, AIA, EMVA and JIIA. All rights reserved. Data within is intended as an information resource and no warranty for its use is given. Camera Link (including PoCL and PoCL-Lite), Camera Link HS, GigE Vision and USB3 Vision are the trademarks of AIA. GenICam is the trademark of EMVA. CoaXPress and IIDC2 are the trademarks of JIIA. FireWire is the trademark of Apple Inc. IEEE 1394 is the trademark of The 1394 Trade Association. USB is the trademark of USB Implementers Forum, Inc. All other names are trademarks or trade names of their respective companies. This is a comprehensive look at the various digital hardware and software interface standards used in machine vision and imaging. In the early days of machine vision, the industry adopted existing analog television standards such as CCIR or RS-170 for the interface between cameras and frame grabbers. The defining In the 1990s, digital technology became characteristics of today’s prevalent and a multitude of proprietary hardware and software interface solutions were used.
    [Show full text]
  • Infiniband Trade Association Integrators' List
    InfiniBand Trade Association Integrators’ List April 2019 © InfiniBand Trade Association SPACE IBTA InfiniBand Integrators' List April 2019 Manufacturer Description Model Type Speed FW SW ConnectX®-3 Pro VPI, FDR IB (56Gb/s) and 40/56GbE MLNX_OFED_LINUX 4.4- Mellanox MCX354A-FCCT HCA FDR 2.42.5000 Dual-port QSFP, PCIe3.0 x8 2.0.7.0 ConnectX®-4 VPI, EDR IB (100Gb/s) and 100GbE MLNX_OFED_LINUX 4.5- Mellanox MCX456A-ECAT HCA EDR 12.24.1000 Dual-port QSFP28, PCIe3.0 x16 1.0.1.0 ConnectX®-5 VPI, EDR IB (100Gb/s) and 100GbE MLNX_OFED_LINUX 4.5- Mellanox MCX556A-EDAT HCA EDR 16.24.1000 Dual-port QSFP28, PCIe4.0 x16 1.0.1.0 ConnectX®-6 VPI adapter card, HDR IB (200Gb/s) and 200GbE, MLNX_OFED_LINUX 4.5- Mellanox MCX653A-HCAT HCA HDR 20.25.0330 dual-port QSFP56, Socket Direct 2x PCIe3.0 x16 1.0.1.0 SwitchX®2 InfiniBand to Ethernet gateway, 36 QSFP ports, Mellanox MSX6036G-2SFS Switch FDR 9.4.5070 3.6.8010 Managed Switch Switch-IB 2 based EDR InfiniBand 1U Switch, 36 QSFP28 ports, Mellanox MSB7800-ES2F Switch EDR 15.1910.0618 3.7.1134 x86 dual core Mellanox® Quantum(TM) HDR InfiniBand Switch, 40 QSFP56 Mellanox MQM8700-HS2F Switch HDR 27.2000.1016 3.7.1942 ports, 2 Power Supplies (AC), x86 dual core Software Versions Diagnostic Software Operating System Cent OS 7.5.1804 ibutils2 MLNX OFED 4.5-1.0.1.0 Mellanox OFED MLNX OFED 4.5-1.0.1.0 Compliance Test Suite v. 1.0.52 Open MPII Open MPI 3.1.2 Benchmark Intel MPI Benchmarks Benchmarks Performed Test Plan Software Forge IBTA MOI Suite PingPong Gather Duration 2-5 Minutes PingPing Gatherv Sendrecv Scatter Conditions for Passing Testing Exchange Scatterv Link Width Link width is @ expected width - i.e.
    [Show full text]
  • Infiniband Technology Overview
    InfiniBand Technology Overview Dror Goldenberg, Mellanox Technologies SNIA Legal Notice The material contained in this tutorial is copyrighted by the SNIA. Member companies and individuals may use this material in presentations and literature under the following conditions: Any slide or slides used must be reproduced without modification The SNIA must be acknowledged as source of any material used in the body of any document containing material from these presentations. This presentation is a project of the SNIA Education Committee. InfiniBand Technology Overview 2 © 2008 Storage Networking Industry Association. All Rights Reserved. Abstract InfiniBand Technology Overview The InfiniBand architecture brings fabric consolidation to the data center. Storage networking can concurrently run with clustering, communication and management fabrics over the same infrastructure, preserving the behavior of multiple fabrics. The tutorial provides an overview of the InfiniBand architecture including discussion of High Speed – Low Latency, Channel I/O, QoS scheduling, partitioning, high availability and protocol offload. InfiniBand based storage protocols, iSER (iSCSI RDMA Protocol), NFS over RDMA and SCSI RDMA Protocol (SRP), are introduced and compared with alternative storage protocols, such as iSCSI and FCP. The tutorial further enumerates value-add features that the InfiniBand brings to clustered storage, such as atomic operations and end to end data integrity. Learning Objectives: Understand the InfiniBand architecture and feature set. Understand the benefits of InfiniBand for networked storage. Understand the standard InfiniBand storage protocols. InfiniBand Technology Overview 3 © 2008 Storage Networking Industry Association. All Rights Reserved. Agenda Motivation and General Overview Protocol Stack Layers Storage Protocols over InfiniBand Benefits InfiniBand Technology Overview 4 © 2008 Storage Networking Industry Association.
    [Show full text]
  • Opencapi, Gen-Z, CCIX: Technology Overview, Trends, and Alignments
    OpenCAPI, Gen-Z, CCIX: Technology Overview, Trends, and Alignments BRAD BENTON| AUGUST 8, 2017 Agenda 2 | OpenSHMEM Workshop | August 8, 2017 AGENDA Overview and motivation for new system interconnects Technical overview of the new, proposed technologies Emerging trends Paths to convergence? 3 | OpenSHMEM Workshop | August 8, 2017 Overview and Motivation 4 | OpenSHMEM Workshop | August 8, 2017 NEWLY EMERGING BUS/INTERCONNECT STANDARDS Three new bus/interconnect standards announced in 2016 CCIX: Cache Coherent Interconnect for Accelerators ‒ Formed May, 2016 ‒ Founding members include: AMD, ARM, Huawei, IBM, Mellanox, Xilinx ‒ ccixconsortium.com Gen-Z ‒ Formed August, 2016 ‒ Founding members include: AMD, ARM, Cray, Dell EMC, HPE, IBM, Mellanox, Micron, Xilinx ‒ genzconsortium.org OpenCAPI: Open Coherent Accelerator Processor Interface ‒ Formed September, 2016 ‒ Founding members include: AMD, Google, IBM, Mellanox, Micron ‒ opencapi.org 5 5 | OpenSHMEM Workshop | August 8, 2017 NEWLY EMERGING BUS/INTERCONNECT STANDARDS Motivations for these new standards Tighter coupling between processors and accelerators (GPUs, FPGAs, etc.) ‒ unified, virtual memory address space ‒ reduce data movement and avoid data copies to/from accelerators ‒ enables sharing of pointer-based data structures w/o the need for deep copies Open, non-proprietary standards-based solutions Higher bandwidth solutions ‒ 25Gbs and above vs. 16Gbs forPCIe-Gen4 Better exploitation of new and emerging memory/storage technologies ‒ NVMe ‒ Storage class memory (SCM),
    [Show full text]
  • Designcon 2003 Tecforum I2C Bus Overview January 27 2003
    DesignCon 2003 TecForum I2C Bus Overview January 27 2003 Philips Semiconductors Jean Marc Irazabal –Technical Marketing Manager for I2C Devices Steve Blozis –International Product Manager for I2C Devices Agenda • 1st Hour • Serial Bus Overview • I2C Theory Of Operation • 2nd Hour • Overcoming Previous Limitations • I2C Development Tools and Evaluation Board • 3rd Hour • SMBus and IPMI Overview • I2C Device Overview • I2C Patent and Legal Information • Q & A Slide speaker notes are included in AN10216 I2C Manual 2 DesignCon 2003 TecForum I C Bus Overview 2 1st Hour 2 DesignCon 2003 TecForum I C Bus Overview 3 Serial Bus Overview 2 DesignCon 2003 TecForum I C Bus Overview 4 Com m uni c a t i o ns Automotive SERIAL Consumer BUSES IEEE1394 DesignCon 2003 TecForum I UART SPI 2 C Bus Overview In d u s t r ia l 5 General concept for Serial communications SCL SDA select 3 select 2 select 1 READ Register or enable Shift Reg# enable Shift Reg# enable Shift Reg# WRITE? // to Ser. // to Ser. // to Ser. Shift R/W Parallel to Serial R/W R/W “MASTER” DATA SLAVE 1 SLAVE 2 SLAVE 3 • A point to point communication does not require a Select control signal • An asynchronous communication does not have a Clock signal • Data, Select and R/W signals can share the same line, depending on the protocol • Notice that Slave 1 cannot communicate with Slave 2 or 3 (except via the ‘master’) Only the ‘master’ can start communicating. Slaves can ‘only speak when spoken to’ 2 DesignCon 2003 TecForum I C Bus Overview 6 Typical Signaling Characteristics LVTTL 2 RS422/485
    [Show full text]
  • DGX-1 User Guide
    NVIDIA DGX-1 DU-08033-001 _v15 | May 2018 User Guide TABLE OF CONTENTS Chapter 1. Introduction to the NVIDIA DGX-1 Deep Learning System................................. 1 1.1. Using the DGX-1: Overview............................................................................. 1 1.2. Hardware Specifications................................................................................. 2 1.2.1. Components.......................................................................................... 2 1.2.2. Mechanical............................................................................................3 1.2.3. Power Requirements................................................................................ 3 1.2.4. Connections and Controls.......................................................................... 3 1.2.5. Rear Panel Power Controls.........................................................................4 1.2.6. LAN LEDs..............................................................................................5 1.2.7. IPMI Port LEDs....................................................................................... 5 1.2.8. Hard Disk Indicators................................................................................ 6 1.2.9. Power Supply Unit (PSU) LED..................................................................... 7 Chapter 2. Installation and Setup............................................................................ 8 2.1. Registering Your DGX-1.................................................................................
    [Show full text]
  • I2C Overview
    I2C Overview 2H 2003 Agenda • What is I2C and why would you be interested in using the I2C bus? • What new I2C devices are there and what are the typical applications? • How are we going to help you design-in these devices? Semiconductors 2 Transmission Standards 2 2500 I C data can be transmitted at speeds of 100 kHz, 400 kHz CML 655 or 3.4 MHz. bps) M 400 GTLP 1394.a I2C data can be LV BTL DS = 35 ECL RS- ETL /PECL 644 transmitted longer /LV 10 PECL distances using bus buffers like the 3.4 MHz General RS-422 P82B96 Purpose 1 Logic RS-485 Data Transfer Rate ( 400 KHz 0.1 100 KHz I2C RS-232 RS-423 0.5 0 10 100 1000 Backplane Length (meters) Cable Length (meters) Semiconductors 3 I2C Bus Basics - Address and Data µcon- GPIO A/D LCD RTC µcon- troller troller The master always D/A sends the SCL II (clock) signal. SCL SDA Each device is addressed individually by software with a unique address that New devices or can be modified by hardware pins. functions can be easily 1010A A A R/W A ‘clipped on to an 2 1 0 2 EEPROM existing bus! The open drain/collector outputs A1 provide for a “wired-AND” connection A0 that allows devices to be added or removed without impact and always 1010100R/W require a pull-up resistor. Write data Master Slave S slaveslave address address W W A Adata data A data A data A P transmitter receiver A P < n data bytes > Read data S slave address R A data A data A P receiver transmitter < n data bytes > last data byte S = Start condition R/W = read / write not A = Acknowledge A = Not Acknowledge P = Stop condition Semiconductors
    [Show full text]
  • HPE EDR Infiniband Adapters Overview
    QuickSpecs HPE EDR InfiniBand Adapters Overview HPE EDR InfiniBand Adapters HPE EDR InfiniBand 100Gb 1-port 841QSFP28 Adapter is based on Mellanox ConnectX®-5 technology. It supports InfiniBand function for HPE ProLiant XL and DL Servers. It is designed for customers who need low latency and high bandwidth InfiniBand interconnector in their high performance computing (HPC) systems. HPE EDR InfiniBand/Ethernet 100Gb 2-port 841QSFP28 Adapter is based on Mellanox ConnectX®-5 VPI technology. It supports dual-function InfiniBand and Ethernet for HPE ProLiant XL and DL Servers. It can function as a dual ported EDR InfiniBand card, a dual ported 100Gb Ethernet card, or a mixed function card. It is designed for customers who need low latency and high bandwidth interconnector in their high performance computing (HPC) systems. HPE EDR InfiniBand/Ethernet 100G 2-port 840QSFP28 Adapter is based on Mellanox ConnectX®-4 technology. It supports dual- function InfiniBand and Ethernet for HPE ProLiant XL and DL Servers. It can function as a dual ported EDR InfiniBand card, a dual ported 100Gb Ethernet card, or a mixed function card. They are designed for customers who need low latency and high bandwidth interconnector in their high performance computing (HPC) systems. HPE EDR InfiniBand/Ethernet 100Gb 1-port 841OCP QSFP28 Adapter is based on Mellanox ConnectX®-5 VPI technology. It supports dual-function InfiniBand and Ethernet for the HPE Apollo 70 Server. It is designed for customers who need low latency and high bandwidth interconnector in their high performance computing (HPC) systems based on HPE Apollo 70 servers. HPE Ethernet 100Gb 1-port QSFP28 MCX515A-CCAT Adapter is based on Mellanox ConnectX®-5 EN technology.
    [Show full text]
  • Mellanox Connectx®-6 VPI Adapter Cards User Manual for Dell EMC Poweredge Servers
    Mellanox ConnectX®-6 VPI Adapter Cards User Manual for Dell EMC PowerEdge Servers OPNs: Y1T43, 7TKND, 1GK7G, CY7GD Rev 1.1 www.mellanox.com Mellanox Technologies Confidential NOTE: THIS HARDWARE, SOFTWARE OR TEST SUITE PRODUCT PRODUCT(S) AND ITS RELATED DOCUMENTATION ARE PROVIDED BY MELLANOX TECHNOLOGIES AS-IS WITH ALL FAULTS OF ANY KIND AND SOLELY FOR THE PURPOSE OF AIDING THE CUSTOMER IN TESTING APPLICATIONS THAT USE THE PRODUCTS IN DESIGNATED SOLUTIONS. THE CUSTOMER'S MANUFACTURING TEST ENVIRONMENT HAS NOT MET THE STANDARDS SET BY MELLANOX TECHNOLOGIES TO FULLY QUALIFY THE PRODUCT(S) AND/OR THE SYSTEM USING IT. THEREFORE, MELLANOX TECHNOLOGIES CANNOT AND DOES NOT GUARANTEE OR WARRANT THAT THE PRODUCTS WILL OPERATE WITH THE HIGHEST QUALITY. ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL MELLANOX BE LIABLE TO CUSTOMER OR ANY THIRD PARTIES FOR ANY DIRECT, INDIRECT, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES OF ANY KIND (INCLUDING, BUT NOT LIMITED TO, PAYMENT FOR PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY FROM THE USE OF THE PRODUCT(S) AND RELATED DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. Mellanox Technologies 350 Oakmead Parkway Suite 100 Sunnyvale, CA 94085 U.S.A. www.mellanox.com Tel: (408) 970-3400 Fax: (408) 970-3403 © Copyright 2019. Mellanox Technologies Ltd.
    [Show full text]
  • Cable Assy 5.07.Qxd
    hdmi cable dvi assemblies serial ata lxi data storage flat ribbon custom consumer electronics • standard and custom • overmold capability • accessory options HDMI HDMI Series Cable Assemblies The High Definition Multimedia Interface (HDMI)TM was developed as the digital interface standard for the consumer electronics market. HDMI combines high-definition video and multi-channel audio into a single digital interface to provide clear digital quality through a single cable. A single cable for audio and video significantly simplifies home entertainment system installation. CA's high quality cable assemblies are available as HDMI-to-HDMI assemblies, as well as HDMI-to-DVI assemblies. DVI Series Cable Assemblies Circuit Assembly’s DVI (Digital Visual Interface) cable assemblies utilize CA’s high- quality DVI plugs, designed to reduce EMI across copper cables. Circuit Assembly offers DVI cable assemblies in multiple configurations for use in a variety of applications. DVI USB and IEEE 1394 Series Cable Assemblies Universal Serial Bus is a simple way to attach a wide variety of peripherals to a PC. CA’s USB cable assemblies support two-way data transmission from devices like the keyboard, mouse, notepad and joystick. CA’s high-quality IEEE 1394 cables integrate computers with audio/video entertainment units and digital consumer electronics to allow real time transmission with high image resolution. USB INFINIBAND 1394 Infiniband Cable Assemblies Infiniband is a serial interface used in high-performance computing to connect processors with high-speed peripherals and enable inter-switch connections. Circuit Assembly’s Infiniband cable assemblies support 4X and 12X Infiniband link implementation and are available in a wide range of configurations using industry approved connectors and cable.
    [Show full text]