IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR

GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

ABSTRACT. A binary clutter is the family of odd circuits of a binary matroid, that is, the family of circuits that

¼; ½

intersect with odd cardinality a fixed given subset of elements. Let A denote the matrix whose rows are the

Ü  ¼ : AÜ  ½g

characteristic vectors of the odd circuits. A binary clutter is ideal if the polyhedron f is

×Ø Ì Ì integral. Examples of ideal binary clutters are ×Ø-paths, -cuts, -joins or -cuts in graphs, and odd circuits

in weakly bipartite graphs. In 1977, Seymour conjectured that a binary clutter is ideal if and only if it does not

µ Ä Ç b´Ç

à Ã

contain F , ,or as a minor. In this paper, we show that a binary clutter is ideal if it does not contain

7 5 5

five specified minors, namely the three above minors plus two others. This generalizes Guenin’s characterization Ì of weakly bipartite graphs, as well as the theorem of Edmonds and Johnson on Ì -joins and -cuts.

1. INTRODUCTION

E ´Àµ

A clutter À is a finite family of sets, over some finite ground set , with the property that no set of

jE ´Àµj

À fÜ ¾ Ê :

À contains, or is equal to, another set of . A clutter is said to be ideal if the polyhedron

·

È

Ü  ½; 8Ë ¾Àg ¼; ½

i is an integral polyhedron, that is, all its extreme points have coordinates. A

i¾Ë

À = ; À = f;g À A´Àµ

clutter À is trivial if or . Given a nontrivial clutter , we write for a 0,1 matrix whose

´Àµ Ë ¾À

columns are indexed by E and whose rows are the characteristic vectors of the sets . With this

fÜ  ¼ : A´ÀµÜ  ½g

notation, a nontrivial clutter À is ideal if and only if is an integral polyhedron.

Ì  E ´Àµ À Ì À

Given a clutter À, a set is a transversal of if intersects all the members of . The clutter

¡

´Àµ À E b´Àµ = E ´Àµ b´Àµ

b , called the blocker of , is defined as follows: and is the set of inclusion-wise

¡

b b´Àµ = À À;b´Àµ minimal transversals of À. It is well known that [13]. Hence we say that form a

blocking pair of clutters. Lehman [14] showed that, if a clutter is ideal, then so is its blocker. A clutter is said

Ë ;Ë ;Ë ¾À Ë 4 Ë 4 Ë

¾ ¿ ½ ¾ ¿ to be binary if, for any ½ , their symmetric difference contains, or is equal to, a

set of À.

i ¾ E ´Àµ À=i ÀÒi

Given a clutter À and , the contraction and deletion are clutters defined as follows:

´À=iµ=E ´ÀÒiµ= E ´Àµ fig À=i

E , the family is the set of inclusion-wise minimal members of

Ë fig : Ë ¾Àg ÀÒi = fË : i 6¾ Ë ¾Àg

f , and . Contractions and deletions can be performed sequentially,

À Â

and the result does not depend on the order. A clutter obtained from by a set of deletions d and a set of

  \  = ; À ÀÒ =Â

c d d c

contractions c , (where ) is called a minor of and is denoted by .Itisaproper minor

 [  6= ; d if c . A clutter is said to be minimally nonideal (mni) if it is not ideal but all its proper minors are ideal.

Date: March 2000, revised December 2001, March 2002.

Key words and phrases. Ideal clutter, signed matroid, multicommodity flow, weakly bipartite graph, Ì -cut, Seymour’s conjecture. Classification: 90C10, 90C27, 52B40. This work supported in part by NSF grants DMI-0098427, DMI-9802773, DMS-9509581, ONR grant N00014-9710196, and DMS 96-32032. 1

2GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

µ Ç E ´Ç ½¼ Ã Ç

à 5 Ã

The clutter à is defined as follows: is the set of edges of the complete graph and is

5 5 5

à 5 ½¼

the set of odd circuits of 5 (the triangles and the circuits of length ). The constraints corresponding to the

½ ½ ½

´ ; ;:::; µ fÜ  ¼ : A´Ç µÜ 

triangles define a fractional extreme point of the associated polyhedron Ã

5

¿ ¿ ¿

½g Ç Ä F

. Thus à is not ideal and neither is its blocker. The clutter is the family of circuits of length three

5 7

E ´Ä µ=f½; ¾; ¿; 4; 5; 6; 7g

of the Fano matroid (or, equivalently, the family of lines of the Fano plane), i.e. F 7

and

¨ ©

Ä = f½; ¿; 5g; f½; 4; 6g; f¾; ¿; 6g; f¾; 4; 5g; f½; ¾; 7g; f¿; 4; 7g; f5; 6; 7g :

F

7

½ ½ ½

´ ; ;:::; µ Ä

The fractional point is an extreme point of the associated polyhedron, hence F is not ideal.

7

¿ ¿ ¿

Ä Ä F

The blocker of F is itself. The following excluded minor characterization is predicted.

7 7

Seymour’s Conjecture [Seymour [23] p. 200, [26] (9.2), (11.2)]

Ä Ç b´Ç µ

à Ã

A binary clutter is ideal if and only if it has no F ,no , and no minor.

7 5 5

· ·

Ø 6¾ E ´Àµ À E ´À µ=

Consider a clutter À and an arbitrary element . We write for the clutter with

·

À = fË [fØg : Ë ¾Àg É E ´É µ E ´Àµ [fØg 6

and . The clutter 6 is defined as follows: is the set of edges

Ã É Ã É

6 4 7

of the complete graph 4 and is the set of triangles of . The clutter is defined as follows:

¾ ¿

½ ¼ ½ ¼ ½ ¼ ½

½ ¼ ¼ ½ ¼ ½ ½

6 7

¼ ½ ¼ ½ ½ ¼ ½

6 7

6 7

¼ ½ ½ ¼ ¼ ½ ½

: A´É µ=

7

6 7

½ ½ ¼ ¼ ¼ ¼ ¼

4 5

¼ ¼ ½ ½ ¼ ¼ ¼

¼ ¼ ¼ ¼ ½ ½ ¼

¡

A´É µ A b´É µ 6 Note that the first six columns of 7 form the matrix .

The main result of this paper is that Seymour’s Conjecture holds for the class of clutters that do not have

· · É

É and minors.

6 7

· ·

Ä Ç b´Ç µ É É

à Ã

Theorem 1.1. A binary clutter is ideal if it does not have F , , , or as a minor.

7 5 5

6 7

Since the blocker of an ideal binary clutter is also a ideal, we can restate Theorem 1.1 as follows.

· ·

µ µ Ä Ç b´Ç b´É b´É µ

à Ã

Corollary 1.2. A binary clutter is ideal if it does not have F , , , ,or as a minor.

7 5 5

7 6

G E ´Àµ G À We say that À is the clutter of odd circuits of a graph if is the set of edges of and the set of

odd circuits of G. A graph is said to be weakly bipartite if the clutter of its odd circuits is ideal. This class of

graphs has a nice excluded minor characterization. Ç

Theorem 1.3 (Guenin [10]). A graph is weakly bipartite if and only if its clutter of odd circuits has no à 5 minor.

The class of clutters of odd circuits is closed under minor taking (Remark 8.2). Moreover, one can easily Ç

check that à is the only clutter of odd circuits among the five excluded minors of Theorem 1.1 (see 5 Remark 8.3 and [20]). It follows that Theorem 1.1 implies Theorem 1.3. It does not provide a new proof of

Theorem 1.3 however, as we shall use Theorem 1.3 to prove Theorem 1.1.

Ì Ì

Consider a graph G and a subset of its vertices of even cardinality. A -join is an inclusion-wise

Ì G[ ] minimal set of edges  such that is the set of vertices of odd degree of the edge-induced subgraph .

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 3

Æ ´Í µ:=f´Ù; Ú µ:Ù ¾ Í; Ú 6¾ Í g Í

A Ì -cut is an inclusion-wise minimal set of edges , where is a set of

jÍ \ Ì j Ì Ì

vertices of G that satisfies odd. -joins and -cuts generalize many interesting special cases. If

= f×; Øg Ì Ì ×Ø ×Ø G

Ì , then the -joins (resp. -cuts) are the -paths (resp. inclusion-wise minimal -cuts) of .If

= Î Ì jÎ j=¾ G Ì

Ì , then the -joins of size are the perfect matchings of . The case where is identical to the Ì set of odd-degree vertices of G is known as the Chinese postman problem [6, 12]. The families of -joins

and Ì -cuts form a blocking pair of clutters. Ì Theorem 1.4 (Edmonds and Johnson [6]). The clutters of Ì -cuts and -joins are ideal.

The class of clutters of Ì -cuts is closed under minor taking (Remark 8.2). Moreover, it is not hard to check

that none of the five excluded minors of Theorem 1.1 are clutters of Ì -cuts (see Remark 8.3 and [20]). Thus Ì Theorem 1.1 implies that the clutter of Ì -cuts is ideal, and thus that its blocker, the clutter of -joins, is ideal. Hence Theorem 1.1 implies Theorem 1.4. However, we shall also rely on this result to prove Theorem 1.1. The paper is organized as follows. Section 2 considers representations of binary clutters in terms of signed matroids and matroid ports. Section 3 reviews the notions of lifts and sources, which are families of binary clutters associated to a given binary matroid [20, 29]. Connections between multicommodity flows and ideal clutters are discussed in Section 4. The material presented in Sections 2, 3 and 4 is not all new. We present it here for the sake of completeness and in order to have a unified framework for the remainder of the paper. In Sections 5, 6, 7 we show that minimally nonideal clutters do not have small separations. The proof of Theorem 1.1 is given in Section 8. Finally, Section 9 presents an intriguing example of an ideal binary clutter.

2. BINARY MATROIDS AND BINARY CLUTTERS

We assume that the reader is familiar with the basics of matroid theory. For an introduction and all

undefined terms, see for instance Oxley [21]. Given a matroid Å , the set of its elements is denoted by

£

´Å µ ª´Å µ Å Å Å Ò e Å

E and the set of its circuits by . The dual of is written . The deletion minor of

´Å Ò eµ=E ´Å µ feg ª´Å Ò eµ= fC : e 6¾ C ¾ ª´Å µg

is the matroid defined as follows: E and .

£ £

Å ´Å Ò eµ The contraction minor Å=e of is defined as . Contractions and deletions can be performed

sequentially, and the result does not depend on the order. A matroid obtained from Å by a set of deletions

Â Â Å Å Ò Â =Â

c d c

d and a set of contractions is a minor of and is denoted by .

¼; ½ A E ´Å µ

A matroid Å is binary if there exists a matrix with column set such that the independent

A A

sets of Å correspond to independent sets of columns of over the two element field. We say that is a

¼; ½ A Å A

representation of Å . Equivalently, a matrix is a representation of a binary matroid if the rows of

£

Å C C C 4 C

¾ ½ ¾

span the circuit space of .If ½ and are two cycles of a binary matroid then is also a cycle

Å Å

of Å . In particular this implies that every cycle of can be partitioned into circuits. Let be a binary

 E ´Å µ ´Å; ¦µ ¦ Å

matroid and ¦ . The pair is called a signed matroid, and is called the signature of .We

Å jC \ ¦j say that a circuit C of is odd (resp. even)if is odd (resp. even). The results in this section are fairly straightforward and have appeared explicitly or implicitly in the literature [8, 13, 20, 23]. We include some of the proofs for the sake of completeness. 4GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

Proposition 2.1 (Lehman [13]). The followingstatements are equivalent for a clutter: (i) À is binary; (ii) for

Ë ¾À Ì ¾ b´Àµ jË \ Ì j Ë ;:::;Ë ¾À k Ë 4 Ë 4 :::Ë

k ½ ¾ k every and , is odd; (iii) for every ½ where is odd,

contains, or is equal, to an element of À.

Å; ¦µ

Proposition 2.2. The odd circuits of a signed matroid ´ form a binary clutter.

C ;C ;C ´Å; ¦µ Ä := C 4 C 4 C Å

¾ ¿ ½ ¾ ¿

Proof. Let ½ be three odd circuits of . Then is a cycle of . Since

C ;C ;C ¦ Ä Å Ä

¾ ¿

each of ½ intersects with odd parity, so does . Since is binary, can be partitioned into a

Ä \ ¦j family of circuits. One of these circuits must be odd since j is odd. The result now follows from the

definition of binary clutters (see Section 1). £

F ; 6¾F C ;C ¾ ¾

Proposition 2.3. Let be a clutter such that . Consider the following properties: (i) for all ½

F e ¾ C \ C C ¾F C  C [ C feg C ;C ¾F

¾ ¿ ¿ ½ ¾ ½ ¾

and ½ there exists such that . (ii) for all there exists

C ¾F C  C 4 C F

¿ ½ ¾ ¿ such that . If property (i) holds then is the set of circuits of a matroid. If property

(ii) holds then F is the set of circuits of a binary matroid.

Property (i) is known as the circuit elimination axiom. Circuits of matroids satisfy this property. Note that

property (ii) implies property (i). Both results are standard, see Oxley [21].

; 6¾À F Proposition 2.4. Let À be a binary clutter such that . Let be the clutter consisting of all inclusion-

wise minimal, non-empty sets obtained by taking the symmetric difference of an arbitrary number of sets of

ÀF F

À. Then and is the set of circuits of a binary matroid. F

Proof. By definition, F satisfies property (ii) in Proposition 2.3. Thus is the set of circuits of a binary

¼ ¼

Ë ¾À F Ë ¾F Ë  Ë

matroid Å . Suppose for a contradiction there is . Then there exists such that .

¼

Ø À Ø

Thus Ë is the symmetric difference of a family of, say , sets of .If is odd then, Proposition 2.1 implies

¼ ¼

À Ø Ë 4 Ë À Ë that Ë contains a set of .If is even then, Proposition 2.1 implies that contains a set of . Thus

is not inclusion-wise minimal, a contradiction. £

; 6¾À

Consider a binary clutter À such that . The matroid defined in Proposition 2.4 is called the up matroid

´Àµ Ù´Àµ À

and is denoted by Ù . Proposition 2.1 implies that every circuit of is either an element of or the

À b´Àµ

symmetric difference of an even number of sets of À. Since is a binary clutter, sets of intersect with

´Àµ À

odd parity exactly the circuits of Ù that are elements of . Hence,

; 6¾À ´Ù´Àµ; ¦µ ¦ ¾ b´Àµ Remark 2.5. A binary clutter À such that is the clutter of odd circuits of where .

Moreover, this representation is essentially unique.

´Å; ¦µ À Æ

Proposition 2.6. Let À be the clutter of odd circuits of the signed matroid .If is not trivial and

= Ù´Àµ is connected, then Æ .

To prove this, we use the following result (see Oxley [21] Theorem 4.3.2).

Å Å

Theorem 2.7 (Lehman [13]). Let e be an element of a connected binary matroid . The circuits of not

e C 4 C C C Å e

¾ ½ ¾ containing are of the form ½ where and are circuits of containing .

We shall also need the following observation which follows directly from Proposition 2.3.

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 5

Å; ¦µ e E ´Å µ F := fC [feg : C ¾

Proposition 2.8. Let ´ be a signed matroid and an element not in . Let

ª´Å µ; jC \ ¦j C : C ¾ ª´Å µ; jC \ ¦j g F

oddg[f even . Then is the set of circuit of a binary matroid.

¼ Æ

Proof of Proposition 2.6. Let Æ and be connected matroids and suppose that the clutters of odd circuits

¼ ¼ ¼

Æ; ¦µ ´Æ ; ¦ µ Å Å

of ´ and are the same and are not trivial. Let (resp. ) be the matroid constructed from

¼ ¼

Æ; ¦µ ´Æ ; ¦µ Å Å e

´ (resp. ) as in Proposition 2.8. By construction the circuits of and using are the

¼

À Å Å

same. Since Æ is connected and is not trivial, and are connected. It follows from Theorem 2.7

¼ ¼ ¼

= Å Æ = Å=e = Å =e = Æ

that Å and in particular . By the same argument and Remark 2.5,

= Ù´Àµ £

Æ .

D D

In a binary matroid, any circuit C and cocircuit have an even intersection. So, if is a cocircuit, the

Å; ¦µ ´Å; ¦ 4 D µ e ¾ E ´Å µ

clutter of odd circuits of ´ and are the same (see Zaslavsky [28]). Let . The

Å; ¦µ Ò e ´Å; ¦µ ´Å Ò e; ¦ fegµ ´Å; ¦µ=e ´Å; ¦µ

deletion ´ of is defined as . The contraction of is defined

6¾ ¦ ´Å; ¦µ=e := ´Å =e; ¦µ e ¾ ¦ e D

as follows: if e then ;if and is not a loop then there exists a cocircuit

e ¾ D ´Å; ¦µ=e := ´Å=e; ¦ 4 D µ e ¾ ¦ Å À=e

of Å with and . Note if is a loop of , then is a trivial clutter.

Å; ¦µ

A minor of ´ is any signed matroid which can be obtained by a sequence of deletions and contractions.

´Å; ¦µ   ´Å; ¦µ=Â Ò Â

d c d

A minor of obtained by a sequence of c contraction and deletions is denoted .

À ´Å; ¦µ Â

Remark 2.9. Let be a the clutter of odd circuits of a signed matroid .If c does not contain an odd

À=Â Ò Â ´Å; ¦µ=Â Ò Â

d c d

circuit, then c is the clutter of odd circuits of the signed matroid .

e Å ÈÓÖØ´Å; eµ Å

Let Å be a binary matroid and an element of . The clutter , called a port of , is defined

¡

ÈÓÖØ´Å; eµ := E ´Å µ feg ÈÓÖØ´Å; eµ:=fË feg : e ¾ Ë ¾ ª´Å µg

as follows: E and .

ÈÓÖØ´Å; eµ

Proposition 2.10. Let Å be a binary matroid, then is a binary clutter.

¾ ÈÓÖØ´Å; eµ Ë [feg ´Å; fegµ

Proof. By definition Ë if and only if is an odd circuit of the signed matroid .

´Å; eµ e Å

We may assume ÈÓÖØ is nontrivial, hence in particular, is not a loop of . Therefore, there exists a

e ÈÓÖØ´Å; eµ ´Å=e; D 4

cocircuit D that contains . Thus is the clutter of odd circuits of the signed matroid

£ egµ

f . Proposition 2.2 states that these odd circuits form a binary clutter.

Å e ¾ E ´Å µ

Proposition 2.11. Let À be a binary clutter. Then there exists a binary matroid with element

´Àµ ÈÓÖØ´Å; eµ= À

E such that .

Å e ; 6¾À À

Proof. If ;¾À, define to have element as a loop. If , we can represent as the set of odd

Æ; ¦µ Å ´Æ; ¦µ

circuits of a signed matroid ´ (see Remark 2.5). Construct a binary matroid from as in

´Å; eµ= À £

Proposition 2.8. Then ÈÓÖØ .

£

´Å; eµ ÈÓÖØ´Å ;eµ

Proposition 2.12 (Seymour [23]). ÈÓÖØ and form a blocking pair.

£

´Å; eµ ÈÓÖØ´Å ;eµ Ì ¾

Proof. Proposition 2.10 implies that ÈÓÖØ and are both binary clutters. Consider

£ £

´Å ;eµ Ì [feg Å Ë ¾ ÈÓÖØ´Å; eµ Ë [feg Å

ÈÓÖØ . Then is a circuit of . For all , is a circuit of . Since

£

[feg Ë [feg jË \ Ì j Ì ¾ ÈÓÖØ´Å ;eµ

Ì and have an even intersection, is odd. Thus we proved: for all , there

¼ ¼ ¼

¾ b´ÈÓÖØ´Å; eµµ Ì  Ì Ì ¾ b´ÈÓÖØ´Å; eµµ

is Ì where . To complete the proof it suffices to show: for all ,

£ ¼ ¼

¾ ÈÓÖØ´Å ;eµ Ì  Ì ÈÓÖØ´Å; eµ Ë ¾ ÈÓÖØ´Å; eµ jË \ Ì j

there is Ì where . Since is binary, for every , is

¼

[feg Å e odd (Proposition 2.1). Thus Ì intersects every circuit of using with even parity. It follows from

6GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

¼ ¼

[feg Å Ì [feg

Theorem 2.7 that Ì is orthogonal to the space spanned by the circuits of , i.e. is a cycle of

£ £ ¼ £

Å Ì [feg Ì  Ì Ì ¾ ÈÓÖØ´Å ;eµ Å . It follows that there is a circuit of of the form where . Hence, as

required. £

3. LIFTS AND SOURCES

Å e Æ = Å=e

Let Æ be a binary matroid. For any binary matroid with element such that , the binary

´Å; eµ Æ À Ù´Àµ

clutter ÈÓÖØ is called a source of . Note that is a source of its up matroid . For any binary

e Æ = Å Ò e ÈÓÖØ´Å; eµ Æ matroid Å with element such that , the binary clutter is called a lift of . Note

that a source or a lift can be a trivial clutter.

£

À Æ b´Àµ Æ

Proposition 3.1. Let Æ be a binary matroid. is a lift of if and only if is a source of .

Æ Å Å Ò e = Æ À = ÈÓÖØ´Å; eµ

Proof. Let À be a lift of , i.e. there is a binary matroid with and .By

£ £ £ £

´Àµ=ÈÓÖØ´Å ;eµ Å =e =´Å Ò eµ = Æ b´Àµ

Proposition 2.12, b . Since we have that is a source of

£ £

Æ . Moreover, the implications can be reversed.

Ù´Àµ It is useful to relate a description of À in terms of excluded clutter minors to a description of in

terms of excluded matroid minors.

Ù´Àµ Æ

Theorem 3.2. Let À be a binary clutter such that its up matroid is connected, and let be a connected

·

Ù´Àµ Æ À À À

binary matroid. Then does not have as a minor if and only if does not have ½ or as a minor,

¾

À Æ À Æ ¾ where ½ is a source of and is a lift of .

To prove this we will need the following result (see Oxley [21] Proposition 4.3.6). Æ

Theorem 3.3 (Brylawski [3], Seymour [25]). Let Å be a connected matroid and a connected minor of

i ¾ E ´Å µ E ´Æ µ Å Ò i Å=i Æ

Å . For any , at least one of or is connected and has as a minor.

:= Ù´Àµ ¦ ¾ b´Àµ À

Proof of Theorem 3.2. Let Å and let . Remark 2.5 states that is the clutter of odd

´Å; ¦µ À À Æ À ½

circuits of . Suppose first that has a minor ½ that is a source of . Remark 2.9 implies that

¼ ¼

´Æ ; ¦ µ ´Å; ¦µ Æ À

is the clutter of odd circuits of a signed minor of . Since is connected, ½ is nontrivial

¼

= Æ Æ Å À

and therefore Proposition 2.6 implies Æ . In particular is a minor of . Suppose now that has a

· · ·

À À Æ e E ´À µ E ´À µ À ¾

minor where ¾ is a lift of . Let be the element of . Remark 2.9 implies that

¾ ¾ ¾

^ ^

´ Å; ¦µ ´Å; ¦µ À Æ

is the clutter of odd circuits of a signed minor of . Since ¾ is a lift of there is a connected

·

¼ ¼ ¼

^ ^ ^

Å Å Ò e = Æ e ÈÓÖØ´Å ;eµ=À À

matroid with element such that and ¾ . Thus is the clutter of odd

¾

¼ ¼ ¼ ¼

^ ^ ^ ^ ^

Å ; fegµ Å = Å Å Å Æ = Å Ò e

circuits of ´ . Proposition 2.6 implies . Thus is a minor of and so is .

Æ À

Now we prove the converse. Suppose that Å has as a minor and does not satisfy the theorem. Let be

´Àµ Æ Å

such a counterexample minimizing the cardinality of E . Clearly, is a proper minor of as otherwise

´Àµ=Æ À Æ i ¾ E ´Å µ E ´Æ µ Å Ò i Å=i

Ù , i.e. is a source of . By Theorem 3.3, for every , one of and is

Å=i Æ i Å

connected and has Æ as a minor. Suppose is connected and has as a minor. Since is not a loop of ,

¼

=i ´Å =i; ¦ µ ´Å; ¦µ

it follows from Remark 2.9 that À is nontrivial and is a signed minor of . Proposition 2.6

= Ù´À=iµ À=i À E ´Àµ

implies Å=i . But then contradicts the choice of minimizing the cardinality of . Thus,

¾ E ´Å µ E ´Æ µ Å Ò i Æ i ¾ E ´Å µ E ´Æ µ

for every i , is connected and has an minor. Suppose for some ,

i Ù´ÀÒiµ= Å Ò i ÀÒ is nontrivial. Then because of Remark 2.9 and Proposition 2.6 , a contradiction to the

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 7

i ¾ E ´Å µ E ´Æ µ ÀÒi ´Å; ¦µ

choice of À. Thus for every , is trivial, or equivalently, all odd circuits of

Å = Ù´Àµ Å i E ´Å µ E ´Æ µ= fig

use i.As , even circuits of do not use . We claim that . Suppose

6= i E ´Å µ E ´Æ µ ´Å; ¦µ j

not and let j be an element of . The set of circuits of using is exactly the set

Å Å Ò i

of odd circuits. It follows that the elements i; j must be in series in . But then is not connected,

´Å µ E ´Æ µ=fig Å Ò i = Æ ´Å; ¦µ i

a contradiction. Therefore E and . As the circuits of using are

·

Å; ¦µ i A´Àµ À = À

exactly the odd circuits of ´ , it follows that column of consists of all 1’s. Thus where

¾

À = ÈÓÖØ´Å; iµ À Æ £ ¾

¾ , i.e. is a lift of .

£

F ;F Ê Æ B

½¼ Æ

Next we define the binary matroids 7 and . For any binary matroid , let be a 0,1 matrix

7

£

Æ B Æ

whose rows span the circuit space of (equivalently Æ is a representation of the dual matroid ). Square

£

Á Ê = Ê

identity matrices are denoted . Observe that ½¼.

½¼

¾ ¿

¾ ¿

½ ½ ¼ ¼ ½

 

¼ ½ ½

¼ ½ ½ ½ ½ ½ ½ ¼ ¼

6 7

½ ¼ ½

4 5

£

½ ¼ ½ ½ ¼ ½ ½ ½ ¼

Á B = Á B = Á B =

4 5

F F Ê

7 ½¼

7

½ ½ ¼

½ ½ ¼ ½ ¼ ¼ ½ ½ ½

½ ½ ½

½ ¼ ¼ ½ ½

Å e Æ = Å=e

Given a binary matroid Æ , let be a binary matroid with element such that . The circuit space

Å [B jÜ] Ü e

of is spanned by the rows of a matrix of the form Æ , where is a 0,1 column vector indexed by . Ü Assuming Å is connected, we have (up to isomorphism), the following possible columns for each of the

three aforementioned matroids Æ : £

(1) F :

7

Ì

Ü =´½; ½; ½µ

a . F

(2) 7 :

Ì Ì Ì

Ü =´¼; ½; ½; ½µ ;Ü =´½; ½; ½; ¼µ Ü =´½; ½; ½; ½µ

b c

a and . Ê

(3) ½¼:

Ì Ì Ì

Ü =´½; ¼; ½; ¼; ¼µ ;Ü =´½; ¼; ½; ¼; ½µ ;Ü =´½; ¼; ½; ½; ¼µ ;

a b c

Ì Ì Ì

Ü =´½; ¼; ½; ½; ½µ ;Ü =´½; ½; ¼; ¼; ¼µ ;Ü =´½; ½; ½; ½; ½µ

e f

d .

[B jÜ ] F

Note that (1),(2) are easy and (3) can by found in [24] (p. 357). The rows of the matrix b (resp.

7

[B AG´¿; ¾µ Ë [B jÜ] jÜ ]

F 8 Æ

c ) span the circuit space of a matroid known as (resp. ). If is a matrix whose

7

ÈÓÖØ´Å; eµ Æ rows span the circuits of Å , then by definition of sources, is a source of . Thus,

Remark 3.4.

·

£

F É

¯ has a unique source, namely .

7

6

·

¯ F b´É µ Ü = Ü Ä Ü = Ü b´É µ Ü = Ü

6 a F b 7 c

7 has three sources: (when ), (when ), and (when ).

7

¯ Ê b´Ç µ Ü = Ü

à f

½¼ has six sources including (when ). 5

Luetolf and Margot [16] have enumerated all minimally nonideal clutters with at most ½¼ elements (and many

more). Using Remark 3.4, we can then readily check the following.

´Å; ¦µ

Proposition 3.5. Let À be the clutter of odd circuits of a signed matroid .

¯ Å = Ê À = b´Ç µ À Ã

If ½¼, then either or is ideal.

5

¯ Å = F À = Ä À F

If 7 , then either or is ideal.

7

£

Å = F À

¯ If , then is ideal. 7 8GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

4. MULTICOMMODITY FLOWS

In this section, we show that a binary clutter À is ideal exactly when certain multicommodity flows exist

´Àµ

in the matroid Ù . This equivalence will be used in Sections 6 and 7 to show that minimally nonideal

Ë Ô : Ë ! É Ì  Ë

binary clutters do not have small separations. Given a set , a function ·, and , we write

È

Ô´iµ ´Ì µ ´Å; F µ Å

Ô for . Consider a signed matroid . The set of circuits of that have exactly one

i¾Ì

F ª Ô : E ´Å µ ! É Å ·

element in common with , is denoted F . Let be a cost function on the elements of .

Å; F; Ôµ

Seymour [26] considers the following two statements about the triple ´ . Å

For any cocircuit D of :

´D \ F µ  Ô´D F µ:

Ô (4.1)

 :ª ! É ·

There exists a function F such that:



X

Ô´eµ e ¾ F

 if

´C µ

 (4.2)

Ô´eµ e ¾ E F:

 if

C :e¾C ¾ª

F

Å F

We say that the cut condition holds if inequality (4.1) holds for all cocircuits D . We say that is -flowing

F Ô Å F

with costs Ô if statement (4.2) holds; the corresponding solution is an -flow satisfying costs . is -

Å F Ô F

flowing [26] if, for every Ô for which the cut condition holds, is -flowing with costs . Elements in

F

(resp. E ) are called demand (resp. capacity) elements. It is helpful to illustrate the aforementioned

f Ô´f µ

definitions in the case where Å is a graphic matroid [9]. For a demand edge , is the amount of flow

Ô´eµ

required between its endpoints. For a capacity edge e, is the maximum amount of flow that can be carried

Å F Ô by e. Then is -flowing with costs when a multicommodity flow meeting all demands and satisfying all

capacity constraints exists. The cut condition requires that for every cut the demand across the cut does not

f Å Å f

exceed its capacity. When F consists of a single edge and when is graphic then is -flowing [7].

´D \ F µ  Ô´D F µ= Ô´D µ Ô´D \ F µ Ô´F µ Ô´D \ F µ

The cut condition states Ô . Adding to both

´F µ  Ô´D µ Ô´D \ F µ·Ô´F µ Ô´D \ F µ= Ô´D 4 F µ

sides, we obtain Ô . Hence,

´F µ  Ô´D 4 F µ D

Remark 4.1. The cut condition holds if and only if Ô for all cocircuits .

´Å; F µ

Let À be the clutter of odd circuits of . We define:

X X

© ¨

Ü  ½; 8Ë ¾À;Ü ¾f¼; ½g; 8e ¾ E ´Å µ  ´À;Ôµ = ÑiÒ Ô´eµÜ :

e e

e (a)

e¾Ë

e¾E ´Å µ

X X

© ¨

£

Ý : Ý  Ô´eµ; 8e ¾ E ´Å µ;Ý  ¼; 8C ¾À  ´À;Ôµ = ÑaÜ

C C

C (b)

C ¾À C :e¾C ¾À

£

´À;Ôµ   ´À;Ôµ Ô´eµ=½ e ¾ E ´Å µ

By linear programming duality we have:  . When for all then we

£ £

´Àµ  ´À;Ôµ  ´Àµ  ´À;Ôµ

write  for and for .

À ´Å; F µ Ô : E ´Å µ ! É

Proposition 4.2. Let be the clutter of odd circuits of a signed matroid and let ·.

´À;Ôµ= Ô´F µ

(i)  if and only if the cut condition holds.

£

´À;Ôµ= Ô´F µ Å F Ô

(ii)  if and only if is -flowing with costs .

 ´C µ > ¼ C ¾ ª F ¾ b´Àµ Ô´F µ=  ´À;Ôµ

(iii) If for a solution to (4.2), then F for all with .

 E ´Å µ

Proof. We say that a set X is a (feasible) solution for (a) if its characteristic vector is. Consider

´À;Ôµ= Ô´F µ F (i). Suppose  . We can assume that is an inclusion-wise minimal solution of (a) and thus

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 9

¾ b´Àµ D Å Ë ¾À Ë Å jD \ Ë j

F . Let be any cocircuit of and consider any . Since is a circuit of , is even

jF \ Ë j j´D 4 F µ \ Ë j D 4 F À

and since À is binary, is odd. Thus is odd. It follows that is a transversal of .

4 F Ô´F µ  Ô´D 4 F µ Therefore, D is a feasible solution to (a) and we have . Hence, by Remark 4.1, the

cut condition holds. Conversely, assume the cut condition holds and consider any set X that is feasible for

´F µ  Ô´X µ X X ¾ b´Àµ

(a). We need to show Ô . We can assume that is inclusion-wise minimal, i.e. that .

X Å D := F 4 X Å

Observe that F and intersect circuits of with the same parity. Thus is a cocycle of .

´F µ  Ô´D 4 F µ= Ô´X µ

Since the cut condition holds, by Remark 4.1, Ô .

£ £

´À;Ôµ= Ô´F µ  ´À;Ôµ   ´À;Ôµ  Ô´F µ

Consider (ii). Suppose  . Since , it follows from linear Ý

programming duality that F is an optimal solution to (a). Let be an optimal solution to (b). Complementary

È

jF \ C j > ½ Ý =¼ Ý = C

slackness states: if , then the corresponding dual variable . Thus C

C :e¾C ¾À

È È

e ¾ E ´Å µ e ¾ F Ý = Ô´eµ Ý C

C , for all . Complementary slackness states: if , then .

C :e¾C ¾ª C :e¾C ¾ª

F F

 ´C µ=Ý C ¾ ª  F

Hence, choosing C for every satisfies (4.2). Conversely, suppose is a solution to (4.2).

È

e ¾ F   >Ô´eµ C

For each such that C , reduce the values on the left hand side until equality

C : e¾C ¾ª

F

F e e ¾ F

holds. Since C contains no element of other than , we can get equality for every . So we may

È

e ¾ E ´Å µ Ý =¼ C 6¾ ª Ý =  ´C µ C ¾ ª  ´C µ  Ô´eµ

F C F

assume for all . Set C if and if .

C :e¾C ¾ª

F

F; Ý F Ý Now Ý is a feasible solution to (b) and satisfy all complementary slackness conditions. Thus and

must be a pair of optimal solutions to (a) and (b) respectively.

Ý Ý > ¼

Finally, consider (iii). From (ii) we know there is an optimal solution to (b) with C . By comple-

F \ C j =½ F £

mentary slackness, it follows that j for all that are optimal solutions to (a).

F Ô The last proposition implies in particular that, if Å is -flowing with costs , then the cut condition is

satisfied. We say that a cocircuit D is tight if the cut condition (4.1) holds with equality, or equivalently

´F µ=Ô´D 4 F µ

(Remark 4.1) if Ô .

F Ô D C

Proposition 4.3. Suppose Å is -flowing with costs and let be a tight cocircuit. If is a circuit with

´C µ > ¼ C \ D = ; C \ D = fe; f g e ¾ E ´Å µ F f ¾ F

 , then or where and .

C \ D 6= ; C ¾ ª C \ F = ff g C \ D 6= ff g

Proof. We may assume .As F , it follows that . Moreover, , since

¼

e; e ¾ ´C \ D µ F

Å is binary. To complete the proof, it suffices to show that there is no pair of elements .

¼

= D 4 F D Ô´F µ= Ô´D 4 F µ=

Suppose for a contradiction that we have such a pair and let F .As is tight,

¼ ¼ ¼

¼

Ô´F µ C ¾ ª e; e ¾ F £

. It follows from Proposition 4.2(iii) that F . But , a contradiction.

´Å; F µ À Å

Corollary 4.4. Let À be the clutter of odd circuits of a signed matroid . (i) If is ideal then

F Ô Ô : E ´Å µ ! É ´Å; F; Ôµ À

is -flowing with costs , for all · where satisfies the cut condition. (ii) If

¼ ¼

Å F Ô Ô : E ´Å µ ! É F ¾ b´Àµ

is nonideal then is not -flowing with costs , for some · and some that

¼

´F µ

minimizes Ô .

£

´À;Ôµ=Ô´F µ À  ´À;Ôµ= ´À;Ôµ

Proof. Consider (i). Proposition 4.2 states  . Because is ideal, , i.e.

£

´F µ=  ´À;Ôµ Å F Ô À

Ô . This implies by Proposition 4.2(ii) that is -flowing with costs . Consider (ii). If

£ ¼

Ô : E ´Å µ ! Z  ´À;Ôµ > ´À;Ôµ F

is nonideal then for some ·, [5]. Let be an optimal solution to (a).

¼ ¼ ¼

´F µ=  ´À;Ôµ F ¾ b´Àµ Å F Ô £ Then Ô and . Proposition 4.2(ii) states is not -flowing with costs .

We leave the next result as an easy exercise.

10 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

Ù´Àµ F F ¾ b´Àµ

Corollary 4.5. A binary clutter À is ideal if and only if is -flowing for every .

À = Ç F Ã E ´Ã µ F Ã

5 5 ¾;¿

Consider the case where à . Let be a set of edges of such that induces a .

5

F ¾ b´Àµ Ù´Àµ à F

Then and (the graphic matroid of 5 )isnot -flowing.

5. CONNECTIVITY, PRELIMINARIES

jE j

E ;E E Å Ö :¾ ! Z Å

¾ ·

Let ½ be a partition of the elements of a matroid and let be the rank function.

E ;E Ö ´E µ·Ö ´E µ Ö ´E µ  k ½ jE j; jE j k jE j; jE j >k

¾ ½ ¾ ½ ¾ ½ ¾

is said to have a k-separation ½ if and .If ,

£

Å k E ;E Å ¾

then the separation is said to be strict. A matroid has a -separation ½ if and only if its dual does

k ½µ

(Oxley [21], 4.2.7). A matroid is k-connected if it has no ´ -separation and is internally k-connected if

k ½µ

it has no strict ´ -separation. A 2-connected matroid is simply said to be connected. We now follow

k Å ;Å E ´Å µ;E´Å µ

¾ ½ ¾

Seymour [24] when presenting -sums. Let ½ be binary matroids whose element sets

Å 4 Å E ´Å µ 4 E ´Å µ

¾ ½ ¾

may intersect. We define ½ to be the binary matroid on where the cycles are all

E ´Å µ 4 E ´Å µ C 4 C C Å i =½; ¾

¾ ½ ¾ i i the subsets of ½ of the form where is a cycle of , . The following special cases will be of interest to us:

Definition 5.1.

E ´Å µ \ E ´Å µ=; Å 4 Å Å ;Å

¾ ½ ¾ ½ ¾

(1) ½ . Then is the 1-sum of .

E ´Å µ \ E ´Å µ=ff g f Å Å Å 4 Å Å ;Å

¾ ½ ¾ ½ ¾ ½ ¾

(2) ½ and is not a loop of or . Then is the 2-sum of .

jE ´Å µ \ E ´Å µj =¿ E ´Å µ \ E ´Å µ Å Å Å 4 Å

¾ ½ ¾ ½ ¾ ½ ¾

(3) ½ and is a circuit of both and . Then is the

Å ;Å ¾

3-sum of ½ .

k Å Å Å ª Å E ´Å µ \ E ´Å µ

¾ ½ k ¾ ½ ¾

We denote the -sum of ½ and as . The elements in are called the markers

Å i =½; ¾ k =½; ¾; ¿ k

of i ( ). As an example, for , the -sum of two graphic matroids corresponds to taking

two graphs, choosing a k -clique from each, identifying the vertices in the clique pairwise and deleting the

edges in the clique. The markers are the edges in the clique. We have the following connection between k

k -separations and -sums.

k k ¾f½; ¾; ¿g Å

Theorem 5.2 (Seymour [24]). Let Å be a -connected binary matroid and . Then has a

k Å ª Å Å Å Å

k ¾ ½ ¾

-separation if and only if it can be expressed as ½ . Moreover, (resp. ) is a minor of

E ´Å µ E ´Å µ E ´Å µ E ´Å µ

½ ½ ¾

obtained by contracting and deleting elements in ¾ (resp. ).

Ù´Àµ

We say that a binary clutter À has a (strict) k-separation if does.

½ A´Àµ À Remark 5.3. À has a -separation if and if is a block diagonal matrix. Moreover, is ideal if and

only if the minors corresponding to each of the blocks are ideal.

ÈÓÖØ´Å; eµ

Recall (Proposition 2.11) that every binary clutter À can be expressed as for some binary

e À

matroid Å with element . So we could define the connectivity of to be the connectivity of the associated

Å Ä

matroid . The two notions of connectivity are not equivalent as the clutter F illustrates. The matroid

7

AG´¿; ¾µ F ÈÓÖØ´AG´¿; ¾µ;ص= Ä Ä

F F

has a strict 3-separation while 7 does not, but and is the clutter of

7 7

¡

F ;E´F µ 7 odd circuits of the signed matroid 7 . Chopra [4] gives composition operations for matroid ports and sufficient conditions for maintaining ide- alness. This generalizes earlier results of Bixby [1]. Other compositions for ideal (but not necessarily binary IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 11 clutters) can be found in [19, 17, 18]. Novick-Seb¨o [20] give an outline on how to show that mni binary

clutters do not have 2-separations, the argument is similar to that used by Seymour [26](7.1) to show that ¾ k -cycling matroids are closed under -sums. We will follow the same strategy (see Section 6). Proving that

mni binary clutters do not have 3-separations is more complicated and requires a different approach (see

Ä b´Ç 4 ; Ç µ

F Ã

Section 7). In closing observe that none of à and have strict -separations. So if Seymour’s

7 5 5

Conjecture holds, then mni binary clutters are internally 5-connected.

6. 2-SEPARATIONS

´Å; F µ ¾ E ;E Å = Å ª Å E = E ´Å µ

¾ ½ ¾ ¾ ½ ½

Let be a signed matroid with a -separation ½ , i.e. and

E ´Å µ;E = E ´Å µ E ´Å µ ´Å ;F µ i =½; ¾ ´Å; F µ

¾ ¾ ¾ ½ i

. We say that i (for )isapart of if it is a signed minor

´Å; F µ F ´Å ;F µ

i i

of . It is not hard to see that at most two choices of i can give distinct signed matroids .

Å; F µ Therefore ´ can have at most four distinct parts. In light of Remark 2.5 we can identify binary clutters with signed matroids. The main result of this section is the following.

Proposition 6.1. A binary clutter with a 2-separation is ideal if and only if all its parts are ideal.

To prove this, we shall need the following results.

Å = Å ª Å Å Å Å

¾ ¾ ½ ¾ Proposition 6.2 (Seymour [24]). If ½ , then is connected if and only if and are

connected.

Å ¾ E ;E C ;C

¾ ½ ¾

Proposition 6.3 (Seymour [24]). Let be a binary matroid with a -separation ½ and let be

Å C \ E  C \ E C \ E = C \ E i =½; ¾

i ¾ i ½ i ¾ i

two circuits of .If ½ , then (for ).

Å = Å ª Å C Å C \ E 6= ;

¾ ¾ ½

Proposition 6.4 (Seymour [24]). Let ½ . Then choose any circuit of such that

C \ E 6= ; i; j =½; ¾ i 6= j f ¾ C \ E Å = Å Ò ´E C µ=´E \ C ff gµ

j i j j

and ¾ . Let and . For any , .

Å = Ù´Àµ F ¾ b´Àµ

Proof of Proposition 6.1. Let À be a binary clutter with a 2-separation, and . Assume À

without loss of generality that Å is connected. Remark 2.5 states that is the clutter of odd circuits of

Å; F µ À ´Å; F µ

´ .If is ideal, then so are all its parts by Remark 2.9. Conversely, suppose all parts of are

Ô : E ´Å µ ! Z F ¾ b´Àµ Ô´F µ

ideal. Consider any · and assume minimizes . Because of Corollary 4.4(ii),

F Ô it suffices to show that Å is -flowing with costs . Observe that the cut condition is satisfied because of

Proposition 4.2(i).

Å ¾ Å ª Å i; j

¾ ¾

Since has a -separation, it can be expressed as ½ . Throughout this proof, will always

f½; ¾g F = F \ E f Å f

i i i i

denote arbitrary distinct elements of . Define i and let be the marker of . Since is

D Å f «

i i i

not a loop, there is a cocircuit i of using . Let denote the smallest value of

Ô[D ´F [ff gµ] Ô´D \ F µ:

i i i i

i (*)

D Å f D

i i i where i is any cocircuit of using . In what follows, we let denote some cocircuit where the

minimum is attained. Expression (*) gives the difference between the sum of the capacity elements and the

D f « · « = Ô´[D 4 D ] F µ Ô´[D 4

i ½ ¾ ½ ¾ ½

sum of the demand elements in i , excluding the marker . Thus

D ] \ F µ D 4 D Å

½ ¾

¾ . Since is a cocycle of and the cut condition is satisfied, we must have:

« · «  ¼:

½ ¾

12 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

« > ¼ ´Å ;F µ f

i i i

Claim 1. If i , then there is an even circuit of that uses marker .

C Å f jC \ F j

i i

Proof of Claim: Suppose for a contradiction that all circuits of i that use , satisfy odd. Then

D = F [ff g Å i

i intersects all these circuits with even parity. By hypothesis is connected and, because of

Å f i

Proposition 6.2, so is i . We know from Theorem 2.7 that all circuits that do not use the marker are the

f D Å i

symmetric difference of two circuits that do use i . It follows that intersects all circuits of with even

D Å D D

parity. Thus is a cocycle of i . But expression (*) is nonpositive for cocycle . can be partitioned f

into cocircuits. Because the cut condition holds, expression (*) is nonpositive for the cocircuit that uses i ,a

« > ¼ ¿

contradiction as i .

« < ¼ ´Å ;F µ f

i i i

Claim 2. If i , then there is an odd circuit of that uses marker .

C Å f jC \ F j

i i

Proof of Claim: Suppose, for a contradiction, that all circuits of i that use , satisfy even. By

Å F F j

the same argument as in Claim 1, we know that in fact so do all circuits of i . This implies that and

F F ¾ b´Àµ

intersect each circuit of Å with the same parity. As is inclusion-wise minimal ( ) we must have

F = F F = ; ¿ i

j , i.e. . But this implies that expression (*) is non negative, a contradiction.

« < ¼ « > ¼ ´Å ;F [ff gµ ´Å ;F µ ´Å; F µ

j i i i i i

Claim 3. If j (resp. ), then (resp. ) is a part of .

C f ´Å ;F µ

j j

Proof of Claim: From Claim 2 (resp. Claim 1), there is an odd (resp. even) circuit using j of .

C \ E Å Ò ´E C µ Å i

Proposition 6.3 implies that elements are in series in j . Proposition 6.4 implies that

Å Ò ´E C µ C \ E f

j j

is obtained from j by replacing series elements of by a unique element . The required

´Å; F µ Ò ´E C µ=´C ff gµ f C \ E ¿ j

signed minor is j where is any element of .

« · «  ¼ ¾

Because ½ , it suffices to consider the following cases.

«  ¼;«  ¼ ¾

Case 1: ½ .

Å Å Å Ò Â =Â

d c

We know from Proposition 6.4 that i is a minor of (where no loop is contracted) say .

^ ^

i =½; ¾ ´Å ; F µ ´Å; F µ Ò Â =Â ´Å ; F µ ´Å; F µ

i d c i i

For , let i be the signed minor . Since is a part of , it is ideal.

i

^

´Å ; F µ Ò f =´Å Ò f ;F µ Ô : E ´Å µ f ! Z

i i i i i i i ·

So in particular i are ideal. Let be defined as follows:

i

Ô ´eµ=Ô´eµ e ¾ E D Å Ò f Ô´D \ F µ  Ô´D F µ

i i i i

if i . Let be a cocircuit of . The inequality follows

«  ¼ D [ f Å

i i

from i when is a cocircuit of and it follows from the fact that the cut condition holds for

´Å; F µ D Å ´Å Ò f ;F µ

i i i

when is a cocircuit of i . Therefore the cut condition holds for . It follows from

i

F Ô  =ª ! É

i F ·

Corollary 4.4(i) that each of these signed matroids has an i -flow satisfying costs . Let

i

Ô  ´C µ ¾ Z ·

be the corresponding function satisfying (4.2). By scaling , we may assume i for each circuit in

ª Ä C ª  ´C µ Ä

i F i j

F . Let be the multiset where each circuit in appears times. Define similarly. The union

i i

Ä Ä F Å Ô j

(with repetition) of all circuits in i and correspond to an -flow of satisfying costs .

« < ¼;« > ¼ j

Case 2: i .

i

´Å ;F µ ´Å ;F [ff gµ ´Å; F µ Ô : E ´Å µ ! Z

i j j j i ·

Because of Claim 3, there are parts i and of . Let be

i i j

Ô ´f µ= « Ô ´eµ=Ô´eµ e ¾ E Ô : E ´Å µ ! Z

j i j ·

defined as follows: i and for . Let be defined as follows:

j j

Ô ´f µ= « Ô ´eµ=Ô´eµ e ¾ E Ô F Å

i j i i

j and for . Since we can scale , we can assume that the -flow of

i i j

Ô Ä F [ff g Å Ô

j j

satisfying costs is a multiset of circuits and that the j -flow of satisfying costs is a multiset

j Ð Ð Ð Ð Ð

Ä Ð =½; ¾ Ä Ä := fC ¾Ä : f 6¾ C g Ä := fC ¾Ä : f ¾ C g Ð

.For , can be partitioned into Ð , and .

¼ ½

j

j j

f Ä jÄ f j = Ô ´f µ= «

j i i

Since is a demand element for the flow , j . Since is a capacity element for the

½

j

i i i i

j jÄ j Ä jÄ jÔ ´f µ= « « · «  ¼ jÄ Å

j ½ ¾

flow , i . Because , . Let us define a collection of circuits of

½ ½ ½

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 13

j j

i i

Ä [Ä C ¾Ä C ¾Ä i

as follows: include all circuits of . Pair each circuit j with a different circuit , and

¼ ½

¼ ½

C 4 C F j

add to the collection the circuit included in i that contains the element of . The resulting collection

Å Ô £ corresponds to a F -flow of satisfying costs .

7. 3-SEPARATIONS

The main result of this section is the following,

Proposition 7.1. A minimally nonideal binary clutter À has no strict 3-separation.

The proof follows from two lemmas, stated next and proved in sections 7.1 and 7.2 respectively.

À E ;E ¾

Lemma 7.2. Let be a minimally nonideal binary clutter with a strict 3-separation ½ . There exists a

F ¾ b´Àµ F  E F  E ¾

set of minimum cardinality such that ½ or .

´Å; F µ E ;E Å = Å ª Å E = E ´Å µ

¾ ½ ¿ ¾ ½ ½

Let be a signed matroid with a strict 3-separation ½ , i.e. and

E ´Å µ;E = E ´Å µ E ´Å µ C = E ´Å µ \ E ´Å µ Å Å

¾ ¾ ½ ¼ ½ ¾ ½ ¾

¾ . Let be the triangle common to both and .



i =½; ¾ Å C Å

i ¼

Let i (with ) be obtained by deleting from a (possibly empty) set of elements of . We call



´Å ;F µ ´Å; F µ ´Å; F µ i

i a part of if it is a signed minor of .

´Å; F µ ¿ E ;E ¾

Lemma 7.3. Let be a connected signed matroid with a strict -separation ½ and suppose

F  E Å F Ô ´Å; F µ

½ . Then is -Flowing with costs if the cut condition is satisfied and all parts of are ideal.

Proof of Proposition 7.1. Suppose À is a mni binary clutter that is connected with a strict 3-separation. Re-

À ´Å; F µ Ô : E ´Å µ ! Z

mark 2.5 states that is the clutter of odd circuits of a signed matroid . Consider ·

£

´eµ=½ e ¾ E ´Å µ  ´À;Ôµ > ´À;Ôµ

defined by Ô for all . We know (see Remark 7.5) that . From

F  E Ô´F µ= ´À;Ôµ

Lemma 7.2 and Remark 2.5, we may assume ½ and . It follows from Proposi-

Å; F µ ´Å; F µ

tion 4.2(i) that the cut condition holds. Since the separation of ´ is strict, all parts of are proper

F Ô

minors, and hence ideal. It follows therefore from Lemma 7.3 that Å is -flowing with costs . Hence,

£

´À;Ôµ=Ô´F µ £ because of Proposition 4.2(ii),  , a contradiction.

7.1. Separations and blocks. In this section, we shall prove Lemma 7.2. But first let us review some results

¼; ½ A´Àµ

on minimally nonideal clutters. For every clutter À, we can associate a matrix . Hence we shall

; ½ ¼; ½ ¼; ½ talk about mni ¼ matrices, blocker of matrices, and binary matrices (when the associated clutter is binary). The next result on mni 0,1 matrices is due to Lehman [15] (see also Padberg [22], Seymour [27]).

We state it here in the binary case.

Ò B = b´Aµ

Theorem 7.4. Let A be a minimally nonideal binary 0,1 matrix with columns. Then is minimally

 

A B B

nonideal binary as well, the matrix A (resp. ) has a square, nonsingular row submatrix (resp. ) with

 

A B × Ö× > Ò A B

Ö (resp. ) nonzero entries in every row and columns, . Rows of (resp. ) not in (resp. ) have

Ì

 

·½ × ·½ AB =  ·´Ö× ÒµÁ Â Ò ¢ Ò at least Ö (resp. ) nonzero entries. Moreover, , where denotes an

matrix filled with ones.

½ ½

Ò

´ fÜ ¾ Ê : AÜ  ½g µ

It follows that ;:::; is a fractional extreme point of the polyhedron . Hence,

·

Ö Ö

£

 ´Àµ > ´Àµ Remark 7.5. If À is a minimally nonideal binary clutter, then .

14 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN



A À A = A´Àµ À

The submatrix A is called the core of . Given a mni clutter with , we define the core of to

  

À ´ À µ=A À G = b´Àµ À; G

be the clutter for which A . Let and be binary and mni. Since are binary, for all

Ì

    

¾ À Ì ¾ G jË \ Ì j A B =  ·´Ö× ÒµÁ Ë ¾ À

Ë and ,wehave odd. As , for every , there is exactly one set



¾ G Ë jË \ Ì j = ½·´Ö× Òµ A Ö× Ò ·½  ¿

Ì called the mate of such that . Note that if is binary then .



ÑÒi A

Proposition 7.6. Let A be a binary matrix. Then no column of is in the union of two other columns.

Ì

   

¼; ½ B A B =  ·´Ö× ÒµÁ

Proof. Bridges and Ryser [2] proved that square matrices A; that satisfy

Ì

   

B =  ·´Ö× ÒµÁ cÓÐ ´A; iµcÓÐ ´B; iµ= Ö× Ò ·½  ¿ i ¾f½;:::;Òg

commute, i.e. A . Thus for every .

  

¾f½;:::;Òg fig cÓÐ ´ A; j µ [ cÓÐ ´A; k µ  cÓÐ ´A; iµ

Hence there is no j; k such that , for otherwise

Ì

     

A B =  ·´Ö× ÒµÁ ´A; j µcÓÐ ´B; iµ > ½ cÓÐ ´ A; kµcÓÐ ´B; iµ > ½ £

cÓÐ or , contradicting the equation .



À e ¾ E ´Àµ Ë ;Ë ;Ë ¾ À

¾ ¿

Proposition 7.7 (Guenin [10]). Let be a mni binary clutter and . There exists ½

Ë \ Ë = Ë \ Ë = Ë \ Ë = feg

¾ ¾ ¿ ½ ¿

such that ½ .



À Ë ;Ë ¾ À Ë  Ë [ Ë Ë ¾À

¾ ½ ¾

Proposition 7.8 (Guenin [10]). Let be a mni binary clutter and ½ .If and

Ë = Ë Ë = Ë ¾

then either ½ or .

¼ ¼



Ë; Ë ¾ À jË Ë j¾

Proposition 7.9. Let À be a mni binary clutter and let . Then .

¼

Ë jÌ \ Ë j¿ jÌ \ Ë j =½ £

Proof. Let Ì be the mate of . Then and .



 ´Àµ= ´ À µ

Proposition 7.10 (Luetolf and Margot [16]). Let À be a mni binary clutter. Then . Further-

 

À jÌ j =  ´ Àµ Ì À more, if Ì is a transversal of and , then is a transversal of .

We shall also need,

Å ¿ E ;E ¾

Proposition 7.11 (Seymour [24]). Let be a binary matroid with -separation ½ . Then there exist

C ;C Å ¾

circuits ½ such that every circuit of can be expressed as the symmetric difference of a subset of

fC ¾ ª´Å µ:C  E C  E g[fC ;C g

¾ ½ ¾

circuits in ½ or .

´Å; F µ ¿ E ;E C ;C

¾ ½ ¾

Throughout this section, we shall consider a signed matroid with a -separation ½ and

´Å; F µ

will denote the corresponding circuits of Proposition 7.11. Let À be the clutter of odd circuits of .We

b´Àµ B ;B ;B ;B

¾ ¿ 4

shall partition into sets ½ as follows:

B = fË ¾ b´Àµ:jË \ C \ E j jË \ C \ E j g

½ ½ ¾ ½

½ even, even

B = fË ¾ b´Àµ:jË \ C \ E j jË \ C \ E j g

¾ ½ ½ ½

even, ¾ odd

B = fË ¾ b´Àµ:jË \ C \ E j jË \ C \ E j g

½ ½ ¾ ½

¿ odd, even

B = fË ¾ b´Àµ:jË \ C \ E j jË \ C \ E j g:

½ ½ ¾ ½

4 odd, odd

Ë ;Ë ¾ B i ¾f½;:::;4g ´Ë \ E µ [ ´Ë \ E µ b´Àµ

¾ i ½ ½ ¾ ¾

Proposition 7.12. If ½ where , then contains a set of .

¼

Ë := ´Ë \ E µ [ ´Ë \ E µ Ë ;Ë ¾ b´Àµ C Å jË \ C j

½ ¾ ¾ ½ ¾ ½

Proof. Let ½ . Note that since for all circuits of ,

jË \ C j C C  E k ¾f½; ¾g C k

and ¾ have the same parity. This implies that if is a circuit where ( ) then

¼ ¼

Ë Ë B Ë i

intersects and ½ with the same parity. It also implies, together with the definition of , that intersects

¼

C k ¾f½; ¾g Ë Ë Ë

½ ½

k ( ) with the same parity as . It follows from Proposition 7.11 that and intersect all £ circuits of Å with the same parity.

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 15

G À B ;B ;B ;B G

¾ ¿ 4

Proof of Lemma 7.2. Let denote the blocker of and let ½ be the sets partitioning .We

  

G G B G i ¾f½;:::;4g

will denote by the core of . It follows that can be partitioned into sets i with and

  

B  B Ë ¾ G Ë \ E 6= ; 6= Ë \ E B

i ½ ¾ i

i . Assume for a contradiction that for all , . We will say that a set

¼ ¼



i ¾f½;:::;4g E Ë; Ë ¾ B Ë \ E = Ë \ E 6= ;

i ½ ½

with forms an ½ -block if, for all pairs of sets ,wehave . E

Similarly we define ¾ -blocks.



i ¾f½;:::;4g B E E

½ ¾

Claim 1. For , each nonempty i is either an -oran -block.



Ë ;Ë B ´Ë \ E µ [ ´Ë \ E µ

¾ i ½ ½ ¾ ¾

Proof of Claim: Consider ½ in . Proposition 7.12 states that contains a set

¼ ¼ ¼ ¼

Ë ¾G Ë = Ë Ë = Ë Ë = Ë ´Ë \ E µ=´Ë \ E µ

¾ ½ ½ ¾ ¾ ¾

. Proposition 7.8 implies that ½ or .If then .If

¼ ¼ ¼

Ë = Ë ´Ë \ E µ=´Ë \ E µ Ë \ E Ë \ E

½ ½ ½ ¾ ½ ¾

¾ then . Moreover, by hypothesis neither nor is empty. Since

¼ ¿

Ë; Ë were chosen arbitrarily, the result follows.

   

B B Ë ¾ B E ´B µ Ë \ E E

i i i ½ ½

For any nonempty , consider any i . We define to be equal to if is an -block,

  

Ë \ E B E Ö × À G

i ¾

and to ¾ if is an -block. Let (resp. ) be the cardinality of the members of (resp ) and



= jE ´Àµj À Ö  ¿ ×  ¿

Ò .As is binary and .

   

Í  E ´ G µ E ´ B µ Í B G i

Claim 2. Let be a set that intersects for each nonempty i . Then is a transversal of

Í j  ´G µ= Ö

and j .

  

G jÍ j  ´ G µ  ´ G µ= ´G µ ¿

Proof of Claim: Clearly Í is a transversal of , thus . Proposition 7.10 states .

¼ ¼ ¼

 

G  ´G µ= jÍ j = jÍ j jÍ Í j ¾

Claim 3. Let Í; Í be distinct transversals of .If then .

¼ ¼



Í G Í; Í ¾ À Proof of Claim: Proposition 7.10 imply that Í and are minimum transversals of . Hence, .

The result now follows from Corollary 7.9. ¿

 B

Claim 4. None of the i is empty.

 

Í E ´ B µ B i

Proof of Claim: Let be a minimum cardinality set that intersects i for each nonempty . Since



Ö  ¿ B

, it follows from Claim 2 that at most one of the i can be empty. Assume for a contradiction that

   

Í E ´ B µ E ´B µ B B

½ ¾ 4

one of the i , say , is empty. It follows from Claim 2 and the choice of that each of , ,

  

E ´B µ Í E ´ B µ E ´B µ

½ ¾

¿ are pairwise disjoint (otherwise contains an element common to at least 2 of , ,

¼

   

E ´B µ jÍ j ¾ jE ´ B µj > ½ Ø ;Ø E ´ B µ Ø ¾ E ´B µ

½ ½ ½ ¾ ¾

¿ and ). If , then let be distinct elements of . Let and

½

¼ ¼

 

Ø ¾ E ´B µ Í = fØ ;Ø ;Ø g Í = fØ ;Ø ;Ø g jE ´ B µj =½

¿ ½ ¾ ¿ ¾ ¿ ½

¿ . Then and contradict Claim 3. Thus and

½

    

jE ´ B µj = jE ´B µj =½ jE j > ¿ jE j > ¿ B ; B ; B E

¿ ½ ¾ ½ ¾ ¿ ½

similarly, ¾ .As and , are not all -blocks and not

  

B ; B B E E E Ø

½ ¾ ¿ ½ ¾ ½

all ¾ -blocks. Thus w.l.o.g. we may assume are -blocks and is an -block. Let be any

   

E E ´B µ E ´B µ Ø E ´ B µ A´ G µ

½ ¾ ¾ ¿

element in ½ and be the unique element in . Then the column of indexed



Ø A´ G µ Ø ¿ ¾

by ½ is included in the column of indexed by , a contradiction to Proposition 7.6.

  

B E E ´ B µ A´G µ

½ i Consider first the case where every i is an -block. Suppose that no two intersect. Then

has four columns that add up to the vector of all ones. By Theorem 7.4, each of these columns has × ones



G =4×

and therefore Ò . Furthermore the four elements that index these columns form a transversal of



Ö  4 Ö× > Ò E ´ B µ

and therefore (see Claim 2). This contradicts Theorem 7.4 stating that . Thus two i

 

Ò =4× Ö× > Ò Ø B B ¾

intersect, say ½ and . For otherwise , a contradiction to . Let be any element of

   

E ´B µ \ E ´B µ g g E ´B µ E ´B µ Í = fØ; g ;g g

¾ ¿ 4 ¿ 4 ¿ 4

½ and let (resp. ) be any element of (resp. ). Let . It follows

 

Ö =¿ E ´ B µ E ´B µ 4 from Claim 2 that . It follows from Claim 3 that each of ¿ and have cardinality one, and

16 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

  

E ´B µ \ E ´B µ e A´ G µ ¾

½ contains a unique element . Since there are no dominated columns in we have that

 

E ´B µ feg = E ´B µ feg = ; jE j ¿

¾ ½ ½ . Thus , a contradiction to the hypothesis that the 3-separation is

strict.

   

B ; B E B ; B E

¾ ½ ¿ 4 ¾

Consider now the case where ½ are -blocks and are -blocks. Suppose there exists



e ¾ E ´Àµ E ´ B µ i ¾f½;:::;4g e ¾ E ½

that is not in any of i for . Assume without loss of generality that .

  

e A´ G µ f ¾ E ´B µ f ¾ E ´B µ

¿ ¾ 4

Then column of is included in the union of any two columns ½ and ,a



E ´Àµ E ´ B µ i ¾f½;:::;4g

contradiction to Proposition 7.6. Thus every element of is in i for some . Suppose

 

e ¾ E ´ B µ \ E ´B µ Í = fe; f ;f g Ö =¿

¾ ½ ¾

there is ½ . Let . Then Claim 2 implies and Claim 3 implies that

   

jE ´B µj = jE ´B µj =½ jE j =¾ E E ´ B µ;E´B µ

4 ¾ ½ ½ ¾

¿ . Hence , a contradiction. Thus is partitioned into ,

 

E E ´ B µ;E´B µ Ö =4 i ¾

¿ 4

and ¾ is partitioned into .If , then we can use Claim 3 to show that for each



f½;:::;4g jE ´B µj =½ jE j = jE j =¾ Ö =¿ Ì = fÙ; Ú ; Û g

½ ¾

, i . A contradiction as then . Thus and let

 

G Ù; Ú ¾ E ´ B µ i ¾f½;:::;4g i =¿

be a minimum transversal of . Suppose both i for some , say .If

 

Ì  E Û ¾ E ´ B µ Ì Ì B

¾ 4

, then ,as is a transversal. It then follows that intersects all sets of ¿ with even

 

À Û ¾ E ´ B µ Û B 4

parity, a contradiction as is binary. Thus we may assume ½ and intersects all sets in .

  

G Ü ¾ E ´ B µ;Ý ¾ E ´B µ fÛ ; Ü; Ý g ¿

It follows that, for any ¾ , the set is a transversal of , a contradiction to



Ì = fÙ; Ú ; Û g Ì E ´ B µ

Claim 3. Hence for any transversal each element of is in a different i . We may

   

Ù ¾ E ´B µ;Ú ¾ E ´B µ;Û ¾ E ´B µ Ü ¾ E ´ B µ fÜ; Ú ; Û g

¿ 4 ½

assume ½ . It follows that for any , is a transversal



E ´ B µ Ø jE j > ¾ ½

and thus by Claim 3 ½ contains a unique element . Since , we cannot have a transversal

   

Ù ¾ E ´B µ;Ú ¾ E ´B µ;Û ¾ E ´B µ jE ´ B µj =½

¿ 4 ¾ ¾ , as this would imply . Hence every minimum transversal

contains Ø, a contradiction to Theorem 7.4.

   

B ; B ; B B E E Ø ¾ E

½ ¾ ¿ 4 ¾ ½

Finally, consider the case where are ½ -blocks and is an -block. Note that every

 

E ´ B µ i ¾f½; ¾; ¿g Ø A´ G µ

is in some i for . Otherwise the corresponding column of is dominated by any

¼

   

Ø ¾ E ´B µ Ø ¾ E ´ B µ E ´B µ E ´B µ i; j; k

i j k

column 4 . Suppose there is where are distinct elements in

 

G f½; ¾; ¿g Ø jE ´ B µj =½

. Proposition 7.7 states there exist three sets of that intersect exactly in . This implies i .

     

E ´B µ 6= E ´B µ E ´ B µ E ´B µ E ´B µ jE ´B µj =½

k j i k j

Now since j , there is a column in say . Thus . Similarly,

   

jE ´B µj =½ jE j > ¿ E ´B µ  E ´B µ [ E ´B µ i; j; k ¾f½; ¾; ¿g

½ i j k

k , a contradiction to . Thus for all distinct

  

i; j; k ¾f½; ¾; ¿g E ´ B µ;E´B µ E ´ B µ

k i

and therefore either (1) for some distinct , j is a partition of or (2)

 

E ´B µ \ E ´B µ 6= ; i; j ¾f½; ¾; ¿g Í j

i , for each distinct . By considering sets containing one element of

   

E ´B µ E ´ B µ;E´B µ E ´B µ jE j ¾

½ ¾ ¿ ½

4 and intersecting each of , and we can use Claim 3 to show that in

jE j ¿ £

Case (1) and ½ in Case (2), a contradiction.

7.2. Parts and minors. In this section, we prove Lemma 7.2. Consider the matroid with exactly three

½; ¾; ¿ C Á ;Á C

¼ ½ ¼

elements which form a circuit ¼ . Let be disjoint subsets of . We say that a signed matroid

´Æ; µ ´Á ;Á µ = Á Æ C

½ ½ ¼

is a fat triangle ¼ if and is obtained from by adding a parallel element for every

i ¾ Á [ Á ´Å; ¦µ C = f½; ¾; ¿g C \ ¦=;

½ ¼ ¼

¼ . Let be a signed binary matroid with a circuit where and let

i ¾ C C Å i C \ C = fig jC \ ¦j =½

i i ¼ i

¼ . A circuit of is a simple circuit of type if and . We say that a

C D \ C = ; jD \ C j =¾

cocircuit D has a small intersection with a simple circuit if either: ;or and the

\ ¦ D

unique element in C is in .

´Å; ¦µ C = f½; ¾; ¿g C \ ¦= ; ¼ Lemma 7.13. Let be a signed binary matroid with a circuit ¼ such that .

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 17

Á  C i ¾ Á C i i

(1) Let ¼ be such that for all there is a simple circuit of type . Suppose for all distinct

i; j ¾ C D D \ C = fi; j g D

ij ij ¼ ij

¼ we have a cocircuit where and has a small intersection with

fC : Ø ¾ Á g ´;;Áµ ´Å; ¦µ

the simple circuits in Ø . Then the fat triangle is a minor of .

C ½ D D \ C = f½; ¾g

½¾ ½¾ ¼

(2) Let ½ be a simple circuit of type . Suppose we have a cocircuit where and

D C C f½g[f¾g C f½g[f¾g

½ ½ ½

½¾ has a small intersection with .If is dependent then contains

´f¿g; f¾gµ ´Å; ¦µ

an odd circuit using ¾ and the fat triangle is a minor of .

i =½; ¾ C i D ½¾

(3) Suppose for each we have a simple circuit i of type . Suppose we have a cocircuit

D \ C = f½; ¾g D C C C f½g[ f¾g

¼ ½¾ ½ ¾ ½

where ½¾ and has a small intersection with and . If both

C f¾g[f½g ´;; f½; ¾gµ ´Å; ¦µ

and ¾ are independent, then the fat triangle is a minor of .

i; j; k C

Proof. Throughout the proof will denote distinct elements of ¼ .

i ¾ Á f C \ ¦ D D \ C = ;

i jk jk i

Let us prove (1). For each let i be the unique element in . For each either:

D \ C = ff ;g g g ¦ E C C

i i i i ¼ ¼ i

or jk where is an element not in . Let be the set of elements in or in any of

¾ Á

where i . Observe,

g f D ;D ;D g D D ;D

i ½¾ ½¿ ¾¿ i jk ij ik

(a) If i exists then is in each of and is in but not .

g f f D ;D D

i i ij ik jk

(b) If i does not exists but does then is in but not in .

:=´¦4 D 4 D 4 D µ \ E

½¿ ¾¿ ¼

Define ½¾ . Observe that (a) and (b) imply respectively (a’) and (b’).

g f 6¾ g ¾

i i

(a’) If i exists then and .

g f ¾ i

(b’) If i does not exist then .

´Æ; µ ´Å; ¦µ E

Let be the minor of obtained by deleting the elements not in ¼ and then contracting the

C [ C ´Æ; µ ¼

elements not in ¼ . It follows from (a’) and (b’) that if is a circuit then is the fat triangle

´;;Áµ i ¾ C Æ i =½ C Å

. Otherwise some element ¼ is a loop of , say . Then there is a circuit of such that

C  E ;C \ C = f½g C \ =; C \ C D D

¼ ¼ ½¾ ¾¿

¼ , and . Clearly does not intersect and with the same

e ¾ C C e D e 6¾ ij

parity. Consider any ¼ such that is in some cocircuit . Since , it follows from (a’) and

e = f i ¾ Á g e ¾ D \ D \ D

i ½¾ ½¿ ¾¿

(b’) that i for some and that exists. But then (a) implies that . It follows

C D D ¾¿

that cannot intersect ½¾ and with the same parity, a contradiction.

f C \ ¦ C C f½g[ ½

Let us prove (2). Let be the unique element in ½ . By hypothesis there is a circuit in

f¾g C ¾ ¾ C D C \ D = f½;fg

½¾ ½ ½¾

. Since ½ is a circuit . Since has a small intersection . It follows that

¼

C \ D = f¾;fg C ¿ C 4 C 4 C C ¿

½ ¼ ¼

½¾ . Let be the circuit using in . Since is a circuit, is not a loop, hence

¼

C f¿g g ´Æ; µ = ´Å; ¦µÒ´E ´Å µ C C µ=´C ff; ggµ

½ ½

contains at least one element say . Let ¼ .

f¾;fg ´Æ; µ f¿;gg C ´Æ; µ C ¼

Observe that is an odd cycle of and that and ¼ are even cycles of . Hence, if is

Æ ´Æ; µ ´f¿g; f¾gµ D Å f½; ¾;fg

a circuit of then is the fat triangle . Because ½¾ is a cocircuit of , is a cocycle

Æ ½; ¾;f ¿ Æ Ë  C f½; ¾;f;gg[ f¿g

of , in particular are not loops. If is a loop of then there is a circuit ½

¼ ¼

´Å; ¦µ C 4 Ë C 4 Ë  C C ½

of . But is a cycle and ½ , a contradiction as is a circuit.

¼

Å Å C [ C [ C

½ ¾

Let us prove (3). Let be obtained from by deleting all elements not in ¼ and let

¼ ¼ ¼

¦ := ´¦ 4 D µ \ E ´Å µ D C C ¦ = f½; ¾g

½¾ ½ ¾

½¾ . Since has a small intersection with and we have .

¼ ¼

Å ; f½; ¾gµ ´Å; ¦µ Æ Å Then ´ is a signed minor of . Choose a minor of which is minimal and satisfies the

following properties:

C Æ

(i) ¼ is a circuit of ,

i =½; ¾ C Æ C \ C = fig

i ¼ (ii) for there exist circuits i of such that ,

18 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

C f½g[ f¾g

(iii) ½ is independent,

C f¾g[ f½g

(iv) ¾ is independent.

¼

Å Æ

Note that by hypothesis Å satisfies properties (i)-(iv) and thus so does . Hence is well defined. We

jC j = jC j =¾ Æ ´Æ; f½; ¾gµ ´Å; ¦µ ¾

will show that ½ in . Then is a minor of and after resigning on the

½; ¾ ´;; f½; ¾gµ Ë  C f½g[f¿g Æ

cocircuit containing we obtain the fat triangle . There is no circuit ½ of ,

C 4 Ë 4 C  C f½g[ f¾g

¼ ½

for otherwise there exists a cycle ½ , a contradiction with (iii). Hence,

C f½g[ f¿g

Claim 1. ½ is independent.

C \ C = ; ¾

Claim 2. ½ .

¼ ¼

Æ := Æ=´C \ C µ Æ ¾

Proof of Claim: Otherwise define ½ . Note that satisfies (ii)-(iv). Suppose (i) does not

¼ ¼ ¼

Æ C Æ ¿ Æ Ë  C \ C

½ ¾

hold for , i.e. ¼ is a cycle but not a circuit of . Then is a loop of . Thus there is such

[f¿g Æ ¿

that Ë is a circuit of , contradicting Claim 1.

jC j > ¾ i ¾f½; ¾g i =½

Assume for a contradiction i for some , say .

Ë  C [ C f½; ¾g Æ ¾

Claim 3. There exists a circuit ½ of .

¼ ¼ ¼

e ¾ C f½g ´Æ ; µ:=´Æ; µ=e C Æ ¼

Proof of Claim: Let ½ and consider . Suppose is not a circuit of .

¿ Æ f¾;eg f¿;eg Æ

Then ¾ or is a loop of . But then either or is a circuit of . In the former case it contradicts

¼ ¼ Æ

(iii), in the latter it contradicts Claim 1. Hence (i) holds for Æ . Trivially (iii) holds for as well. Suppose

¼

C Æ Ë  C [feg f¾g Æ ¾

(ii) does not hold, then ¾ is not a circuit of . It implies there exists a circuit of .

Ë Ë  C [fe; ½g f¾g

Then is the required circuit. Suppose (iv) does not hold. Then there is a circuit ¾ of

Æ Ë 4 C ¿

, and ½ contains the required circuit.

¼

Ë C ;C Ë \ C ;Ë \ C C

¾ ½ ¾

Let be the circuit in the previous claim. Since ½ are circuits, are non-empty. Let be

¾

¼

µ C 4 Ë ¾ Æ Ò ´E ´Æ µ C C C

¼ ½

the circuit in ¾ which uses . Note that satisfies properties (i)-(iii) using

¾

¼ ¼ ¼ ¼

f¾g[f½g C C C C C

instead of ¾ . Thus, by minimality, (iv) is not satisfied for , i.e. contains a circuit .

¾ ¾ ¾ ½

¼ ¼ ¼ ¼

C ½ ¾ C C C ½g[f¾g

Since is a circuit, . By the same argument as above, (iii) is not satisfied for , i.e. f

¾ ½ ½ ½

¼¼ ¼¼ ¼¼ ¼ ¼ ¼

C ¾ C C C C = C

contains a circuit using . Since  it follows that (since is a circuit). Therefore,

¾ ¾ ¾ ¾ ¾ ¾

¼ ¼ ¼ ¼

C = C f¾g[ f½g C 4 C = f½; ¾g C £

. But the cycle contradicts the fact that ¼ is a circuit.

½ ¾ ½ ¾

´Å; ¦µ C = f½; ¾; ¿g C \ ¦= ; ¼

Lemma 7.14. Let be an ideal signed binary matroid with a circuit ¼ where .

¼

Ô : E ´Å µ ! É Ô : E ´Å µ !

Suppose we have · such that the cut condition is satisfied. Then there exists

¼ ¼

É Ô Ô ´eµ=Ô´eµ e 6¾ C ¼

· which satisfies the following properties: (i) satisfies the cut condition; (ii) for all ;

¼ ¼ ¼

Ô ´iµ·Ô ´j µ  Ô´iµ· Ô´j µ i; j ¾ C Á = fi ¾ C : Ô ´iµ > ¼g ¼

and (iii) for all distinct ¼ . Let . There is a

¼

¦  :ª ! É Ô ·

-flow ¦ with costs . Moreover, either:

;;Áµ ´Å; ¦µ

(1) The fat triangle ´ is a signed minor of and

jC \ C j ½ C  ´C µ > ¼

(2) ¼ for all odd circuits such that .

¼ ¼

C Ô ´¿µ = ¼ Ô ´¾µ  Ô´¾µ · Ô´¿µ

Or after possibly relabeling elements of ¼ we have and . Moreover,

f¿g; f¾gµ ´Å; ¦µ

(3) The fat triangle ´ is a signed minor of and

C  ´C µ > ¼ C \ C 6= ; C \ C = f¾g C \ C = f½g

¼ ¼

(4) for all odd circuits with and ¼ either ,or and

f½g[f¾g ¾ C contains an odd circuit using . IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 19

Proof.

¼

Ô : E ´Å µ ! É

Claim 1. We can assume that there exists · such that properties (i)-(iii) hold. For distinct

¼ ¼

i; j ¾ C « Ô ´D ¦µ Ô ´D \ ¦µ D \ C = fi; j g

ij ¼

¼ let be the minimum of where . We then have

C « = « = « =¼

½¾ ½¿ ¾¿

(after possibly relabeling the elements of ¼ ) the following cases, either: (a) ; or (b)

¼ ¼ ¼

Ô ´¿µ = ¼;Ô ´¾µ  Ô´¾µ;Ô ´½µ  Ô´½µ · Ô´¿µ « =¼

and ½¾ .

¼ ¼

Ô : E ´Å µ ! É Ô ´C µ ¼

Proof of Claim: Choose · which minimizes and which satisfies the following prop-

¼ ¼ ¼

Ô Ô ´eµ=Ô´eµ e 6¾ C Ô ´iµ  Ô´iµ i ¾ C ¼

erties: the cut condition holds for ; for all ¼ ; and for all . Clearly,

¼

Ô « > ¼

(i)-(iii) holds for . Suppose (a) does not hold. Then we may assume (after relabeling) that ¾¿ and that

¼ ¼

´¿µ  Ô ´¾µ

Ô .

¼

« > ¼ ¾ Ô

Consider first the case where ½¾ . Then is in no tight cocircuit, it follows from the choice of

¼ ¼ ¼

Ô ´¾µ = ¼ Ô ´¿µ = ¼ « > ¼ Ô ´½µ = ¼ C

that . Hence . Suppose ½¿ , then . But then for all circuits such that

 ´C µ > ¼ C \ C = ; ´Å; ¦µÒ´E ´Å µ C µ ¼

we have ¼ and (2) holds. Moreover, (1) is satisfied since is the

´;; ;µ « =¼ ¾ ¿

fat triangle. Thus we may assume ½¿ . But by relabeling and we satisfy (b).

¼

« =¼ « > ¼ ¿ Ô ´¿µ = ¼ ½¿

Hence we can assume ½¾ .If then is in no tight cocircuit, thus , and (b)

¼

« =¼ ¯ =ÑiÒf« =¾;Ô ´¿µg Ô^ : E ´Å µ ! É

¾¿ ·

holds. Thus we may assume ½¿ . Let . Let be defined as

¼ ¼ ¼ ¼

Ô^´eµ=Ô ´eµ e 6¾ C Ô^´½µ = Ô ´½µ · ¯; Ô^´¾µ = Ô ´¾µ ¯; Ô^´¿µ = Ô ´¿µ ¯

follows: if ¼ and . Note, (i)-(iii)

¼ ¼

Ô ¯ = Ô ´¿µ Ô^´¿µ = ¼ Ô^ Ô^´¾µ  Ô ´¾µ  Ô´¾µ

hold for ^. Suppose . Then , and (b) holds with since and

¼

Ô^´½µ = Ô ´½µ · ¯  Ô´½µ · Ô´¿µ ¯ = « =¾ i; j ¾ C ¼

. Thus we may assume ¿¾ . Then for each distinct there is a

D D \ C = fi; j g Ô^ ¿

cocircuit where ¼ which is tight for . It follows that (a) holds.

¼

i; j; k C Ô

Throughout the proof will denote distinct elements of ¼ . Let be the costs given in Claim 1.

¼

´Å; ¦µ ¦  :ª ! É Å Ô ·

Since is ideal, Corollary 4.4(i) implies that there is a -flow, ¦ for with costs . Let

D Å D \ C = fi; j g Ô´D ¦µ Ô´D \ ¦µ = «

ij ¼ ij ij ij

ij be the cocircuits of for which and .

D i; j ¾ C ¼

Consider first case (a) of Claim 1, i.e. ij is tight for all distinct . We will show that (1) and

C  ´C µ > ¼ jC \ ¦j =½ i C \ C

(2) hold. Let be any circuit with . Then . Suppose there is an element in ¼ .

C \ D = fi; f g C \ D = fi; f g f C \ ¦ ik

Proposition 4.3 states ij and where is the unique element in .

¼

C \ C = fig i ¾ C Ô ´iµ > ¼ ¼

Thus ¼ and (2) holds. Every element is in a tight cocircuit, thus if then

C i ¾ C  ´C µ > ¼ C i

i i i

there is a circuit i with and . Moreover, (2) implies that is a simple circuit of type .

D ;D ;D

½¿ ¾¿ Proposition 4.3 implies that ½¾ all have small intersections with each of the simple circuits. Then

(1) follows from Proposition 7.13(1).

¼ ¼ ¼

Ô ´¿µ=¼;Ô ´¾µ  Ô´¾µ;Ô ´½µ  Ô´½µ · Ô´¿µ « =¼

Consider case (b) of Claim 1, i.e. and ½¾ .

C  ´C µ > ¼ i ¾ C \f½; ¾g C i

Claim 2. Let be a circuit with .If , then i is a simple circuit of type .

¼

6¾ C Ô ´¿µ = ¼ jC \f½; ¾gj =½

This follows from the fact that ¿ (as ) and that (because of Proposition 4.3

¼

D Ô ´iµ=¼ i ¾ C ¼

and the fact that ½¾ is tight). The case where for all has already been considered (see proof

¼ ¼

¾f½; ¾g Ô ´¿ iµ= ¼ Ô ´iµ > ¼ f

of Claim 1). Suppose for some i , . Then and let be the unique element in

C \ ¦ ´Å; ¦µÒ´E ´Å µ C C µ=´C fi; f gµ ´;; figµ

¼ i i

i . The minor is the fat triangle and both (1) and

¼ ¼

Ô ´½µ > ¼;Ô ´¾µ > ¼ i ¾f½; ¾g C  ´C µ > ¼ i

(2) hold. Thus . Suppose now for all there exists a circuit i with

i ¾ C C fig[f¿ ig i

and i such that is independent. Claim 2 states that these circuits are simple circuits

´Å; ¦µ ´;; f½; ¾gµ of type i. Then (2) holds and Proposition 7.13(3) implies that contains the fat triangle , i.e.

20 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

i ¾f½; ¾g C  ´C µ > ¼ i ¾ C

i i

(1) holds. Thus we may assume, for some that for all circuits i such that and ,

¼

C fig[f¿ ig i =¾ ¾ ½ Ô ´½µ  Ô´½µ · Ô´¿µ

i is dependent. If interchange the labels and . Since we had

¼ ¼

´¾µ  Ô´¾µ · Ô´¿µ i =½ Ô ´¾µ  Ô´¾µ  Ô´¾µ · Ô´¿µ

we get in that case Ô . Otherwise (if )wehave .

C  ´C µ > ¼ ½ ¾ C C f½g[f¾g

½ ½ ½

Proposition 7.13(2) implies that for all circuits ½ with and , contains an

´Å; ¦µ ´f¿g; f¾gµ odd circuit using ½ and that contains the fat triangle as a minor. Together with Claim 2

this implies (3) and (4) hold. £

We are now ready for the proof of the main lemma.

Å Å = Å ª Å C = E ´Å µ \ E ´Å µ

¿ ¾ ¼ ½ ¾

Proof of Lemma 7.3. Since has a strict 3-separation, ½ where is

½

i; j; k C F  E « ½

a triangle. Throughout this proof will denote distinct elements of ¼ . Recall that . Let ij

denote the smallest value of

Ô´D F C µ Ô´D \ F µ

¼ ij

ij (*)

D Å D \ C = fi; j g

½ ij ¼

where ij is some cocircuit of with . Expression (*) gives the difference between

D C ¼

the sum of the capacity elements and the sum of the demand elements in ij , excluding the marker .

½ ¾ «

Denote by D the cocircuit for which the minimum is attained in (*). Let denote the smallest value of

ij ij

¾

Ô´D C µ D Å D \ C = fi; j g D

¼ ij ¾ ij ¼

ij , where is some cocircuit of with . In what follows, we let denote

ij

¾ ¾

Ô´D C µ=« i ¾ C ¼

the cocircuit for which ¼ . For each define:

ij ij

½

¾ ¾ ¾

¬ = ´« · « « µ:

i

ij ik jk

¾

¬  ¼ i ¾ C ¼

Claim 1. i for all .

¡

¾ ¾ ¾ ¾ ¾ ¾ ¾

« · « = Ô´D C µ· Ô´D C µ  Ô ´D 4 D µ C  «

¼ ¼

Proof of Claim: We have ¼ . Thus

ij ij ij

ik ik ik jk

¾ ¾ ¾

´« ¬  ¼ ¿ · « µ «  ¼

and i .

ij

ik jk

½ ¾

· «  ¼

Claim 2. « .

ij ij

½ ¾ ½ ½ ¾ ½ ¾

« · « = Ô´D F C µ Ô´D \ F µ· Ô´D C µ=Ô´´D 4 D µ F µ ¼

Proof of Claim: ¼

ij ij ij ij ij ij ij

½ ¾

Ô´´D 4 D µ \ F µ Å; F; Ôµ ¿

. But the last expression is non negative since the cut condition holds for ´ .

ij ij

´Å ;Fµ ´Å; F µ

Claim 3. ½ is a signed minor of .

Å Å

Proof of Claim: Theorem 5.2 implies that ½ is a minor of obtained by contracting and deleting elements

E F  E ¿ ½

in ¾ only. Since the result follows.

Ô : E ´Å µ ! É Ô ´eµ=Ô´eµ e ¾ E Ô ´iµ=¬ i ¾ C

½ · ½ ½ ½ i ¼

Define ½ as follows: for all and for all .

´Å ;F;Ô µ ½

Claim 4. The cut condition is satisfied for ½ .

Å; F; Ôµ

Proof of Claim: Since the cut condition holds for ´ the cut condition is satisfied for all cocircuits of

Å C D Å D \ C = fi; j g Ô ´D F µ Ô ´D \ F µ=

¼ ½ ¼ ½ ½

½ disjoint from . Let be a cocircuit of such that . Then

½ ½ ½ ¾

Ô´D F C µ Ô´D \ F µ·Ô ´iµ·Ô ´j µ  « · Ô ´iµ· Ô ´j µ=« · ¬ · ¬ = « · «

½ ½ ½ ½ i j

¼ . It follows

ij ij ij ij

from Claim 2 that the previous expression is non-negative. ¿

´Å ;Fµ ´Å; F µ

Claim 3 implies that ½ is a part of and hence its clutter of odd circuits is ideal. Together with

´Å ;Fµ Ô Å F

½ ½

Claim 4 it implies that ½ and satisfy the hypothesis of Lemma 7.14. It follows that is -flowing

¼ ¼ Ô

with costs Ô (where is as described in the lemma) and either case 1 or case 2 occurs.

½ ½ IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 21

Case 1: Statements (1) and (2) hold.

¼ ¼

Á := fi ¾ C : Ô ´iµ > ¼g Å Å Ò ´C Á µ

¾ ¼

We define ¼ and let denote .

½ ¾

¼

Å ;Áµ ´Å; F µ

Claim 5. ´ is a signed minor of .

¾

´;;Áµ ´Å ;Fµ

Proof of Claim: Statement (1) says that the fat triangle is a signed minor of ½ , i.e. it is equal to

´Å ;Fµ Ò Â =Â Â ;Â  E ´Å ª Å µ Ò Â =Â =´Å Ò Â =Â µ ª

d c d c ½ ½ ¿ ¾ d c ½ d c ¿

½ for some . Seymour [24] showed that

¼

´Å ;Áµ= ´Å; F µ Ò Â = ¿ Å

d c

¾ . Thus .

¾

¼ ¼

Ô : E ´Å µ ! É Ô ´eµ=Ô´eµ e ¾ E Ô ´iµ=Ô ´iµ i ¾ Á

· ¾ ¾ ¾

Define ¾ as follows: for all and for all .

¾ ½

¼

´Å ;Á;Ô µ

Claim 6. The cut condition is satisfied for ¾ .

¾

D C D \

Proof of Claim: It suffices to show the cut condition holds for cocircuits that intersect ¼ . Suppose

¼ ¼ ¾

C = fi; j g Ô ´iµ·Ô ´j µ  Ô ´iµ·Ô ´j µ Ô ´iµ·Ô ´j µ=¬ · ¬ = «

½ ½ ½ ½ i j

¼ . Lemma 7.14 states that . Moreover, .

½ ½

ij

¼ ¼ ¾ ¾

Ô ´D Á µ Ô ´D \ Á µ=Ô´D C µ ´Ô ¿ ´iµ·Ô ´j µµ  « « =¼

¾ ¼

Thus ¾ .

½ ½

ij ij

¼

Å ;Áµ ´Å; F µ

Claim 5 implies that ´ is a part of and hence its clutter of odd circuits is ideal. It follows

¾

¼ ¼

Å Á Ô Ô Ô

from Claim 6 and Corollary 4.4(i) that is -flowing with costs ¾ . Since we can scale (and hence and

¾ ½

¼ ½

Ô F Å Ô Ä Á ½

¾ ) we may assume that the -flow of satisfying costs is a multiset of circuits and that the -flow

½

¼ ¾ ½ ½

Å Ô Ä Ä Ä

of satisfying costs ¾ is a multiset of circuits. Because of Statement (2), can be partitioned into

¾ ¼

¨ ©

½ ½ ½ ½ ½

= C ¾Ä : C \ C = fig Ä i ¾ Á Ä = fC ¾Ä : C \ C = ;g Ä ¼

and for all where: ¼ and . Because

¼

i i

¨ ©

¾ ¾ ¾ ¾ ¾

C ¾Ä C ¾ ª Ä Ä i ¾ Á Ä = C ¾Ä : C \ C = fig ¼

implies Á , can be partitioned into for all where: .

i i

¾ ¼ ½

j ´iµ j jÄ Ô ´iµ= Ô i ¾ Á jÄ i ¾ Á Å

Since ¾ for each , for each . Let us define a collection of circuits of

i ½ i

½ ½

Ä i ¾ Á C ¾Ä

as follows: include all circuits of , and for every pair each circuit ½ with a different circuit

¼ i

¾

C ¾Ä C 4 C F

½ ¾

¾ and add to the collection the circuit included in that contain the element of . The resulting

i

Å Ô

collection corresponds to a F -flow of satisfying costs .

¼ ¼

´¾µ  Ô´¾µ · Ô´¿µ ´¿µ = ¼;Ô Ô C

Case 2: and statements (3) and (4) hold (after possibly relabeling ¼ ).

½ ½

¼

Å Å Ò ½ ´f¿g; f¾gµ ´Å ;Fµ ½

Let denote ¾ . Statement (3) says that the fat triangle is a signed minor of . ¾

Proceeding as in the proof of Claim 5 we obtain the following.

¼

´Å ´Å; F µ f¾gµ

Claim 7. ; is a signed minor of .

¾

¼ ¼ ¼

Ô : E ´Å Ô ´eµ= Ô´eµ e ¾ E ´Å µ Ô ´¾µ = Ô µ ! É ´¾µ · Ô ´½µ

¾ ¾ ¾ ¾

Define · as follows: for all ; and

¾ ½ ½

¼

Ô ´¿µ = Ô ´½µ

¾ .

½

¼

´Å ; f¾g;Ô µ

Claim 8. The cut condition is satisfied for ¾ .

¾

¼

D Å D \ C = f¾; ¿g D

Proof of Claim: Consider first a cocircuit of such that ¼ . Let us check does not

¾

Ô ´D f¾gµ Ô ´D \f¾gµ= ¾

violate the cut condition. The following expression should be non negative: ¾

¼ ¼ ¼ ¼

Ô´D C µ·Ô ´¿µ Ô ´¾µ = Ô´D C µ·Ô ´½µ Ô ´½µ Ô ´¾µ = Ô´D C µ Ô ´¾µ

¾ ¾ ¼ ¼

¼ . Lemma 7.14 states

½ ½ ½ ½

¼ ¾ ¼

Ô ´¾µ  Ô ´¾µ · Ô ´¿µ = ¬ · ¬ Ô´D C µ  « = ¬ · ¬ Ô´D C µ Ô ´½µ  ¼

½ ¾ ¿ ¼ ¾ ¿ ¼

½ . Since it follows that .

½ ¾¿ ¾

¼

Å ¾ ¾ D ¿ 6¾ D D

Consider a cocircuit D of such that but . Let us check does not violate the cut condition.

¾

Ô ´D f¾gµ Ô ´D \f¾gµ= Ô´D C µ Ô ´¾µ =

¾ ¼ ¾

The following expression should be non negative: ¾

¼ ¼ ¼ ¼

Ô ´½µ · Ô ´¾µ  Ô ´½µ · Ô ´¾µ = ¬ · ¬ D [f½g Ô´D C µ ´Ô ´½µ · Ô ´¾µµ

½ ½ ½ ¾

¼ . Lemma 7.14 states . Since

½ ½ ½ ½

¾ ¼ ¼

Å Ô ´D C µ  « = ¬ · ¬ Ô´D C µ ´Ô ´½µ · Ô ´¾µµ  ¼ ¿

¾ ¼ ½ ¾ ¼

is a cocircuit of ¾ , . It follows that .

½¾ ½ ½

22 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

¼

Å f¾g Ô

Claim 7, Claim 8, and Corollary 4.4(i) imply that is -flowing with costs ¾ . We may assume that

¾

¼ ½ ½

F Å Ô Ä Ä

the -flow of ½ satisfying costs is a multiset of circuits. Because of Statement (4), can be

½

¨ ©

½ ½ ½ ½ ½ ½ ½

Ä ; Ä ; Ä Ä = fC ¾Ä : C \ C = ;g Ä = C ¾Ä : C \ C = f½g ¼

partitioned into where: ¼ , ,

¼ ½ ¾ ¼ ½

¨ ©

½ ½ ¼

Ä = C ¾Ä : C \ C = f¾g f¾g Å Ô ¾

¼ . We may assume that the -flow of satisfying costs is a multiset

¾ ¾

¾ ¾ ¼ ¾ ¾ ¾

Ä C ¾Ä C ¾ ª ½ 6¾ E ´Å µ Ä Ä ; Ä

¾g

of circuits. Since implies f and since , can be partitioned into

¾ ½ ¾

¨ © ¨ ©

¾ ¾ ¾ ¾

Ä = C ¾Ä : C \ C = f¾; ¿g Ä = C ¾Ä : C \ C = f¾g ¼

where: ¼ , and .

½ ¾

½ ¾ ½ ½ ¾ ¾

j jÄ j jÄ j · jÄ j jÄ j · jÄ j

Claim 9. (i) jÄ and (ii) .

¾ ¾ ½ ¾ ½ ¾

¾ ¾ ¾ ¼

¾ Ä jÄ j · jÄ j = Ô ´¾µ = Ô ´½µ ·

Proof of Claim: Let us prove (i). is a demand element for the flow , thus ¾

¾ ½ ½

¼ ¾ ¾ ¼ ¾ ¼ ½

Ô ´¾µ ¿ Ä jÄ jÔ ´¿µ = Ô ´½µ jÄ j Ô ´¾µ jÄj

. is a capacity element for the flow , thus ¾ . Hence,

½ ½ ½ ¾ ½ ¾

½ Ä

where the last inequality follows from the fact that ¾ is a capacity element for the flow . Let us prove (ii).

½ ½ ¼ ¼ ¾ ¾

j · jÄ j Ô ´¾µ · Ô ´½µ = Ô ´¾µ = jÄ j · jÄ j jÄ ¿

¾ .

¾ ½ ½ ½ ¾ ½

½ Ä

Let us define a collection of circuits of Å as follows: (a) include all circuits of ; (b) pair every circuit

¼

½ ¾

C ¾Ä C ¾Ä ¾

½ with a different circuit - such a pairing exists because of Claim 9(i) - and add to the

¾ ¾

½ ¾

C 4 C C Ä C Ä

¾ ½ ¾

collection ½ ; (c) pair as many circuits of to as many different circuits of as possible, and

½ ½

½ ¾

C 4 C C Ä Ä

¾ ½

add to the collection ½ ; (d) pair all remaining circuits of to circuits of not already used in (b).

½ ¾

C f½g[ f¾g

Such a pairing exists because of Claim 9(ii). Statement (4) says that ½ contains an odd circuit

¼ ¼

C C ;C C 4 C C

¾ ¾

. For every pair ½ add to the collection the cycle ; (e) for each cycle in the collection

½ ½ F

only keep the circuit included in C that contains the element of . The resulting collection corresponds to an

Å Ô £ F -flow of satisfying costs .

8. SUFFICIENT CONDITIONS FOR IDEALNESS

We will prove Theorem 1.1 in this section, i.e. that a binary clutter is ideal if it has none of the following

· ·

Ä Ç b´Ç µ É É

à Ã

minors: F , , , and . The next result is fairly straightforward.

7 5 5

6 7

Proposition 8.1 (Novick and Seb¨o [20]).

Ù´Àµ

¯Àis a clutter of odd circuits of a graph if and only if is graphic.

Ì Ù´Àµ ¯Àis a clutter of -cuts if and only if is cographic.

Remark 8.2. The class of clutters of odd circuits and the class of clutters of Ì -cuts is closed under taking minors.

This follows from the previous proposition, Remark 2.9 and the fact that the classes of graphic and cographic

·

·

b´É µ É

matroid are closed under taking (matroid) minors. We know from Remark 3.4 that 6 (a minor of )

7

·

£

F É F

is a source of 7 , and is a source of . Thus Proposition 8.1 implies,

7

6

· ·

É Ì

Remark 8.3. É and are not clutters of odd circuits or clutters of -cuts.

7 6

We use the following two decomposition theorems.

¿ 4

Theorem 8.4 (Seymour [24]). Let Å be a -connected and internally -connected regular matroid. Then

Å = Ê Å Å

½¼ or is graphic or is cographic.

IDEAL BINARY CLUTTERS, CONNECTIVITY, AND A CONJECTURE OF SEYMOUR 23

£

Å ¿ F F

Theorem 8.5 (Seymour [24, 26]). Let be a -connected binary matroid with no (resp. 7 ) minor.

7

£

Å Å = F F

Then is regular or 7 (resp. ).

7

£

Ù´Àµ F À

Corollary 8.6. Let À be a binary clutter such that has no minor. If is 3-connected and internally

7

·

À b´É µ; Ä Ê ;b´É µ

7 F ½¼

4-connected, then is one of 6 , or one of the 6 lifts of , or a clutter of odd circuits or 7

a clutter of T-cuts.

À Ù´Àµ Ù´Àµ Ù´Àµ=F

Proof. Since is 3-connected, is 3-connected. So, by Theorem 8.5, is regular or 7 .In

·

À b´É µ; Ä Ù´Àµ ;b´É µ

7 F

the latter case, Remark 3.4 implies that is one of 6 . Thus we can assume that is

7

Ù´Àµ Ù´Àµ=Ê Ù´Àµ

regular. By hypothesis, is internally 4-connected and therefore, by Theorem 8.4, ½¼ or

´Àµ £ is graphic or Ù is cographic. Now the corollary follows from Proposition 8.1 and Remark 3.4.

We are now ready for the proof of the main result of this paper.

·

À Ä Ç b´Ç µ É

à Ã

Proof of Theorem 1.1. We need to prove that, if is nonideal, then it contains F , , , or

7 5 5

6

· À

É as a minor. Without loss of generality we may assume that is minimally nonideal. It follows from 7

Remark 5.3 and propositions 6.1 and 7.1 that À is 3-connected and internally 4-connected. Consider first the

£ ·

Ù´Àµ F À b´É µ; Ä ;b´É µ

F 6

case where has no minor. Then, by Corollary 8.6 either: (i) is one of 7 ,or

7 7

À Ê À À À

(ii) is one of the 6 lifts of ½¼ , or (iii) is a clutter of odd circuits, or (iv) is a clutter of T-cuts. Since

À = Ä

is minimally nonideal, it follows from Proposition 3.5 that if (i) occurs then F and if (ii) occurs then

7

À = b´Ç À = Ç µ Ã

à . If (iii) occurs then, by Theorem 1.3, ; (iv) cannot occur because of Theorem 1.4.

5 5

£

Ù´Àµ F À À

Now consider the case where has an minor. It follows by Theorem 3.2 that has a minor ½

7

·

£ £ £

À À F À F F ¾

or , where ½ is a source of and is a lift of . Proposition 3.1 states that the lifts of are the

7 7 7

¾

·

F F b´É µ Ä b´É µ

7 7 F 6

blockers of the sources of 7 . Remark 3.4 states that the sources of are , or , and that

7

¡

·

· · · · ·

£ ·

= É µ F É À = É À b´Ä µ b b´É F

has only one source, namely . This implies that ½ and or or .

7

7 6 6 ¾ 6 7

¡

·

· ·

·

µ b´Ä µ Ä b b´É É £ F

Since F has an minor and has a minor, the proof of the theorem is complete.

7 7

6 6

One can obtain a variation of Theorem 1.1 by modifying Corollary 8.6 as follows: Let À be a binary

Ù´Àµ F À À b´É µ 7

clutter such that has no 7 minor. If is 3-connected and internally 4-connected, then is ,

·

Ä b´É Ê µ ½¼

F , or one of the 6 lifts of or a clutter of odd circuits or a clutter of T-cuts. Following the proof

7

6

Ä Ç b´Ç µ b´É µ

à à 7

of Theorem 1.1, this yields: A binary clutter is ideal if it does not have an F , , , or

7 5 5

·

´É µ

b minor. But this result is weaker than Corollary 1.2. Other variations of Theorem 1.1 can be obtained

6

£

´Àµ Ù´Àµ 6= F

by using Seymour’s Splitter Theorem [24] which implies, since Ù is 3-connected and , that

7

Ù´Àµ Ë AG´¿; ¾µ

has either 8 or as a minor. Again, by using Proposition 3.2, we can obtain a list of excluded

minors that are sufficient to guarantee that À is ideal.

9. SOME ADDITIONAL COMMENTS

Corollary 8.6 implies the following result, using the argument used in the proof of Theorem 1.1.

£

Ù´Àµ F À

Theorem 9.1. Let À be an ideal binary clutter such that has no minor. If is 3-connected and

7

·

À b´É µ;b´É µ Ê

6 ½¼ internally 4-connected, then is one of 7 , or one of the 5 ideal lifts of , or a clutter of odd circuits of a weakly bipartite graph, or a clutter of T-cuts. 24 GERARD´ CORNUEJOLS´ AND BERTRAND GUENIN

A possible strategy for resolving Seymour’s Conjecture would be to generalize this theorem by removing

£

´Àµ F À

the assumption that Ù has no minor, while allowing in the conclusion the possibility for to also be 7 a clutter of T-joins or the blocker of a clutter of odd circuits in a weakly bipartite graph. However, this is not

possible as illustrated by the following example. Ì

Let ½¾ be the binary matroid with the following partial representation.

¾ ¿

½ ½ ½ ¼ ¼ ¼

¼ ½ ½ ½ ¼ ¼

6 7

¼ ¼ ½ ½ ½ ¼

6 7

:

4 ¼ ¼ ¼ ½ ½ ½ 5

½ ¼ ¼ ¼ ½ ½

½ ½ ¼ ¼ ¼ ½

This matroid first appeared in [11]. It is self dual and satisfies the following properties:

Ø Ì Ì =Ø ½¾

(i) For every element of ½¾ , is 3-connected and internally 4-connected.

Ø Ì Ì =Ø ½¾ (ii) For every element of ½¾ , is not regular.

We are indebted to James Oxley (personal communication) for bringing to our attention the existence of

Ì Ø Ì ½¾

the matroid ½¾ and pointing out that it satisfies properties (i) and (ii). Let be any element of and let

À = ÈÓÖØ´Ì ;ص Ì =Ø = Ù´Àµ À ½¾

½¾ . Because of (i), is 3-connected and internally 4-connected and thus so is .

Ì =Ø = Ù´Àµ À

Because of (ii), ½¾ is not graphic or cographic thus Proposition 8.1 implies that is not a clutter

£

b´Àµ=ÈÓÖØ´Ì ;ص=

of Ì -cuts and not a clutter of odd circuits. We know from Proposition 2.12 that

½¾

ÈÓÖØ´Ì ;ص b´Àµ À Ì

½¾ . Thus, is also 3-connected, internally 4-connected, and is not the clutter of -joins or the blocker of the clutter of odd circuits. However, it follows from the results of Luetolf and Margot [16] that

the clutter À is ideal.

REFERENCES

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[20] B. Novick and A. Seb¨o. On combinatorial properties of binary spaces. In W. H. Cunningham, S. T. McCormick, and M. Queyranne, editors, Integer Programming and Combinatorial Optimization, volume 1084 of Lecture Notes in Computer Science, pages 1–15. 5th International IPCO Conference, Vancouver, British Columbia, Canada, Springer, 1996.

[21] J.G. Oxley. Matroid Theory. Oxford University Press, New York, 1992. ISBN0-19-853563-5.

½ [22] M. W. Padberg. Lehman’s forbidden minor characterization of ideal ¼ matrices. Discrete Math., 111:409–420, 1993. [23] P.D. Seymour. The Matroids with the Max-Flow Min-Cut property. J. Comb. Theory Ser. B, 23:189–222, 1977. [24] P. D. Seymour. Decomposition of regular matroids. J. of Combinatorial Theory B, 28:305–359, 1979. [25] P.D. Seymour. A note on the production of matroid minors. J. of Combinatorial Theory B, 22:289–295, 1977. [26] P.D. Seymour. Matroids and multicommodity flows. European J. of Combinatorics, pages 257–290, 1981. [27] P.D. Seymour. On Lehman’s width-length characterization. In W. Cook and P.D. Seymour, editors, Polyhedral Combinatorics, volume 1 of DIMACS Series in Discrete Math. and Theoretical Computer Science, pages 107–117, 1990. [28] T. Zaslavsky. Signed graphs. Discrete Applied Math., 4:47–74, 1982. [29] T. Zaslavsky. Biased graphs. II The three matroids. J. of Combinatorial Theory B, 51:46–72, 1991.

GERARD´ CORNUEJOLS´ GRADUATE SCHOOL OF INDUSTRIAL ADMINISTRATION CARNEGIE MELLON UNIVERSITY, PITTSBURGH, PA 15213, USA

BERTRAND GUENIN DEPARTMENT OF COMBINATORICS AND OPTIMIZATION FACULTY OF MATHEMATICS UNIVERSITY OF WATERLOO WATERLOO, ON N2L 3G1, CANADA