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Control Theory 1 Laboratory 2

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Control Theory 1 Laboratory 2 CONTROL THEORY 1 LABORATORY 2 Introduction to: Analog Computers and the DSPACE System. Mark Schedule 33% Preparation 67% Lab Report Contents 1 INTRODUCTION 2 1.1 Objective . 2 1.2 Hardware Description . 2 2 USING THE COMDYNA GP-6 ANALOG COMPUTER 2 2.1 Analog Computer Elements . 2 2.2 Operation of the Analog Computer . 6 2.3 Example 1 . 6 2.4 Example 2 . 7 3 USING THE dSPACE SYSTEM 9 3.1 Creating a dSPACE Block Diagram . 12 3.2 The ControlDesk Package . 13 3.3 Using dSPACE to find a Step Response . 17 4 Laboratory Preparation 20 5 Laboratory Procedure 20 5.1 Analog Computer . 20 5.2 dSPACE . 21 5.3 dSPACE and the Analog Computer . 21 1 INTRODUCTION 1.1 Objective The objective of this laboratory is for students to become familiar with the use of the GP6 analog computer and the dSPACE system in implementing given transfer functions. This knowledge will form the basis of later laboratories in which these systems are used to implement controllers or simulate control systems. 1.2 Hardware Description The hardware used in this laboratory experiment consists of the following: Comdyna GP-6 Analog Computer • Signal Generator • oscilloscope • IBM PC running Matlab and dSPACE software. This PC also contains a dSPACE DSP board. • 2 USING THE COMDYNA GP-6 ANALOG COMPUTER One approach to implementing a given transfer function involves using various elements contained in the Comdyna GP-6 analog computer. 2.1 Analog Computer Elements (i) Integrators: The symbol for integrators together with their patch panel layout is shown below:(Note Amplifiers 1{4 must be used) 2 SJ' IC A A SJ 1 1 Integrator B amplifiers 1 C 1 1-4 1 Eo D B 10 E 10 1 F C Eo 1 D E0=- (B+C+D+10E+10F)dt-A .1 E B .1 .1 B F SW OP 3 (ii) Alternatively, if a higher gain is required then we can use the following alternative patching SJ' IC A A SJ 1 10 Integrator B amplifiers 10 C 1 1-4 10 Eo D B 100 E 100 1 F C Eo 1 D E0=- (10B+10C+10D+100E+100F)dt-A .1 E B .1 F .1 B SW OP 4 (iii) The symbol for summers together with various possible patch panel layouts is shown below: SJ' IC SJ 1 1 Summer A amplifiers 1 1 1-4 B Eo 10 C 10 1 D A Eo 1 B E0=-(A+B+10C+10D) .1 B C .1 .1 B D 1 SJ A A 1 Eo 6 Summer B 10 1 amplifer 6 C 10 .1 B Eo Eo=-(A+10B+10C) .1 C 1 SJ A 1 A Eo Summer B 1 5 1 Amplifier 5 C 10 1 Eo Eo=-(A+B+10C) B .1 C (iv) Inverters: The symbol for an inverter together with its patch panel layout is shown below: Inverter A 1 Eo A7 Eo amplifiers 7 & 8 Eo=-A (v) Potentiometers: The symbol for potentiometers together with their patch panel layout is shown below: 5 Attenuator A A Eo pots 1-6 Eo = K A 0 < K < 1 Eo 0 <K < 1 Voltage A Divider A (pots 7 & 8) Eo Eo 0 < K < 1 B Eo = K(A-B)+B B 2.2 Operation of the Analog Computer Setting Potentiometers The first operation to be performed after wiring up the analog computer for a given simu- lation is to set the potentiometer values. This is performed as follows. (i) Position the MODE SELECTOR switch to POT SET. (If the overload light goes on, remove the overload condition by patching the overloaded amplifier output directly to its summing junction. Be sure to remove this patch cord after all of the Pots are set.) (ii) Position the Y/POT ADDRESS switch to the number of the pot to be set. (iii) Adjust the pot knob until the desired setting is displayed. Running the Analog Computer After the circuit has been wired up and the pots set to the correct value, the analog computer is run with the OP mode control button pushed and the mode selector switch set to OPR. 2.3 Example 1 Implementation of a simple transfer function For a given transfer function: Y (s) 2 G(s) = = U(s) s + 1 we have 2U(s) = (s + 1)Y (s) 2u(t) =y _(t) + y(t) , y_(t) = 2u(t) + y(t) , − − This equation can be implemented on the analog computer according to the following block diagram: 6 u -0.2u y -1 0.2 10 1 This would be wired up on the analog computer as indicated on the patch panel diagram in Figure 1. The following pot values would be used Potentiometer 1 2 3 4 5 6 7 8 Setting 0.2 Notes: Output of Pot 5 = 2u(t) Output of Integrator− 3 = y 2.4 Example 2 Implementation via Phase Variable Form Given the transfer function: Y~ (s) 2s + 1 G~(s) = = ; U(s) s2 + 3s + 4 we can implement this transfer function on the analog computer using a version of the \Phase variable form" state space realization. First consider the transfer function Y (s) 1 G(s) = = ; U(s) s2 + 3s + 4 Hence, (s2 + 3s + 4)Y (s) = U(s) y¨ = u 3y _ 4y , − − This leads to the following analog computer block diagram 7 + + - + SJ’ IC SJ’ IC - - SJ’ IC SJ’ IC Figure 1: Patch panel layout for Example 1. 1 2 3 4 5 6 SJ 1 SJ 2 SJ 3 SJ 4 1 1 1 1 1 1 SJ SJ 7 8 1 1 1 1 5 6 8 1 1 1 1 1 1 .1 .1 1 .1 .1 B B .1 B B .1 .1 B .1 .1 B .1 .1 .1 .1 B .1 .1 B X Y X Y X SJ SJ X SW OP SW OP SW OP SW OP 7 8 u 1 . -y y 10 1 10 . 0.3 -0.3y -0.4y 0.4 -1 Now we use the fact that G~(s) = (2s + 1)G(s) Hence Y~ (s) = (2s + 1)Y (s) y~ = 2y _ + y: , Thus, the transfer function G~(s) can be implemented on the analog computer via the block diagram shown in Figure 2: The patch panel layout corresponding to this block diagram is shown in Figure 3 The following pot values would be used Potentiometer 1 2 3 4 5 6 7 8 Setting 0.3 0.4 0.2 Notes: dy Output of Integrator 1 = dt Output of Integrator 3 = y− Output of Summer 3 =y ~ 3 USING THE dSPACE SYSTEM The dSPACE system is high performance digital control system based on the TI TMS320C31 DSP processor. It is directly interfaced with MATLAB/SIMULINK running on a PC. A simulink block diagram is converted to real time C code, cross compiled and downloaded to the DSP board. Software is also available for controlling the DSP from the PC and plotting variables in real time in the DSP. In this laboratory, you will familiarize yourself with some of the capabilities of the dSPACE system including the implementation of transfer functions and the ability to provide step inputs and to plot the resulting step responses of 9 . ~ -0.2y 10 y 0.2 1 -y u -1 1 . -y y 10 1 10 . 0.3 -0.3y -0.4y 0.4 -1 Figure 2: Analog Computer Block Diagram For Example 2. 10 + + - + SJ’ IC SJ’ IC - - SJ’ IC SJ’ IC Figure 3: Patch panel layout for Example 2. 1 2 3 4 5 6 SJ 1 SJ 2 SJ 3 SJ 4 1 1 1 1 1 1 SJ SJ 7 8 1 1 1 1 11 5 6 1 1 1 1 1 1 .1 .1 1 .1 .1 B B .1 B B .1 .1 B .1 .1 B .1 .1 .1 .1 B .1 .1 B X Y X Y X SJ SJ X SW OP SW OP SW OP SW OP 7 8 the systems under consideration. Each of the four IBM PCs in the control lab contains a dSPACE ds1102 DSP board. This board can be connected to the outside world via a connector box. The first step in using the dSPACE system involves logging on to the PC. You should use the username \student" and the password \Eleceng1". All of the files that you generate during the course of the laboratory should be stored in the directory: C:\matlabR11\work\student 3.1 Creating a dSPACE Block Diagram We now present a case study of using the dSPACE system. The implementation of this case study is not part of the laboratory but should give you an idea as to how to carry out the actual laboratory. In order to use the dSPACE system, you must construct block diagrams on MATLAB/SIMULINK and run them on your dSPACE board. After you log onto the PC, run MATLAB as follows: Start Programs Matlab Matlab 5.3 ! ! ! Run simulink and create a block diagram which you wish to implement on dSPACE; e.g., see below: ADC #1 1 1 DAC #1 ADC #2 s s DAC #2 Integrator Integrator1 ADC #3 DAC #3 ADC #4 DAC #4 1 DS1102ADC DS1102DAC Gain 1 Gain1 Figure 4: A simple simulink block diagram Note that the ADC and DAC blocks included in this block diagram are specific to dSPACE and should be obtained from the dSPACE RTI1102 folder of the simulink library browser. Also, ensure that you use the correct board which is ds1102.
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