DOCSLIB.ORG

Tricore C Compiler, Assembler, Linker Reference Manual

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text

Load more

MB060-024-00-00 Doc. ver.: 1.3 TriCore v2.1 C Compiler, Assembler, Linker Reference Manual A publication of Altium BV Documentation Department Copyright 2002-2004 Altium BV All rights reserved. Reproduction in whole or part is prohibited without the written consent of the copyright owner. TASKING is a brand name of Altium Limited. The following trademarks are acknowledged: FLEXlm is a registered trademark of Macrovision Corporation. Intel is a trademark of Intel Corporation. Motorola is a registered trademark of Motorola, Inc. MS-DOS and Windows are registered trademarks of Microsoft Corporation. SUN is a trademark of Sun Microsystems, Inc. UNIX is a registered trademark of X/Open Company, Ltd. All other trademarks are property of their respective owners. Data subject to alteration without notice. http://www.tasking.com http://www.altium.com The information in this document has been carefully reviewed and is believed to be accurate and reliable. However, Altium assumes no liabilities for inaccuracies in this document. Furthermore, the delivery of this information does not convey to the recipient any license to use or copy the software or documentation, except as provided in an executed license agreement covering the software and documentation. Altium reserves the right to change specifications embodied in this document without prior notice. CONTENTS TABLE OF CONTENTS IV TriCore Reference Manual CONTENTS CONTENTS Table of Contents V TRICORE C LANGUAGE 1-1 1.1 Introduction . 1-3 1.2 Data Types . 1-4 1.3 Keywords . 1-6 1.4 Function Qualifiers . 1-9 1.5 Intrinsic Functions . 1-12 1.5.1 Minium and maximum of (Short) Integers . 1-13 1.5.2 Fractional Arithmetic Support . 1-14 1.5.3 Packed Data Type Support . 1-15 1.5.4 Interrupt Handling . 1-19 1.5.5 Insert Single Assembly Instruction . 1-21 1.5.6 Register Handling . 1-22 1.5.7 Insert / Extract Bit-fields and Bits . 1-23 1.5.8 Miscellaneous Intrinsic Functions . 1-25 1.6 Pragmas . 1-26 1.7 Predefined Macros . 1-31 LIBRARIES 2-1 2.1 Introduction . 2-3 2.2 Library Functions . 2-4 2.2.1 assert.h . 2-4 2.2.2 complex.h . 2-4 2.2.3 ctype.h and wctype.h . 2-6 2.2.4 errno.h . 2-7 2.2.5 fcntl.h . 2-9 2.2.6 fenv.h . 2-9 2.2.7 float.h . 2-10 2.2.8 fss.h . 2-10 2.2.9 inttypes.h and stdint.h . 2-11 2.2.10 iso646.h . 2-12 2.2.11 limits.h . 2-12 2.2.12 locale.h . 2-12 2.2.13 math.h and tgmath.h . 2-13 2.2.14 setjmp.h . 2-20 •••••••• VI TriCore Reference Manual 2.2.15 signal.h . 2-20 2.2.16 stdarg.h . 2-21 2.2.17 stdbool.h . 2-21 2.2.18 stddef.h . 2-22 2.2.19 stdint.h . 2-22 2.2.20 stdio.h and wchar.h . 2-22 2.2.21 stdlib.h and wchar.h . 2-33 2.2.22 string.h and wchar.h . 2-37 2.2.23 time.h and wchar.h . 2-41 2.2.24 Unistd.h . 2-44 2.2.25 wchar.h . 2-45 2.2.26 wctype.h . 2-46 2.3 C Library Reentrancy . 2-48 TRICORE ASSEMBLY LANGUAGE 3-1 3.1 Introduction . 3-3 3.2 Built-in Assembly Functions . 3-3 3.2.1 Overview of Built-in Assembly Functions . 3-3 3.2.2 Detailed Description of Built-in Assembly Functions . 3-6 3.3 Assembler Directives and Controls . 3-19 3.3.1 Overview of Assembler Directives . 3-19 3.3.2 Detailed Description of Assembler Directives . 3-21 3.3.3 Overview of Assembler Controls . 3-64 3.3.4 Detailed Description of Assembler Controls . 3-65 RUN-TIME ENVIRONMENT 4-1 4.1 Introduction . 4-3 4.2 Startup Code . 4-3 4.3 Stack Usage . 4-9 4.4 Heap Allocation . 4-10 4.5 Floating-Point Arithmetic . 4-10 4.5.1 Compliance with IEEE-754 . 4-11 4.5.2 Special Floating-Point Values . 4-13 CONTENTS Table of Contents VII 4.5.3 Trapping Floating-Point Exceptions . 4-13 4.5.4 Floating-Point Trap Handling API . 4-15 TOOL OPTIONS 5-1 5.1 Compiler Options . 5-3 5.2 Assembler Options . 5-67 5.3 Linker Options . 5-106 5.4 Control Program Options . 5-152 5.5 Make Utility Options . 5-214 5.6 Archiver Options . 5-243 LIST FILE FORMATS 6-1 6.1 Assembler List File Format . 6-3 6.2 Linker Map File Format . 6-5 OBJECT FILE FORMATS 7-1 7.1 ELF/DWARF Object Format . 7-3 7.2 Motorola S-Record Format . 7-4 7.3 Intel Hex Record Format . 7-8 LINKER SCRIPT LANGUAGE 8-1 8.1 Introduction . 8-3 8.2 Structure of a Linker Script File . 8-3 8.3 Syntax of the Linker Script Language . 8-6 8.3.1 Preprocessing . 8-6 8.3.2 Lexical Syntax . 8-7 8.3.3 Identifiers . 8-7 8.3.4 Expressions . 8-8 8.3.5 Built-in Functions . 8-9 8.3.6 LSL Definitions in the Linker Script File . 8-11 8.3.7 Memory and Bus Definitions . 8-11 8.3.8 Architecture Definition . 8-13 •••••••• VIII TriCore Reference Manual 8.3.9 Derivative Definition . 8-15 8.3.10 Processor Definition and Board Specification . 8-16 8.3.11 Section Placement Definition . 8-16 8.4 Expression Evaluation . 8-20 8.5 Semantics of the Architecture Definition . 8-21 8.5.1 Defining an Architecture . 8-22 8.5.2 Defining Internal Buses . 8-23 8.5.3 Defining Address Spaces . 8-23 8.5.4 Mappings . 8-26 8.6 Semantics of the Derivative Definition . 8-29 8.6.1 Defining a Derivative . 8-29 8.6.2 Instantiating Core Architectures . 8-30 8.6.3 Defining Internal Memory and Buses . 8-31 8.7 Semantics of the Board Specification . 8-33 8.7.1 Defining a Processor . 8-33 8.7.2 Instantiating Derivatives . 8-34 8.7.3 Defining External Memory and Buses . 8-35 8.8 Semantics of the Section Layout Definition . 8-37 8.8.1 Defining a Section Layout . ..
Recommended publications
  • Linux and Electronics

    Linux and Electronics

    Linux and Electronics Urs Lindegger Linux and Electronics Urs Lindegger Copyright © 2019-11-25 Urs Lindegger Table of Contents 1. Introduction .......................................................................................................... 1 Note ................................................................................................................ 1 2. Printed Circuits ...................................................................................................... 2 Printed Circuit Board design ................................................................................ 2 Kicad ....................................................................................................... 2 Eagle ..................................................................................................... 13 Simulation ...................................................................................................... 13 Spice ..................................................................................................... 13 Digital simulation .................................................................................... 18 Wings 3D ....................................................................................................... 18 User interface .......................................................................................... 19 Modeling ................................................................................................ 19 Making holes in Wings 3D .......................................................................
  • A Trusted Mechanised Javascript Specification

    A Trusted Mechanised Javascript Specification

    A Trusted Mechanised JavaScript Specification Martin Bodin Arthur Charguéraud Daniele Filaretti Inria & ENS Lyon Inria & LRI, Université Paris Sud, CNRS Imperial College London [email protected] [email protected] d.fi[email protected] Philippa Gardner Sergio Maffeis Daiva Naudžiunien¯ e˙ Imperial College London Imperial College London Imperial College London [email protected] sergio.maff[email protected] [email protected] Alan Schmitt Gareth Smith Inria Imperial College London [email protected] [email protected] Abstract sation was crucial. Client code that works on some of the main JavaScript is the most widely used web language for client-side ap- browsers, and not others, is not useful. The first official standard plications. Whilst the development of JavaScript was initially just appeared in 1997. Now we have ECMAScript 3 (ES3, 1999) and led by implementation, there is now increasing momentum behind ECMAScript 5 (ES5, 2009), supported by all browsers. There is the ECMA standardisation process. The time is ripe for a formal, increasing momentum behind the ECMA standardisation process, mechanised specification of JavaScript, to clarify ambiguities in the with plans for ES6 and 7 well under way. ECMA standards, to serve as a trusted reference for high-level lan- JavaScript is the only language supported natively by all major guage compilation and JavaScript implementations, and to provide web browsers. Programs written for the browser are either writ- a platform for high-assurance proofs of language properties. ten directly in JavaScript, or in other languages which compile to We present JSCert, a formalisation of the current ECMA stan- JavaScript.
  • BCL: a Cross-Platform Distributed Data Structures Library

    BCL: a Cross-Platform Distributed Data Structures Library

    BCL: A Cross-Platform Distributed Data Structures Library Benjamin Brock, Aydın Buluç, Katherine Yelick University of California, Berkeley Lawrence Berkeley National Laboratory {brock,abuluc,yelick}@cs.berkeley.edu ABSTRACT high-performance computing, including several using the Parti- One-sided communication is a useful paradigm for irregular paral- tioned Global Address Space (PGAS) model: Titanium, UPC, Coarray lel applications, but most one-sided programming environments, Fortran, X10, and Chapel [9, 11, 12, 25, 29, 30]. These languages are including MPI’s one-sided interface and PGAS programming lan- especially well-suited to problems that require asynchronous one- guages, lack application-level libraries to support these applica- sided communication, or communication that takes place without tions. We present the Berkeley Container Library, a set of generic, a matching receive operation or outside of a global collective. How- cross-platform, high-performance data structures for irregular ap- ever, PGAS languages lack the kind of high level libraries that exist plications, including queues, hash tables, Bloom filters and more. in other popular programming environments. For example, high- BCL is written in C++ using an internal DSL called the BCL Core performance scientific simulations written in MPI can leverage a that provides one-sided communication primitives such as remote broad set of numerical libraries for dense or sparse matrices, or get and remote put operations. The BCL Core has backends for for structured, unstructured, or adaptive meshes. PGAS languages MPI, OpenSHMEM, GASNet-EX, and UPC++, allowing BCL data can sometimes use those numerical libraries, but are missing the structures to be used natively in programs written using any of data structures that are important in some of the most irregular these programming environments.
  • Porting and Using Newlib in Embedded Systems William Gatliff Table of Contents Copyright

    Porting and Using Newlib in Embedded Systems William Gatliff Table of Contents Copyright

    Porting and Using Newlib in Embedded Systems William Gatliff Table of Contents Copyright................................................................................................................................3 Newlib.....................................................................................................................................3 Newlib Licenses....................................................................................................................3 Newlib Features ....................................................................................................................3 Building Newlib ...................................................................................................................7 Tweaks ....................................................................................................................................8 Porting Newlib......................................................................................................................9 Onward! ................................................................................................................................19 Resources..............................................................................................................................19 About the Author................................................................................................................19 $Revision: 1.5 $ Although technically not a GNU product, the C runtime library newlib is the best choice for many GNU-based
  • CS 110 Discussion 15 Programming with SIMD Intrinsics

    CS 110 Discussion 15 Programming with SIMD Intrinsics

    CS 110 Discussion 15 Programming with SIMD Intrinsics Yanjie Song School of Information Science and Technology May 7, 2020 Yanjie Song (S.I.S.T.) CS 110 Discussion 15 2020.05.07 1 / 21 Table of Contents 1 Introduction on Intrinsics 2 Compiler and SIMD Intrinsics 3 Intel(R) SDE 4 Application: Horizontal sum in vector Yanjie Song (S.I.S.T.) CS 110 Discussion 15 2020.05.07 2 / 21 Table of Contents 1 Introduction on Intrinsics 2 Compiler and SIMD Intrinsics 3 Intel(R) SDE 4 Application: Horizontal sum in vector Yanjie Song (S.I.S.T.) CS 110 Discussion 15 2020.05.07 3 / 21 Introduction on Intrinsics Definition In computer software, in compiler theory, an intrinsic function (or builtin function) is a function (subroutine) available for use in a given programming language whose implementation is handled specially by the compiler. Yanjie Song (S.I.S.T.) CS 110 Discussion 15 2020.05.07 4 / 21 Intrinsics in C/C++ Compilers for C and C++, of Microsoft, Intel, and the GNU Compiler Collection (GCC) implement intrinsics that map directly to the x86 single instruction, multiple data (SIMD) instructions (MMX, Streaming SIMD Extensions (SSE), SSE2, SSE3, SSSE3, SSE4). Yanjie Song (S.I.S.T.) CS 110 Discussion 15 2020.05.07 5 / 21 x86 SIMD instruction set extensions MMX (1996, 64 bits) 3DNow! (1998) Streaming SIMD Extensions (SSE, 1999, 128 bits) SSE2 (2001) SSE3 (2004) SSSE3 (2006) SSE4 (2006) Advanced Vector eXtensions (AVX, 2008, 256 bits) AVX2 (2013) F16C (2009) XOP (2009) FMA FMA4 (2011) FMA3 (2012) AVX-512 (2015, 512 bits) Yanjie Song (S.I.S.T.) CS 110 Discussion 15 2020.05.07 6 / 21 SIMD extensions in other ISAs There are SIMD instructions for other ISAs as well, e.g.
  • PGI Compilers

    PGI Compilers

    USER'S GUIDE FOR X86-64 CPUS Version 2019 TABLE OF CONTENTS Preface............................................................................................................ xii Audience Description......................................................................................... xii Compatibility and Conformance to Standards............................................................xii Organization................................................................................................... xiii Hardware and Software Constraints.......................................................................xiv Conventions.................................................................................................... xiv Terms............................................................................................................ xv Related Publications.........................................................................................xvii Chapter 1. Getting Started.....................................................................................1 1.1. Overview................................................................................................... 1 1.2. Creating an Example..................................................................................... 2 1.3. Invoking the Command-level PGI Compilers......................................................... 2 1.3.1. Command-line Syntax...............................................................................2 1.3.2. Command-line Options............................................................................
  • Intel Hardware Intrinsics in .NET Core

    Intel Hardware Intrinsics in .NET Core

    Han Lee, Intel Corporation [email protected] Notices and Disclaimers No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps. Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at intel.com, or from the OEM or retailer. The products and services described may contain defects or errors known as errata which may cause deviations from published specifications. Current characterized errata are available on request. No product or component can be absolutely secure. Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548- 4725 or by visiting www.intel.com/design/literature.htm. Intel, the Intel logo, and other Intel product and solution names in this presentation are trademarks of Intel *Other names and brands may be claimed as the property of others © Intel Corporation. 2 What Do These Have in Common? Domain Example Image processing Color extraction High performance computing (HPC) Matrix multiplication Data processing Hamming code Text processing UTF-8 conversion Data structures Bit array Machine learning Classification For performance sensitive code, consider using Intel® hardware intrinsics 3 Objectives .
  • Anatomy of Cross-Compilation Toolchains

    Anatomy of Cross-Compilation Toolchains

    Embedded Linux Conference Europe 2016 Anatomy of cross-compilation toolchains Thomas Petazzoni free electrons [email protected] Artwork and Photography by Jason Freeny free electrons - Embedded Linux, kernel, drivers - Development, consulting, training and support. http://free-electrons.com 1/1 Thomas Petazzoni I CTO and Embedded Linux engineer at Free Electrons I Embedded Linux specialists. I Development, consulting and training. I http://free-electrons.com I Contributions I Kernel support for the Marvell Armada ARM SoCs from Marvell I Major contributor to Buildroot, an open-source, simple and fast embedded Linux build system I Living in Toulouse, south west of France Drawing from Frank Tizzoni, at Kernel Recipes 2016 free electrons - Embedded Linux, kernel, drivers - Development, consulting, training and support. http://free-electrons.com 2/1 Disclaimer I I am not a toolchain developer. Not pretending to know everything about toolchains. I Experience gained from building simple toolchains in the context of Buildroot I Purpose of the talk is to give an introduction, not in-depth information. I Focused on simple gcc-based toolchains, and for a number of examples, on ARM specific details. I Will not cover advanced use cases, such as LTO, GRAPHITE optimizations, etc. I Will not cover LLVM free electrons - Embedded Linux, kernel, drivers - Development, consulting, training and support. http://free-electrons.com 3/1 What is a cross-compiling toolchain? I A set of tools that allows to build source code into binary code for
  • Automated Fortran–C++ Bindings for Large-Scale Scientific Applications

    Automated Fortran–C++ Bindings for Large-Scale Scientific Applications

    Automated Fortran–C++ Bindings for Large-Scale Scientific Applications Seth R Johnson HPC Methods for Nuclear Applications Group Nuclear Energy and Fuel Cycle Division Oak Ridge National Laboratory ORNL is managed by UT–Battelle, LLC for the US Department of Energy github.com/swig-fortran Overview • Introduction • Tools • SWIG+Fortran • Strategies • Example libraries 2 Introduction 3 How did I get involved? • SCALE (1969–present): Fortran/C++ • VERA: multiphysics, C++/Fortran • MPACT: hand-wrapped calls to C++ Trilinos 4 Project background • Exascale Computing Project: at inception, many scientific app codes were primarily Fortran • Numerical/scientific libraries are primarily C/C++ • Expose Trilinos solver library to Fortran app developers: ForTrilinos product 5 ECP: more exascale, less Fortran Higher-level { }Fortran ECP application codes over time (credit: Tom Evans) 6 Motivation • C++ library developers: expand user base, more F opportunities for development and follow-on funding • Fortran scientific app developers: use newly exposed algorithms and tools for your code C • Multiphysics project integration: in-memory coupling of C++ physics code to Fortran physics code • Transitioning application teams: bite-size migration from Fortran to C++ C++ 7 Tools 8 Wrapper “report card” • Portability: Does it use standardized interoperability? • Reusability: How much manual duplication needed for new interfaces? • Capability: Does the Fortran interface have parity with the C++? • Maintainability: Do changes to the C++ code automatically update
  • Optimizing Subroutines in Assembly Language an Optimization Guide for X86 Platforms

    Optimizing Subroutines in Assembly Language an Optimization Guide for X86 Platforms

    2. Optimizing subroutines in assembly language An optimization guide for x86 platforms By Agner Fog. Copenhagen University College of Engineering. Copyright © 1996 - 2012. Last updated 2012-02-29. Contents 1 Introduction ....................................................................................................................... 4 1.1 Reasons for using assembly code .............................................................................. 5 1.2 Reasons for not using assembly code ........................................................................ 5 1.3 Microprocessors covered by this manual .................................................................... 6 1.4 Operating systems covered by this manual................................................................. 7 2 Before you start................................................................................................................. 7 2.1 Things to decide before you start programming .......................................................... 7 2.2 Make a test strategy.................................................................................................... 9 2.3 Common coding pitfalls............................................................................................. 10 3 The basics of assembly coding........................................................................................ 12 3.1 Assemblers available ................................................................................................ 12 3.2 Register set
  • Design and Implementation of Embedded Linux System for Networking Devices

    Design and Implementation of Embedded Linux System for Networking Devices

    Design and Implementation of Embedded Linux System for Networking Devices Hyun-Joon Cha Distributed Processing and Network Management Laboratory Division of Electrical and Computer Engineering (Computer Science and Engineering) [email protected] POSTECH Design and Implementation of Embedded Linux System (1/24) DP&NM Lab. for Networking Devices Contents • Introduction • Current Embedded Operating Systems • Requirements • Design of Embedded Linux System • Implementation • Conclusions • Future work POSTECH Design and Implementation of Embedded Linux System (2/24) DP&NM Lab. for Networking Devices Introduction • Networking Devices – Devices which has networking capability – Infrastructure of emerging information society • e.g.) Router, Switch, Gateway, Cache engine, Cellular phone, PDA, etc. – Network-capable devices will substitute current dummy and not- connected devices all around – Need more resources, processing power and OSs to coordinate it – Most networking devices use commercial Real-time OSs POSTECH Design and Implementation of Embedded Linux System (3/24) DP&NM Lab. for Networking Devices Introduction – cont’d • Embedded OSs for Networking Devices – Commercial: VxWorks, pSOS, QNX, Nucleus, LynxOS, VRTX, etc. – Free or Almost Free: Xinu, uC/OS, etc. • Frequently Raised Problems from Industry and Academy – No OS approach or using educational OS is harmful – High purchase price and royalty -> affect development cost and device price – Limited target and development platform – OS specific architecture and interface – Technology
  • 4. Nios II Software Build Tools

    4. Nios II Software Build Tools

    4. Nios II Software Build Tools May 2011 NII52015-11.0.0 NII52015-11.0.0 This chapter describes the Nios® II Software Build Tools (SBT), a set of utilities and scripts that creates and builds embedded C/C++ application projects, user library projects, and board support packages (BSPs). The Nios II SBT supports a repeatable, scriptable, and archivable process for creating your software product. You can invoke the Nios II SBT through either of the following user interfaces: ■ The Eclipse™ GUI ■ The Nios II Command Shell The purpose of this chapter is to make you familiar with the internal functionality of the Nios II SBT, independent of the user interface employed. 1 Before reading this chapter, consider getting an introduction to the Nios II SBT by first reading one of the following chapters: ■ Getting Started with the Graphical User Interface chapter of the Nios II Software Developer’s Handbook ■ Getting Started from the Command Line chapter of the Nios II Software Developer’s Handbook This chapter contains the following sections: ■ “Road Map for the SBT” ■ “Makefiles” on page 4–3 ■ “Nios II Embedded Software Projects” on page 4–5 ■ “Common BSP Tasks” on page 4–8 ■ “Details of BSP Creation” on page 4–20 ■ “Tcl Scripts for BSP Settings” on page 4–27 ■ “Revising Your BSP” on page 4–30 ■ “Specifying BSP Defaults” on page 4–35 ■ “Device Drivers and Software Packages” on page 4–39 ■ “Boot Configurations for Altera Embedded Software” on page 4–40 ■ “Altera-Provided Embedded Development Tools” on page 4–42 ■ “Restrictions” on page 4–48 © 2011 Altera Corporation.