Operating Systems Virtual Memory Design Issues: Address Translation
Virtual Memory Design Goals COS 318: Operating Systems u Protection u Virtualization l Use disk to extend physical memory Virtual Memory Design Issues: l Make addressing user friendly (0 to high address) Address Translation u Enabling memory sharing (code, libraries, communication) u Efficiency Jaswinder Pal Singh and a Fabulous Course Staff l Translation efficiency (TLB as cache) Computer Science Department l Access efficiency Princeton University • Access time = h × memory access time + ( 1 - h ) × disk access time • E.g. Suppose memory access time = 100ns, disk access time = 10ms (http://www.cs.princeton.edu/courses/cos318/) • If h = 90%, VM access time is 1ms! u Portability 3 1 3 Recall Address translation: Base and Bound Recall Address Translation: Segmentation Processor’s View Implementation Physical u A segment is a contiguous region of virtual memory Memory u Every process has a segment table (in hardware) Virtual Base l Entry in table per segment Memory Base Virtual Virtual Physical Address Address Address u Segment can be located anywhere in physical memory Processor Processor l Each segment has: start, length, access permission u Base+ Processes can share segments Bound Bound l Same start, length, same/different access permissions Raise Exception ◆ Pros: Simple, fast, cheap, safe, can relocate ◆ Cons: ● Can’t keep program from accidentally overwriting its own code ● Can’t share code/data with other processes (all or nothing) ● Can’t grow stack/heap as needed (stop program, change reg, …) 4 5 1 Segmentation Segments Enable Copy-on-Write Process View Implementation Physical u Memory Idea of Copy-on-Write Base 3 Virtual l Child process inherits copy of parent’s address space on fork Memory Stack l But don’t really want to make a copy of all data upon fork Processor Base+ Virtual Bound 3 Address Code Virtual Segment Table l Would like to share as far as possible and make own copy Processor Address Base Bound Access only “on-demand”, i.e.
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