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Outline Paging Working Set Model Working Set Model Working Set Outline Paging 1 Paging 2 Eviction policies 3 Thrashing 4 Details of paging 5 The user-level perspective 6 Case study: 4.4 BSD Use disk to simulate larger virtual than physical mem 1 / 48 • 2 / 48 Working set model Working set model # of accesses # of accesses virtual address virtual address Disk much, much slower than memory Disk much, much slower than memory • • - Goal: run at memory speed, not disk speed - Goal: run at memory speed, not disk speed 80/20 rule: 20% of memory gets 80% of memory accesses 80/20 rule: 20% of memory gets 80% of memory accesses • • - Keep the hot 20% in memory Keep the hot 20% in memory - Keep the cold 80% on disk - Keep the cold 80% on disk 3 / 48 3 / 48 Working set model Paging challenges How to resume a process aer a fault? • - Need to save state and resume - Process might have been in the middle of an instruction! # of accesses What to fetch from disk? virtual address • - Just needed page or more? Disk much, much slower than memory What to eject? • • - Goal: run at memory speed, not disk speed - How to allocate physical pages amongst processes? 80/20 rule: 20% of memory gets 80% of memory accesses - Which of a particular process’s pages to keep in memory? • - Keep the hot 20% in memory Keep the cold 80% on disk 3 / 48 4 / 48 Re-starting instructions What to fetch Hardware provides kernel with information about page fault • - Faulting virtual address (In %cr2 reg on x86—may see it if you Bring in page that caused page fault modify Pintos page_fault and use fault_addr) • Pre-fetch surrounding pages? - Address of instruction that caused fault • - Was the access a read or write? Was it an instruction fetch? - Reading two disk blocks approximately as fast as reading one Was it caused by user access to kernel-only memory? - As long as no track/head switch, seek time dominates Hardware must allow resuming aer a fault - If application exhibits spacial locality, then big win to store and • read multiple contiguous pages Idempotent instructions are easy • Also pre-zero unused pages in idle loop - E.g., simple load or store instruction can be restarted • - Just re-execute any instruction that only accesses one address - Need 0-filled pages for stack, heap, anonymously mmapped memory Complex instructions must be re-started, too • - Zeroing them only on demand is slower - E.g., x86 move string instructions - Hence, many OSes zero freed pages while CPU is idle - Specify src, dst, count in %esi, %edi, %ecx registers - On fault, registers adjusted to resume where move le o 5 / 48 6 / 48 Selecting physical pages Superpages May need to eject some pages How should OS make use of “large” mappings • • - More on eviction policy in two slides - x86 has 2/4MB pages that might be useful May also have a choice of physical pages - Alpha has even more choices: 8KB, 64KB, 512KB, 4MB • Direct-mapped physical caches Sometimes more pages in L2 cache than TLB entries • • - Virtual Physical mapping can aect performance - Don’t want costly TLB misses going to main memory → - In old days: Physical address A conflicts with kC + A Or have two-level TLBs • (where k is any integer, C is cache size) - Want to maximize hit rate in faster L1 TLB - Applications can conflict with each other or themselves OS can transparently support superpages [Navarro] - Scientific applications benefit if consecutive virtual pages do not • conflict in the cache - “Reserve” appropriate physical pages if possible - Many other applications do better with random mapping - Promote contiguous pages to superpages - These days: CPUs more sophisticated than kC + A - Does complicate evicting (esp. dirty pages) – demote 7 / 48 8 / 48 Outline Straw man: FIFO eviction 1 Paging Evict oldest fetched page in system • Example—reference string 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5 2 Eviction policies • 3 physical pages: 9 page faults • 3 Thrashing 4 Details of paging 5 The user-level perspective 6 Case study: 4.4 BSD 9 / 48 10 / 48 - Replace page that will not be used for longest period of time Example—reference string 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5 • With 4 physical pages: • - Looping over memory (then want MRU eviction) Straw man: FIFO eviction Belady’s Anomaly Evict oldest fetched page in system • Example—reference string 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5 • 3 physical pages: 9 page faults • 4 physical pages: 10 page faults • More physical memory doesn’t always mean fewer faults • 10 / 48 11 / 48 Optimal page replacement Optimal page replacement What is optimal (if you knew the future)? What is optimal (if you knew the future)? • • - Replace page that will not be used for longest period of time Example—reference string 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5 • With 4 physical pages: • 12 / 48 12 / 48 LRU page replacement LRU page replacement Approximate optimal with least recently used Approximate optimal with least recently used • • - Because past oen predicts the future - Because past oen predicts the future Example—reference string 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5 Example—reference string 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5 • • With 4 physical pages: 8 page faults With 4 physical pages: 8 page faults • • Problem 1: Can be pessimal – example? Problem 1: Can be pessimal – example? • • - Looping over memory (then want MRU eviction) Problem 2: How to implement? Problem 2: How to implement? • • 13 / 48 13 / 48 Straw man LRU implementations Clock algorithm Use accessed bit supported by most hardware • Stamp PTEs with timer value • - E.g., Pentium will write 1 to A bit in PTE on first access - E.g., CPU has cycle counter - Soware managed TLBs like MIPS can do the same - Automatically writes value to PTE on each page access Do FIFO but skip accessed pages - Scan page table to find oldest counter value = LRU page • A = 0 - Problem: Would double memory traic! Keep pages in circular FIFO list A = 1 A = 1 • Keep doubly-linked list of pages Scan: A = 0 A = 0 • • - On access remove page, place at tail of list - page’s A bit = 1, set to 0 & skip A = 0 A = 0 - Problem: again, very expensive - else if A = 0, evict What to do? A.k.a. second-chance replacement A = 1 A = 1 • • - Just approximate LRU, don’t try to do it exactly A = 1 A = 0 A = 0 14 / 48 15 / 48 Clock algorithm Clock algorithm Use accessed bit supported by most hardware Use accessed bit supported by most hardware • • - E.g., Pentium will write 1 to A bit in PTE on first access - E.g., Pentium will write 1 to A bit in PTE on first access - Soware managed TLBs like MIPS can do the same - Soware managed TLBs like MIPS can do the same Do FIFO but skip accessed pages Do FIFO but skip accessed pages • A = 0 • A = 0 Keep pages in circular FIFO list A = 0 A = 1 Keep pages in circular FIFO list A = 0 A = 1 • • Scan: A = 0 A = 0 Scan: A = 0 A = 0 • • - page’s A bit = 1, set to 0 & skip A = 0 A = 0 - page’s A bit = 1, set to 0 & skip A = 0 A = 0 - else if A = 0, evict - else if A = 0, evict A.k.a. second-chance replacement A = 1 A = 1 A.k.a. second-chance replacement A = 1 A = 1 • • A = 1 A = 0 A = 1 A = 0 A = 0 A = 0 15 / 48 15 / 48 Clock algorithm (continued) Clock algorithm (continued) A = 0 A = 0 A = 1 A = 0 A = 1 A = 0 Large memory may be a problem Large memory may be a problem • • A = 1 A = 1 A = 1 A = 0 - Most pages referenced in long interval - Most pages referenced in long interval Add a second clock hand Add a second clock hand • A = 0 A = 0 • A = 0 A = 0 - Two hands move in lockstep - Two hands move in lockstep - Leading hand clears A bits A = 1 A = 1 - Leading hand clears A bits A = 1 A = 1 - Trailing hand evicts pages with A=0 A = 1 A = 0 - Trailing hand evicts pages with A=0 A = 1 A = 0 A = 0 A = 0 Can also take advantage of hardware Dirty bit Can also take advantage of hardware Dirty bit • • - Each page can be (Unaccessed, Clean), (Unaccessed, Dirty), - Each page can be (Unaccessed, Clean), (Unaccessed, Dirty), (Accessed, Clean), or (Accessed, Dirty) (Accessed, Clean), or (Accessed, Dirty) - Consider clean pages for eviction before dirty - Consider clean pages for eviction before dirty Or use n-bit accessed count instead just A bit Or use n-bit accessed count instead just A bit • • - On sweep: count = (A << (n 1)) (count >> 1) - On sweep: count = (A << (n 1)) (count >> 1) − | − | - Evict page with lowest count - Evict page with lowest count 16 / 48 16 / 48 Clock algorithm (continued) Other replacement algorithms A = 0 A = 1 A = 0 Large memory may be a problem Random eviction • • A = 1 A = 0 - Most pages referenced in long interval - Dirt simple to implement - Not overly horrible (avoids Belady & pathological cases) Add a second clock hand A = 0 A = 0 • LFU (least frequently used) eviction - Two hands move in lockstep • - Leading hand clears A bits A = 1 A = 1 - Instead of just A bit, count # times each page accessed - Least frequently accessed must not be very useful - Trailing hand evicts pages with A=0 A = 1 A = 0 A = 0 (or maybe was just brought in and is about to be used) Can also take advantage of hardware Dirty bit • - Decay usage counts over time (for pages that fall out of usage) - Each page can be (Unaccessed, Clean), (Unaccessed, Dirty), MFU (most frequently used) algorithm (Accessed, Clean), or (Accessed, Dirty) • - Consider clean pages for eviction before dirty - Because page with the smallest count was probably just brought in and has yet to be used Or use n-bit accessed count instead just A bit • - On sweep: count = (A << (n 1)) (count >> 1) Neither LFU nor MFU used very commonly − | • - Evict page with lowest count 16 / 48 17 / 48 Naïve paging Page buering Idea: reduce # of I/Os on the critical
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