ETHERNET TECNOLOGIES 1º: O Que É Ethernet ?
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OFC/NFOEC 2011 Program Archive
OFC/NFOEC 2011 Archive Technical Conference: March 6-10, 2011 Exposition: March 8-10, 2011 Los Angeles Convention Center, Los Angeles, CA, USA At OFC/NFOEC 2011, the optical communications industry was buzzing with the sounds of a larger exhibit hall, expanded programming, product innovations, cutting-edge research presentations, and increased attendance March 6 - 10 in Los Angeles. The exhibit hall grew by 20 percent over last year, featuring new programming for service providers and data center operators, and more exhibitors filling a larger space, alongside its core show floor programs and activities. The more than 500 companies in the exhibition hall showcased innovations in areas such as 100G, tunable XFPs, metro networking, Photonic Integrated Circuits, and more. On hand to demonstrate where the industry is headed were network and test equipment vendors, sub-system and component manufacturers, as well as software, fiber cable and specialty fiber manufacturers. Service providers and enterprises were there to get the latest information on building or upgrading networks or datacenters. OFC/NFOEC also featured expanded program offerings in the areas of high-speed data communications, optical internetworking, wireless backhaul and supercomputing for its 2011 conference and exhibition. This new content and more was featured in standing-room only programs such as the Optical Business Forum, Ethernet Alliance Program, Optical Internetworking Forum Program, Green Touch Panel Session, a special symposium on Meeting the Computercom Challenge and more. Flagship programs Market Watch and the Service Provider Summit also featured topics on data centers, wireless, 100G, and optical networking. Hundreds of educational workshops, short courses, tutorial sessions and invited talks at OFC/NFOEC covered hot topics such as datacom, FTTx/in-home, wireless backhaul, next generation data transfer technology, 100G, coherent, and photonic integration. -
Ethernet Alliance Hosts Third IEEE 802.1 Data Center Bridging
MEDIA ALERT Ethernet Alliance® Hosts Third IEEE 802.1 Data Center Bridging Interoperability Test Event Participation is Open to Both Ethernet Alliance Members and Non‐Members WHAT: The Ethernet Alliance Ethernet in the Data Center Subcommittee has announced it will host an IEEE 802.1 Data Center Bridging (DCB) interoperability test event the week of May 23 in Durham, NH at the University of New Hampshire Interoperability Lab. The Ethernet Alliance invites both members and non‐members to participate in this third DCB test event that will include both protocol and applications testing. The event targets interoperability testing of Ethernet standards being developed by IEEE 802.1 DCB task force to address network convergence issues. Testing of protocols will include projects such as IEEE P802.1Qbb Priority Flow Control (PFC), IEEE P802.1Qaz Enhanced Transmission Selection (ETS) and DCB Capability Exchange Protocol (DCBX). The test event will include testing across a broad vendor community and will exercise DCB features across multiple platforms as well as exercise higher layer protocols such as Fibre Channel over Ethernet (FCoE), iSCSI over DCB, RDMA over Converged Ethernet (RoCE) and other latency sensitive applications. WHY: These test events help vendors create interoperable, market‐ready products that interoperate to the IEEE 802.1 DCB standards. WHEN: Conference Call for Interested Participants: Friday, March 4 at 10 AM PST Event Registration Open Until: March 4, 2011 Event Dates (tentative): May 23‐27, 2011 WHERE: University of New Hampshire Interoperability Lab (UNH‐IOL) Durham, NH WHO: The DCB Interoperability Event is hosted by the Ethernet Alliance. REGISTER: To get more information, learn about participation fees and/or register for the DCB plugfest, please visit Ethernet Alliance DCB Interoperability Test Event page or contact [email protected]. -
Gigabit Ethernet - CH 3 - Ethernet, Fast Ethernet, and Gigabit Ethern
Switched, Fast, and Gigabit Ethernet - CH 3 - Ethernet, Fast Ethernet, and Gigabit Ethern.. Page 1 of 36 [Figures are not included in this sample chapter] Switched, Fast, and Gigabit Ethernet - 3 - Ethernet, Fast Ethernet, and Gigabit Ethernet Standards This chapter discusses the theory and standards of the three versions of Ethernet around today: regular 10Mbps Ethernet, 100Mbps Fast Ethernet, and 1000Mbps Gigabit Ethernet. The goal of this chapter is to educate you as a LAN manager or IT professional about essential differences between shared 10Mbps Ethernet and these newer technologies. This chapter focuses on aspects of Fast Ethernet and Gigabit Ethernet that are relevant to you and doesn’t get into too much technical detail. Read this chapter and the following two (Chapter 4, "Layer 2 Ethernet Switching," and Chapter 5, "VLANs and Layer 3 Switching") together. This chapter focuses on the different Ethernet MAC and PHY standards, as well as repeaters, also known as hubs. Chapter 4 examines Ethernet bridging, also known as Layer 2 switching. Chapter 5 discusses VLANs, some basics of routing, and Layer 3 switching. These three chapters serve as a precursor to the second half of this book, namely the hands-on implementation in Chapters 8 through 12. After you understand the key differences between yesterday’s shared Ethernet and today’s Switched, Fast, and Gigabit Ethernet, evaluating products and building a network with these products should be relatively straightforward. The chapter is split into seven sections: l "Ethernet and the OSI Reference Model" discusses the OSI Reference Model and how Ethernet relates to the physical (PHY) and Media Access Control (MAC) layers of the OSI model. -
Design of a High Speed XAUI Based on Dynamic Reconfigurable
International Journal of Soft Computing And Software Engineering (JSCSE) e-ISSN: 2251-7545 Vol.2,o.9, 2012 DOI: 10.7321/jscse.v2.n9.4 Published online: Sep 25, 2012 Design of a High Speed XAUI Based on Dynamic Reconfigurable Transceiver IP Core * 1Haipeng Zhang, 1Lingjun Kong, 2Xiuju Huang, 3Mengmeng Cao 1 .School of Electronics & Information, Hangzhou Dianzi University, Hangzhou, China, 310018 2. UTSTARCOM Co. Ltd. Hangzhou, China, 310052 3. North China Electric Power University, Department of electronics and Communication Engineering, Baoding, China, 071003 Email:1 [email protected],2 [email protected],3 [email protected] Abstract. By using the dynamic reconfigurable transceiver in high speed interface design, designer can solve critical technology problems such as ensuring signal integrity conveniently, with lower error binary rate. In this paper, we designed a high speed XAUI (10Gbps Ethernet Attachment Unit Interface) to transparently extend the physical reach of the XGMII. The following points are focused: (1) IP (Intellectual Property) core usage. Altera Co. offers two transceiver IP cores in Quartus II MegaWizard Plug-In Manager for XAUI design which is featured of dynamic reconfiguration performance, that is, ALTGX_RECOFIG instance and ALTGX instance, we can get various groups by changing settings of the devices without power off. These two blocks can accomplish function of PCS (Physical Coding Sub-layer) and PMA (Physical Medium Attachment), however, with higher efficiency and reliability. (2) 1+1 protection. In our design, two ALTGX IP cores are used to work in parallel, which named XAUI0 and XAUI1. The former works as the main channel while the latter redundant channel. -
Spec TEG-S40TXD(English).Pdf
TRENDnet TRENDware, USA TEG-S40TXD What's Next in Networking 4-Port 10/100/1000Mbps Copper Gigabit Ethernet Switch TRENDnet’s TEG-S40TXD Copper Gigabit Switch consist of four 10/100/1000Mbps Copper Gigabit Ethernet ports with each port having Auto-negotiation and Auto-MDIX features. The Switch offers a reliable and affordable LAN solution to meet immediate bandwidth demand. Users can connect Server(s) to the Gigabit port(s) to increase network performance or cascade Copper Gigabit Switches together to create high-bandwidth Gigabit backbones. TRENDnet’s TEG- S40TXD provides simple migration, scalability, and flexibility to handle new applications and data types making it a highly reliable and cost effective solution for high-speed network connectivity. Features Benefits 4 x 10/100/1000Mbps Copper Gigabit Ethernet Integration Friendly: Ports Plug-n-Play. Connects with current Fast Ethernet Cat. 5 cables. Full/Half duplex transfer mode for each port (1000Mbps in full-duplex only) Flexible: All ports automatically negotiate Auto-MDIX on each port 10/100/1000Mbps network speed. All ports are Auto-MDIX; connection can Supports store-and-forward switching architecture be made with either a straight through with non-blocking full wire-speed performance or a crossover cable. Supports aging function and 802.3x flow control for Expandability: full-duplex mode and back pressure flow control for Cascade Gigabit Switches together to half-duplex mode operation create a Gigabit backbone. Up to 8K unicast addresses entities per device Performance: Gigabit -
Information Specification ** INF-8474I Rev 3.0 Xenpak 10
** Information Specification ** INF-8474i Rev 3.0 SFF Committee documentation may be purchased in hard copy or electronic form SFF specifications are available at ftp://ftp.seagate.com/sff SFF Committee INF-8474i Specification for Xenpak 10 Gigabit Ethernet Transceiver Rev 3.0 September 18 2002 Secretariat: SFF Committee Abstract: This specification describes the Xenpak 10 Gigabit Ethernet Transceiver. It was developed by the MSA (Multiple Source Agreement) group in which the following companies participated: Agilent Technologies Mitsubishi Electric Blaze Network Products Molex ExceLight NEC Extreme Networks OpNext Finisar Optillion Hitachi Cable PicoLight Ignis Optics Stratos Lightwave Infineon Technologies Tyco Electronics JDS Uniphase Vitesse Semiconductor Luminent This Information Specification was not developed or endorsed by the SFF Committee but was submitted for distribution on the basis that it is of interest to the storage industry. The copyright on the contents remains with the contributor. Contributors are not required to abide by the SFF patent policy. Readers are advised of the possibility that there may be patent issues associated with an implementation which relies upon the contents of an 'i' specification. SFF accepts no responsibility for the validity of the contents. POINTS OF CONTACT: Dan Rausch I. Dal Allan Technical Editor Chairman SFF Committee Avago Technologies 14426 Black Walnut Court 350 West Trimble Rd Saratoga San Jose CA 95131 CA 95070 408-435-6689 408-867-6630 [email protected] [email protected] Xenpak 10 Gigabit Ethernet Transceiver Page 1 ** Information Specification ** INF-8474i Rev 3.0 EXPRESSION OF SUPPORT BY MANUFACTURERS The following member companies of the SFF Committee voted in favor of this industry specification. -
Ipug68 01.3 Lattice Semiconductor XAUI IP Core User’S Guide
ispLever TM CORECORE XAUI IP Core User’s Guide November 2009 ipug68_01.3 Lattice Semiconductor XAUI IP Core User’s Guide Introduction The 10Gb Ethernet Attachment Unit Interface (XAUI) IP Core User’s Guide for the LatticeECP2M™ and LatticeECP3™ FPGAs provides a solution for bridging between XAUI and 10-Gigabit Media Independent Interface (XGMII) devices. This user’s guide implements 10Gb Ethernet Extended Sublayer (XGXS) capabilities in soft logic that together with PCS and SERDES functions implemented in the FGPA provides a complete XAUI-to-XGMII solu- tion. The XAUI IP core package comes with the following documentation and files: • Protected netlist/database • Behavioral RTL simulation model • Source files for instantiating and evaluating the core The XAUI IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to create versions of the IP core that operate in hardware for a limited period of time (approximately four hours) without requiring the pur- chase on an IP license. It may also be used to evaluate the core in hardware in user-defined designs. Details for using the hardware evaluation capability are described in the Hardware Evaluation section of this document. Features • XAUI compliant functionality supported by embedded SERDES PCS functionality implemented in the LatticeECP2M and LatticeECP3, including four channels of 3.125 Gbps serializer/deserializer with 8b10b encod- ing/decoding. • Complete 10Gb Ethernet Extended Sublayer (XGXS) solution based on LatticeECP2M and LatticeECP3 FPGA. • Soft IP targeted to the FPGA implements XGXS functionality conforming to IEEE 802.3ae-2002, including: – 10 GbE Media Independent Interface (XGMII). – Optional Slip buffers for clock domain transfer to/from the XGMII interface. -
OFC 2017 the Fracturing and Burgeoning Ethernet Market
OFC 2017 The Fracturing and Burgeoning Ethernet Market March 21, 2017 www.ethernetalliance.org© 2017 Ethernet Alliance Disclaimer Opinions expressed during this presentation are the views of the presenters, and should not be considered the views or positions of the Ethernet Alliance. 2 © 2017 Ethernet Alliance Introductions • Moderator –John D’Ambrosia, Futurewei • Panelists –Chris Cole, Finisar –Paul Brooks, Viavi –Mark Nowell, Cisco 3 © 2017 Ethernet Alliance Ethernet Switch – Data Center Shipments © 2017 Ethernet Alliance Ethernet Optical Module Market Value 2016 $2.5 billion total market © 2017 Ethernet Alliance Ethernet Optical Module Market Value 2021 $4.4 billion Total Market © 2017 Ethernet Alliance Optical Modules IEEE 802.3 defined chip-to-module (C2M) interfaces enabled non-IEEE 802.3 optical specifications for 40GbE / 100GbE © 2017 Ethernet Alliance 100GbE QSFP28 Consumption in 2016 • SMF modules have majority share • SR4 modules largest individual share 8 © 2017 Ethernet Alliance 400 GbE Optical Solutions 9 © 2017 Ethernet Alliance Standard vs Proprietary Ethernet Optics Standard • 10G-SR • 40G-SR4 • 100G-SR10 • 10G-LR • 40G-FR • 100G-SR4 • 10G-LRM • 40G-LR4 • 100G-LR4 • 10G-ER • 100G-ER4 • 100G-SR2 • 100G-DR Proprietary Reduced • 10G-SR (Sub) • 40G-LR4(Sub) • 100G-LR4 (Lite) Standard • 10G-LR (Sub) • 100G-ER4 (Lite) Extended • 40G-eSR4 • 100G-eLR4 Standard Other • 40G-Bidi/SWDM • 100G-PSM4 • 40G-PSM4 • 100G-CWDM4 / CLR4 / Lite www.ethernetalliance.org 10 © 2017 Ethernet Alliance Standard vs Proprietary Ethernet Optics Volume Shipped Volume www.ethernetalliance.org 11 © 2017 Ethernet Alliance ETHERNET OPTICS WHAT’S THE SAME WHAT’S DIFFERENT Chris Cole, Finisar www.ethernetalliance.org© 2017 Ethernet Alliance Optics History: 10G Data Rate Attribute First Tech. -
Omnitron Systems Product Catalog
Omnitron Systems Product Catalog Network Interface Devices, Multiplexers and Media Converters for Carrier Ethernet, Mobile Backhaul and Enterprise Networks Omnitron Systems About Omnitron Systems With over twenty years in business, Omnitron Systems designs and manufactures Network Interface Devices, media converters and multiplexers that are deployed in LAN and WAN networks worldwide. Omnitron’s high-reliability fiber connectivity products are used by network operators to extend distances, expand capacity and deliver Standards Compliance the next generation of business services and mobile backhaul. Omnitron is dedicated to compliance with ITU, IEEE, RFC and MEF • Service Provider and Cable MSO fiber networks network industry standards. Comprehensive standards compliance • Enterprise LAN and WAN networks ensures full feature functionality and multi-vendor interoperability in complex network environments. • Wireless, Small Cell and Mobile Backhaul networks • Security Surveillance networks Customer Service • Utility Smart Grid networks • Cloud and Data Center networks Omnitron’s highly-trained account managers and engineering support staff understand network technology and have the experience • Federal Government and Military networks to provide solutions that are effective, practical and economical. • State, County and Municipal networks Professional and courteous administrative support is also available • Education and Campus networks to expedite processes and procedures. Quality Statement Awards and Recognition Omnitron Systems is committed -
System Planner
System Planner ACE3600 RTU ab 6802979C45-D Draft 2 Copyright © 2009 Motorola All Rights Reserved March 2009 DISCLAIMER NOTE The information within this document has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for any inaccuracies. Furthermore Motorola reserves the right to make changes to any product herein to improve reliability, function, or design. Motorola does not assume any liability arising out of the application or use of any product, recommendation, or circuit described herein; neither does it convey any license under its patent or right of others. All information resident in this document is considered copyrighted. COMPUTER SOFTWARE COPYRIGHTS The Motorola products described in this Product Planner include copyrighted Motorola software stored in semiconductor memories and other media. Laws in the United States and foreign countries preserve for Motorola certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or reproduce in any form the copyrighted computer program. Accordingly, any copyrighted Motorola computer programs contained in Motorola products described in this Product Planner may not be copied or reproduced in any manner without written permission from Motorola, Inc. Furthermore, the purchase of Motorola products shall not be deemed to grant either directly or by implication, estoppel, or otherwise, any license under the copyright, patents, or patent applications of Motorola, except for the normal non-exclusive, royalty free license to use that arises by operation in law of the sale of a product. TRADEMARKS MOTOROLA and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. -
VSC8489-10 and VSC8489-13
VSC8489-10 and VSC8489-13 Dual Channel WAN/LAN/Backplane Highlights RXAUI/XAUI to SFP+/KR 10 GbE SerDes PHY • IEEE 1588v2 compliant with VeriTime™ • Failover switching and lane ordering Vitesse’s dual channel SerDes PHY provides fully • Simultaneous LAN and WAN support IEEE 1588v2-compliant devices and hardware-based KR • RXAUI/XAUI support support for timing-critical applications, including all • SFP+ I/O with KR support industry-standard protocol encapsulations. • 1 GbE support VeriTime™ is Vitesse’s patent-pending distributed timing technology Applications that delivers the industry’s most accurate IEEE 1588v2 timing implementation. IEEE 1588v2 timing integrated in the PHY is the • Multiple-port RXAUI/XAUI to quickest, lowest cost method of implementing the timing accuracy that SFI/ SFP+ line cards or NICs is critical to maintaining existing timing-critical capabilities during the • 10GBASE-KR compliant backplane migration from TDM to packet-based architectures. transceivers The VSC8489-10 and VSC8489-13 devices support 1-step and 2-step • Carrier Ethernet networks requiring PTP frames for ordinary clock, boundary clock, and transparent clock IEEE 1588v2 timing applications, along with complete Y.1731 OAM performance monitoring capabilities. • Secure data center to data center interconnects The devices meet the SFP+ SR/LR/ER/220MMF host requirements in accordance with the SFF-8431 specifications. They also compensate • 10 GbE switch cards and router cards for optical impairments in SFP+ applications, along with degradations of the PCB. The devices provide full KR support, including KR state machine, for autonegotiation and link optimization. The transmit path incorporates a multitap output driver to provide flexibility to meet the demanding 10GBASE-KR (IEEE 802.3ap) Tx output launch requirements. -
IEEE 802.3 Working Group November 2006 Plenary Week
IEEE 802.3 Working Group November 2006 Plenary Week Robert M. Grow Chair, IEEE 802.3 Working Group [email protected] Web site: www.ieee802.org/3 13 November 2006 IEEE 802 November Plenary 1 Current IEEE 802.3 activities • P802.3ap, Backplane Ethernet Published• P802.3aq, 10GBASE-LRM • P802.3ar, Congestion Management Approved• P802.3as, Frame Format Extensions • P802.3at, DTE Power Enhancements • P802.3av, 10 Gb/s EPON New • Higher Speed Study Group 13 November 2006 IEEE 802 November Plenary 2 P802.3ap Backplane Ethernet • Define Ethernet operation over electrical backplanes – 1Gb/s serial – 10Gb/s serial – 10Gb/s XAUI-based 4-lane – Autonegotiation • In Sponsor ballot • Meeting plan – Complete resolution of comments on P802.3ap/D3.1, 1st recirculation Sponsor ballot – Possibly request conditional approval for submittal to RevCom 13 November 2006 IEEE 802 November Plenary 3 P802.3aq 10GBASE-LRM • Extends Ethernet capabilities at 10 Gb/s – New physical layer to run under 802.3ae specified XGMII – Extends Ethernet capabilities at 10 Gb/s – Operation over FDDI-grade multi-mode fiber • Approved by Standards Board at September meeting • Published 16 October 2006 • No meeting – Final report to 802.3 13 November 2006 IEEE 802 November Plenary 4 P802.3ar Congestion Management • Proposed modified project documents failed to gain consensus support in July • Motion to withdraw the project was postponed to this meeting • Current draft advancement to WG ballot was not considered in July • Meeting plan – Determine future of the project – Reevaluate