The Quick Pocket Reference for Tin-Lead and Lead-Free Solder
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At—At, Batch—Execute Commands at a Later Time
at—at, batch—execute commands at a later time at [–csm] [–f script] [–qqueue] time [date] [+ increment] at –l [ job...] at –r job... batch at and batch read commands from standard input to be executed at a later time. at allows you to specify when the commands should be executed, while jobs queued with batch will execute when system load level permits. Executes commands read from stdin or a file at some later time. Unless redirected, the output is mailed to the user. Example A.1 1 at 6:30am Dec 12 < program 2 at noon tomorrow < program 3 at 1945 pm August 9 < program 4 at now + 3 hours < program 5 at 8:30am Jan 4 < program 6 at -r 83883555320.a EXPLANATION 1. At 6:30 in the morning on December 12th, start the job. 2. At noon tomorrow start the job. 3. At 7:45 in the evening on August 9th, start the job. 4. In three hours start the job. 5. At 8:30 in the morning of January 4th, start the job. 6. Removes previously scheduled job 83883555320.a. awk—pattern scanning and processing language awk [ –fprogram–file ] [ –Fc ] [ prog ] [ parameters ] [ filename...] awk scans each input filename for lines that match any of a set of patterns specified in prog. Example A.2 1 awk '{print $1, $2}' file 2 awk '/John/{print $3, $4}' file 3 awk -F: '{print $3}' /etc/passwd 4 date | awk '{print $6}' EXPLANATION 1. Prints the first two fields of file where fields are separated by whitespace. 2. Prints fields 3 and 4 if the pattern John is found. -
Sn95/Sb5 – Organic Acid 3% Core
Technical Data Sheet Sn95/Sb5 – Organic Acid 3% Core NOMINAL COMPOSITION Tin 94% Min Lead 0.1% Max Arsenic 0.01% Max Antimony 4.5% 5.5 Cadmium 0.005% Max Iron 0.04% Max Copper 0.08% Max Aluminum 0.005% Max Zinc 0.005% Max Silver 0.015% Max Bismuth 0.15% Max Flux – 3% Organic Acid Core by weight PHYSICAL PROPERTIES Solder Alloy Color White Melting Point (Solidus) 450°F (233°C) Flow Point (Liquidus) 464°F (240°C) Specific Gravity 7.26 Density (Lbs/in3) 0.263 Bulk Room Temperature Tensile Strength (PSI) 5,900 Flux Type Water Soluble Organic Acid Physical State Solid Melting Point 250°F (120°C) Chloride Content 4% SOLDERING CHARACTERISTICS Sn95/Sb5 is a general-purpose solder used in applications involving soldering of copper and copper alloys and/or ferrous base alloys where use of lead containing solder is not permitted. This soft solder may be used in applications involving higher service temperatures. Typical applications for this alloy include copper components in air conditioning industry. This alloy is also recommended in applications involving food handling or drinking water components where use of lead containing alloys is not permitted. Antimony bearing alloys are not recommended in soldering of brass parts due to formation of a brittle Sb-Zn inter-metallic. This flux-cored solder can be used on difficult to solder materials where rosin based fluxes and electronic grade organic fluxes are not strong enough. It has been used effectively in many non-electronic applications such as lamps, fuses, and jewelry. The flux is active on copper, brass, bronze, steel, nickel, and stainless steel. -
Course Outline & Schedule
Course Outline & Schedule Call US 408-759-5074 or UK +44 20 7620 0033 Linux Advanced Shell Programming Tools Curriculum The Linux Foundation Course Code LASP Duration 3 Day Course Price $1,830 Course Description The Linux Advanced Shell Programming Tools course is designed to give delegates practical experience using a range of Linux tools to manipulate text and incorporate them into Linux shell scripts. The delegate will practise: Using the shell command line editor Backing up and restoring files Scheduling background jobs using cron and at Using regular expressions Editing text files with sed Using file comparison utilities Using the head and tail utilities Using the cut and paste utilities Using split and csplit Identifying and translating characters Sorting files Translating characters in a file Selecting text from files with the grep family of commands Creating programs with awk Course Modules Review of Shell Fundamentals (1 topic) ◾ Review of UNIX Commands Using Unix Shells (6 topics) ◾ Command line history and editing ◾ The Korn and POSIX shells Perpetual Solutions - Page 1 of 5 Course Outline & Schedule Call US 408-759-5074 or UK +44 20 7620 0033 ◾ The Bash shell ◾ Command aliasing ◾ The shell startup file ◾ Shell environment variables Redirection, Pipes and Filters (7 topics) ◾ Standard I/O and redirection ◾ Pipes ◾ Command separation ◾ Conditional execution ◾ Grouping Commands ◾ UNIX filters ◾ The tee command Backup and Restore Utilities (6 topics) ◾ Archive devices ◾ The cpio command ◾ The tar command ◾ The dd command ◾ Exercise: -
HEP Computing Part I Intro to UNIX/LINUX Adrian Bevan
HEP Computing Part I Intro to UNIX/LINUX Adrian Bevan Lectures 1,2,3 [email protected] 1 Lecture 1 • Files and directories. • Introduce a number of simple UNIX commands for manipulation of files and directories. • communicating with remote machines [email protected] 2 What is LINUX • LINUX is the operating system (OS) kernel. • Sitting on top of the LINUX OS are a lot of utilities that help you do stuff. • You get a ‘LINUX distribution’ installed on your desktop/laptop. This is a sloppy way of saying you get the OS bundled with lots of useful utilities/applications. • Use LINUX to mean anything from the OS to the distribution we are using. • UNIX is an operating system that is very similar to LINUX (same command names, sometimes slightly different functionalities of commands etc). – There are usually enough subtle differences between LINUX and UNIX versions to keep you on your toes (e.g. Solaris and LINUX) when running applications on multiple platforms …be mindful of this if you use other UNIX flavours. – Mac OS X is based on a UNIX distribution. [email protected] 3 Accessing a machine • You need a user account you should all have one by now • can then log in at the terminal (i.e. sit in front of a machine and type in your user name and password to log in to it). • you can also log in remotely to a machine somewhere else RAL SLAC CERN London FNAL in2p3 [email protected] 4 The command line • A user interfaces with Linux by typing commands into a shell. -
Low Melting Temperature Sn-Bi Solder
metals Review Low Melting Temperature Sn-Bi Solder: Effect of Alloying and Nanoparticle Addition on the Microstructural, Thermal, Interfacial Bonding, and Mechanical Characteristics Hyejun Kang, Sri Harini Rajendran and Jae Pil Jung * Department of Materials Science and Engineering, University of Seoul, 163, Seoulsiripdae-ro, Dongdaemun-gu, Seoul 02504, Korea; [email protected] (H.K.); [email protected] (S.H.R.) * Correspondence: [email protected] Abstract: Sn-based lead-free solders such as Sn-Ag-Cu, Sn-Cu, and Sn-Bi have been used extensively for a long time in the electronic packaging field. Recently, low-temperature Sn-Bi solder alloys attract much attention from industries for flexible printed circuit board (FPCB) applications. Low melting temperatures of Sn-Bi solders avoid warpage wherein printed circuit board and electronic parts deform or deviate from the initial state due to their thermal mismatch during soldering. However, the addition of alloying elements and nanoparticles Sn-Bi solders improves the melting temperature, wettability, microstructure, and mechanical properties. Improving the brittleness of the eutectic Sn-58wt%Bi solder alloy by grain refinement of the Bi-phase becomes a hot topic. In this paper, literature studies about melting temperature, microstructure, inter-metallic thickness, and mechanical properties of Sn-Bi solder alloys upon alloying and nanoparticle addition are reviewed. Keywords: low-temperature solder; Sn-58wt%Bi; melting temperature; microstructure; mechani- Citation: Kang, H.; Rajendran, S.H.; cal property Jung, J.P. Low Melting Temperature Sn-Bi Solder: Effect of Alloying and Nanoparticle Addition on the Microstructural, Thermal, Interfacial Bonding, and Mechanical 1. Introduction Characteristics. Metals 2021, 11, 364. -
Atomic Order in Non-Equilibrium Silicon-Germanium-Tin Semiconductors
Atomic Order in Non-Equilibrium Silicon-Germanium-Tin Semiconductors S. Mukherjee1, N. Kodali1, D. Isheim2, S. Wirths3, J. M. Hartmann4, D. Buca3, D. N. Seidman2, and O. Moutanabbir1,* 1 Department of Engineering Physics, École Polytechnique de Montréal, Montréal, C. P. 6079, Succ. Centre-Ville, Montréal, Québec H3C 3A7, Canada. 2 Department of Materials Science and Engineering and Northwestern University Center for Atom-Probe Tomography, Northwestern University, Evanston, IL 60208-3108, USA. 3 Peter Grünberg Institute 9 and JARA - FIT, Forschungszentrum Juelich, Juelich 52425, Germany. 4 CEA, LETI, Minatec Campus, 17 rue des Martyrs, Grenoble 38054, France. The precise knowledge of the atomic order in monocrystalline alloys is fundamental to understand and predict their physical properties. With this perspective, we utilized laser-assisted atom probe tomography to investigate the three-dimensional distribution of atoms in non-equilibrium epitaxial Sn-rich group IV SiGeSn ternary semiconductors. Different atom probe statistical analysis tools including frequency distribution analysis, partial radial distribution functions, and nearest neighbor analysis were employed in order to evaluate and compare the behavior of the three elements to their spatial distributions in an ideal solid solution. This atomistic-level analysis provided clear evidence of an unexpected repulsive interaction between Sn and Si leading to the deviation of Si atoms from the theoretical random distribution. This departure from an ideal solid solution is supported by first principal calculations and attributed to the tendency of the system to reduce its mixing enthalpy throughout the layer-by-layer growth process. PACS: 68.35 bd, 38.35 bg, 34.20 Gj, 68.35 Dv 1 The assumption that the arrangement of atoms within the crystal lattice is perfectly random is a broadly used approximation to establish the physical properties of semiconductor alloys. -
Major Causes of Solder Cracks Applications and Boards That Specially Require Solder Crack Countermeasures Comparison of 2 Soluti
Solder Crack Countermeasures in MLCCs Outline This page introduces major causes and countermeasures of solder crack in MLCCs (Multilayer Fig. 1: Appearance of a solder crack Ceramic Chip Capacitors). (cross-section) Major causes of solder cracks Solder cracks on MLCCs developed from severe usage conditions after going on the market and during manufacturing processes such as soldering. Applications and boards that specially require solder crack countermeasures Solder cracks occur mainly because of thermal fatigue due to thermal shock or temperature cycles or the use of lead-free solder, which is hard and fragile. TDK offers following MLCC products as solder crack countermeasures. 1) Metal terminals “disperse” thermal shock : 2) Equipped with resin layers that absorb stress applied on solder MEGACAP joints and resistant to dropping: Soft termination Comparison of 2 solutions: Summary of “Solder Crack Countermeasures in MLCCs” Major causes of solder cracks Solder cracks on MLCCs developed from severe usage conditions Fig. 2: Major causes of solder cracks and their impact after going on the market and during manufacturing processes such as soldering. The following causes can be listed as the major cause of solder cracks. (1) Thermal shock (heat shock), heat fatigue caused by temperature cycle Solder cracks occur when heat stress is applied to a solder joint due to the difference in the thermal coefficients of the MLCC and PCB, in an environment in which changes between high temperatures and low temperatures are repeated. In addition, it can also occur when temperature control is insufficient during the process of soldering. (2) Lead-free solder Lead-free solder, which started to be used due to environmental considerations, has properties of being rigid and fragile, and has a higher risk of solder cracks compared to conventional eutectic solder; therefore, caution is required when using it. -
Growth and Characterization of Silicon-Germanium-Tin Semiconductors for Future Nanophotonics Devices" (2018)
University of Arkansas, Fayetteville ScholarWorks@UARK Theses and Dissertations 12-2018 Growth and Characterization of Silicon- Germanium-Tin Semiconductors for Future Nanophotonics Devices Bader Saad Alharthi University of Arkansas, Fayetteville Follow this and additional works at: https://scholarworks.uark.edu/etd Part of the Electromagnetics and Photonics Commons, and the Semiconductor and Optical Materials Commons Recommended Citation Alharthi, Bader Saad, "Growth and Characterization of Silicon-Germanium-Tin Semiconductors for Future Nanophotonics Devices" (2018). Theses and Dissertations. 3012. https://scholarworks.uark.edu/etd/3012 This Dissertation is brought to you for free and open access by ScholarWorks@UARK. It has been accepted for inclusion in Theses and Dissertations by an authorized administrator of ScholarWorks@UARK. For more information, please contact [email protected], [email protected]. Growth and Characterization of Silicon-Germanium-Tin Semiconductors for Future Nanophotonics Devices A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Engineering with a concentration in Electrical Engineering by Bader Saad Alharthi King Saud University Bachelor of Science in Physics, 2003 King Fahd University of Petroleum and Minerals Master of Science in Physics, 2009 University of Arkansas Master of Science in Electrical Engineering, 2018 December 2018 University of Arkansas This dissertation is approved for recommendation to the Graduate Council. Hameed A. Naseem, Ph.D. Shui-Qing (Fisher) Yu, Ph.D. Dissertation Director Dissertation Co-Director Simon Ang, Ph.D. Zhong Chen, Ph.D. Committee Member Committee Member Hugh Churchill, Ph.D. Committee Member Abstract The bright future of silicon (Si) photonics has attracted research interest worldwide. The ultimate goal of this growing field is to develop a group IV based Si foundries that integrate Si-photonics with the current complementary metal–oxide–semiconductor (CMOS) on a single chip for mid- infrared optoelectronics and high speed devices. -
Case Study on the Validation of SAC305 and Sncu-Based Solders in SMT, Wave and Hand Soldering at the Contract Assembler Level
Case Study on the Validation of SAC305 and SnCu-based Solders in SMT, Wave and Hand Soldering at the Contract Assembler Level Peter Biocca, ITW Kester Itasca, Illinois Carlos Rivas, SMT Dynamics Anaheim, California Abstract: At the contractor level once a product is required to be soldered with lead-free solders all the processes must be assessed as to insure the same quality a customer has been accustomed to with a 63/37 process is achieved. The reflow, wave soldering and hand assembly processes must all be optimized carefully to insure good joint formation as per the appropriate class of electronics with new solder alloys and often new fluxes. The selection of soldering materials and fluxes are important as to insure high quality solder joints with lead-free solders which tend to wet slower than leaded solders but also the process equipment must be lead-free process compatible. Components must be lead-free and able to meet the thermal requirements of the process but also the MSL (moisture sensitivity limits) must be observed. Board finish must be lead- free and the PCB must be able to sustain higher process temperature cycles with no physical damage but also good solderability to enable subsequent soldering at the wave or hand assembly. Tin-silver-copper has received much publicity in recent years as the lead-free solder of choice. SAC305 was endorsed by the IPC Solder Value Product Council as the preferred option for SMT assembly and most assemblers have transitioned to this alloy for their solder paste requirements. The SAC305 alloy due to its 3.0% content of silver is expensive when compared to traditional 63/37 for this reason many contract manufacturers and PCBA assemblers are opting for less costly options such as tin-copper based solders for wave, selective, hand soldering, dip tinning operations. -
CESM2 Tutorial: Basic Modifications
CESM2 Tutorial: Basic Modifications Christine Shields August 15, 2017 CESM2 Tutorial: Basic Modifications: Review 1. We will use the CESM code located locally on Cheyenne, no need to checkout or download any input data. 2. We will run with resolution f19_g17: (atm/lnd = FV 1.9x2.5 ocn/ice=gx1v7) 3. Default scripts will automatically be configured for you using the code/script base prepared uniquely for this tutorial. 4. For On-site Tutorial ONLY: Please use compute nodes for compiling and login nodes for all other work, including submission. Please do NOT compile unless you have a compile card. To make the tutorial run smoothly for all, we need to regulate the model compiles. When you run from home, you don’t need to compile on the compute nodes. Tutorial Code and script base: /glade/p/cesm/tutorial/cesm2_0_alpha07c/ CESM2 Tutorial: Basic Modifications: Review 1. Log into Cheyenne 2. Execute create_newcase 3. Execute case.setup 4. Log onto compute node (compile_node.csH) 5. Compile model (case.build) 6. Exit compute node (type “exit”) 7. Run model (case.submit) This tutorial contains step by step instructions applicable to CESM2 (wHicH Has not been officially released yet). Documentation: Under construction! http://www.cesm.ucar.edu/models/cesm2.0/ Quick Start Guide: Under construction! http://cesm-development.github.io/cime/doc/build/html/index.Html For older releases, please see past tutorials. CESM2 Tutorial: Basic Modifications: Review: Creating a new case What is the Which Which model configuration ? Which set of components ? casename -
Soldering to Gold Films
Soldering to Gold Films THE IMPORTANCE OF LEAD-INDIUM ALLOYS Frederick G. Yost Sandia Laboratories, Albuquerque, New Mexico, U.S.A. Reliable solder joints can be made on gold metallised microcircuits using lead-indium solders providing certain important conditions are understood and carefully controlled. This paper reviews the three fundamental concepts of scavenging, wetting, and ageing, which are relevant when soldering to gold films. Alloys containing indium have been used for solder- sition and a body centred tetragonal space lattice. ing electronic components to thin gold films and wires Although considerable work has been addressed for at least 14 years. Braun (1, 2) investigated the to the question of clustering and phase separation potential of several multicomponent alloys based in the a field below 20°C (7, 8, 9) the practical signifi- upon the lead-tin-indium ternary alloy system. cance of this phenomenon has not yet materialised. More recently, work on lead-indium binary alloys The most commonly used alloy is the 50 weight has been reported by Jackson (3) and Yost, et al per cent indium composition which has a liquidus (4, 5, 6). In this paper we intend to define, to discuss, temperature of approximately 210°C and a solidus and to illustrate three fundamental concepts relevant temperature of approximately 185°C. Alloys in the to soldering to gold films using lead-indium solders. lead rich phase field, a, freeze dendritically by The lead-indium phase diagram, shown in Figure forming lead rich stalks. The formation of these 1, contains a wealth of useful solder alloys having dendrites causes a surface rumpling which gives the solidus temperatures which range from 156.6°C solder surface a somewhat frosty rather than a shiny (pure indium) to 327.5 °C (pure lead). -
'Pin in Paste' Reflow Process with Combination of Solder Preforms To
As originally published in the IPC Printed Circuit Expo, APEX & Designer Summit Proceedings. Investigation for Use of ‘Pin in Paste’ Reflow Process with Combination of Solder Preforms to Eliminate Wave Soldering Guhan Subbarayan, Scott Priore Assembly Sciences and Technology, Cisco Systems, Inc. San Jose, California [email protected] Paul Koep, Scott Lewin*, Rahul Raut Cookson Electronics - Assembly Materials South Plainfield, NJ; *Elgin, IL Sundar Sethuraman Jabil Circuits San Jose, California ABSTRACT The Pin in Paste (PiP) technology is the process of soldering Pin through hole (PTH) components using the Surface Mount Technology (SMT) reflow process. The use of PiP process offers several advantages compared to the traditional wave soldering process. One of the primary advantages is lowering of cost due to the elimination of the wave soldering process and its associated tooling cost and potential handling damage. Another advantage is that with the wave soldering process, it is extremely difficult to achieve adequate holefill on thermally challenging thick Printed Circuit Boards (PCBs). However, by using PiP process with combination of solder preforms, it is possible to achieve adequate holefill and reliable solder joints for soldering PTH components. The objective of this study is to investigate the use and limitations of machine-placed solid solder preforms during the top- side SMT reflow process for PTH components. An experiment was designed to investigate the following problems: 1) How much additional volume is provided by the combination