A BASEBAND PULSE SHAPING FILTER FOR

GAUSSIAN MINIMUM SHIFT KEYING

1 2 3 3

N. Krishnapura , S. Pavan , C. Mathiazhagan ,B.Ramamurthi

1

Department of Electrical Engineering, Columbia University, New York, NY 10027, USA

2

Texas Instruments, Edison, NJ 08837, USA

3

Department of Electrical Engineering, Indian Institute of Technology, Chennai, 600036, India

Email: [email protected]

measurement results. ABSTRACT

A quadrature mo dulation scheme to realize the

Gaussian pulse shaping is used in digital commu-

same function as Fig. 1 can be derived. In this pap er,

nication systems like DECT, GSM, WLAN to min-

we consider only the scheme shown in Fig. 1.

imize the out of band sp ectral energy. The base-

band rectangular pulse stream is passed through a

2. GAUSSIAN FREQUENCY SHIFT

lter with a Gaussian impulse resp onse b efore fre-

KEYING GFSK

quency mo dulating the carrier. Traditionally this

The output of the system shown in Fig. 1 can b e describ ed

is done by storing the values of the pulse shap e

by

in a ROM and converting it to an analog wave-

Z

t

form with a DAC followed by a smo othing lter.

g  d  1 y t = cos 2f t +2k

c

f

This pap er explores a fully analog implementation

1

of an integrated Gaussian pulse shap er, which can

where f is the unmo dulated carrier frequency, k is the

c

f

result in a reduced power consumption and chip

mo dulating index k =0:25 for Gaussian Minimum Shift

f

area.

Keying|GMSK[1] and g  denotes the of

the rectangular bit stream bt with values in f1; 1g

1. INTRODUCTION

with the impulse resp onse of the shaping lter unity gain

at dc ht. The characterizing quantity of this system is

Gaussian pulse shaping of the baseband pulse stream is

the BT pro duct, where B is the -3 dB bandwidth of the

resorted to in digital communication systems like DECT

b

Gaussian lter and T is the bit p erio d of the input stream.

and GSM in order to limit the sp ectral energy outside

b

A smaller value of BT implies a longer resp onse relative

the transmission band. Gaussian Frequency Shift Key-

b

to T  of the Gaussian lter to a unit pulse. Typical num-

ing GFSK [1] is a scheme where a Gaussian ltered pulse

b

b ers for BT are in the range 0.3, 0.8. For BT =0:5,

stream is used to frequency mo dulate the carrier. Concep-

b b

the commonly used duration b eyond which the unit pulse

tually, this is done by passing the baseband rectangular

resp onse is truncated is 3T 1:5T from the p eak.

pulse stream with values in f1; 1g through a lter with

b b

a Gaussian impulse resp onse. The same can b e thought

3. DIGITAL PULSE SHAPING

of as adding or subtracting delayed versions of the unit

pulse one bit wide pulse of unit amplitude resp onse of

The blo ck diagram of a digital pulse shaping system is

the Gaussian lter dep ending on the sign of the input bit.

shown in Fig. 2. The input bit stream is fed into a shift

The resulting \smo othed" stream is fed to a voltage con-

register, whose length is equal to the number of bit du-

trolled oscillator VCO as shown in Fig. 1.

rations over which the unit pulse resp onse extends for

Traditionally, this pulse shaping is done digitally.

BT = 0:5, this is 3. The ROM contains the samples

b

In order to implement the system, the ideal unit pulse re-

of the resp onse of the Gaussian lter for every p ossible

sp onse which extends from 1 to +1 has to b e truncated

combination of the bit sequence in the shift register. If

to some nite duration. The samples of the truncated step

the Gaussian is sampled m times in every p erio d and the

k

resp onse are stored in a ROM. A DAC converts this dig-

pulse resp onse extends over k bits, the ROM has 2  m

ital data to a staircase waveform which is smo othed bya

values stored in it.

continuous time lter and fed to the VCO Fig. 2.

The output of the ROM feeds a DAC. The staircase

In this pap er, we describ e a more direct realization

waveform at the output of the DAC is ltered using a

of Fig. 1, using a continuous time lter whose impulse re-

continuous time lter b efore b eing fed to the VCO.

sp onse is approximately Gaussian. We present the design

In commonly used communication systems, 6{8

of this lter and show that in many cases, the complexity

bits are required in the DACtokeep the spurious emission

of this lter is the same as that of the smo othing lter

due to the quantization error b elow the sp eci ed limit [2 ]

used in the digital approach. E ectively, the ROM and

[3 ] [4] [7 ]. For a given bit rate, a larger sampling rate re-

the DAC can be eliminated from Fig. 2, resulting in a

laxes the requirements on the smo othing lter, but this is

reduction in the p ower consumption and chip area.

dicult to achieve with high bit rates due to constraints

on the p ower dissipation. For mo derate sampling rates, In the next section, we brie y discuss the GFSK

the lter should have a large attenuation outside the band. system of Fig. 1. In section 3., we consider the design

In addition, it should havea linear phase in order not to issues in a digital pulse shaping scheme. In section 4.,

distort the pulse shap e. To satisfy b oth these criteria, a we derive the continuous time Gaussian pulse shaping l-

high order lter is necessary. To get a feel for the numb ers, ter and present some simulation results demonstrating its

we note that in order to satisfy the DECT sp eci cations, suitability. Section 5. deals with the implementation of

with BT = 0:5, 6 samples per bit duration and a 7{8 the pulse shap er in a 2 m n{well CMOS pro cess and the b

0-7803-4455-3/98/$10.00 (c) 1998 IEEE

th

in order to have sucient ro om for the tuning voltage at bit DAC,a7 order b essel lter is required for smo oth-

the gate of the MOS resistors. The bu er used is a folded ing [5 ]. With a low sampling rate, the lter also requires

casco ded di erential pair in unity gain feedback Fig. 6. some automatic tuning scheme to set the cuto frequency

Two bu ers are used for each di erential biquad. accurately.

The control voltage for the MOS resistors is derived

4. ANALOG PULSE SHAPING

from the master{slave tuning scheme shown in Fig. 7 see

[6 ] for details of op eration. The feedback lo op forces the

The hinttowards obtaining a continuous time lter with a

resonant frequency of the master lter another tunable

Gaussian impulse resp onse comes from the \Central Limit

Sallen{Key biquad to b e equal to the reference frequency.

Theorem" CLT in statistics. This states that the proba-

th

By virtue of on chip comp onent matching, the i biquad

bility density function p df  of the sum of a large number

has a resonant frequency of using the relations in Fig. 5

of indep endent identically distributed random variables

r

approaches a Gaussian. Since the p df of the sum of ran-

C C

1;r ef 2;r ef

dom variables is obtained by convolving the individual

2 ! =2f

p;i

ref

pdf s, we infer that the cascade of a large numb er of iden-

C C

1;i 2;i

tical lters with p ositive impulse resp onses has a Gaus-

which, b eing a function of capacitor ratios, can be set

sian impulse resp onse. This can b e veri ed by cascading

accurately on a chip.

a large numb er of bu ered rst order RC sections.

The reference frequency is chosen to be 2 MHz.

As the name implies, CLT is a limiting result, and a

The master lter is designed for ! = 2  2 MHz and

p

realization with as small a numb er of impulse resp onses a

Q =1. TheQiskept low in order to avoid large voltage

lter with as small an order as p ossible is desirable in

swings across the MOSFETs whichwould cause tuning er-

practice. To this end, we make the following generaliza-

rors due to nonlinearity and also to avoid large capacitor

tions.

ratios see the expressions in Fig. 5.

 A cascade of large numb er of lters has a Gaussian

Casco ded di erential pairs, op erating in op en lo op,

impulse resp onse.

are used for the comparators in Fig. 7. The XOR gate

drives a charge pump to realize the integrator in the lo op.

 The impulse resp onse of a lter with Gaussian mag-

The details are not shown due to lack of space.

nitude resp onse and linear phase is Gaussian.

Fig. 8 shows the chip photograph. Fig. 9 shows

 Bessel lter is optimized for linear phase.

the magnitude resp onse for di erent reference frequencies.

The step resp onse is shown in Fig. 10. The impulse re-

With these facts in mind and with the aid of simulations,

sp onse is approximated by a resp onse to a narrow pulse

we conclude that a high order b essel lter results in a

and is shown in Fig. 11. Slight asymmetry is apparent

\suciently" Gaussian impulse resp onse. Fig. 3 shows

near the b ottom of the output pulse, part of whichisdue

th

the step resp onse of an 8 order b essel lter and an ideal

to the nite width of the exciting pulse.

Gaussian lter for comparison.

Table 1 summarizes the measured characteristics of

th

By computer simulations, it is found that a 7

the chip. The values given are the arithmetic mean and

order b essel lter satis es the sp ectral sp eci cation of

standard deviation for the 3 chips measured. The -3 dB

the DECT standards suppression of energy outside the

frequency is tuned accurately. The maximum bandwidth

band. Note that this is the same order as that used for

is limited by the upp er rail. The minimum bandwidth is

the smo othing lter in the digital pulse shap er section 3..

zero, but for very small values of the control voltage, the

Fig. 4 shows the sp ectrum of the GMSK signal for

MOS \resistors" in Fig. 5 op erate with a small jV

GS

a pseudo random input bit stream with an ideal Gaussian

V j and distort severely. The lower limit is assumed to

T

pulse shap er, for a digital pulse shap er with 10 samples

be the p oint where a 1V input at 50 kHz has a THD

pp

p er bit duration and di erentDAC resolutions and for a

of -40 dB. The distortion measurements are made with a

th

single input tone at 50 kHz whose harmonics are inside

7 order b essel lter. It can b e seen that the p erformance

the passband and also at 576kHz. The distortion in a

of the b essel lter is satisfactory.

Sallen{Key low pass lter increases with frequency due to

increased drop across the MOS resistors. Since the bit

th

5. 8 ORDER IN 2 m

rate is 1.152 MHz, the \fastest" input is a 576 kHz square

CMOS TECHNOLOGY

wave. The p erformance with a 576 kHz sinusoidal input

The chip to b e describ ed is designed with the DECT sp ec-

is given as a measure of the worst case. In practice, the

i cations in mind, which uses a bit rate of 1.152 Mb/s and

inputs have their energy concentrated at frequencies lower

BT =0:5. Therefore, an eighth order b essel lter with a

b

than 576 kHz.

bandwidth of 576 kHz is implemented. In order to set the

6. CONCLUSION

bandwidth accurately, the lter is made tunable and an

automatic frequency control lo op is used.

This pap er describ es the design of an analog Gaussian

th

pulse shaping chip for use in digital communication sys- The 8 order lter is implemented as a cascade of

tems. Simulation results demonstrating the feasibilityof biquads. Since the maximum is 1.23, Sallen{Key

this scheme are shown. It is shown that for large bit rates, biquads can b e used without having excessive sensitivity

the pulse shaping can b e done with circuitry equivalentin to comp onentvalues. A single ended Sallen{Key biquad

complexity to the smo othing lter in the digital shaping using a unity gain bu er, along with its ,

metho d, when a VCO is used for GFSK mo dulation. A is shown in Fig. 5. To reduce the distortion due to the

pulse shaping lter with a -3dB bandwidth of 576 kHz non linearity, two single ended lters are op erated dif-

for DECT cordless telephone applications is fabricated in ferentially. To make the lter tunable, the resistors are

2 m n{well Orbit CMOS technology. Measurement re- realized using nMOS transistors op erating in the trio de

sults are given. region. The common mo de voltage is chosen to b e 0.5 V

0-7803-4455-3/98/$10.00 (c) 1998 IEEE

able 1. Summary of the measured characteristics T rectangular y(t) Gaussian

bit stream φ( t) (GFSK)

echnology 2 m n{well CMOS T filter Integrator cos(.)

{-1, 1}

Supply voltage

3.3 V h(t)

2

Chip area 2.3 mm

63.8 pF slave

Capacitance VCO

9.9 pF master

Reference nom. 2 MHz, sinusoidal

Figure 1. GFSK signal Generation

Power consumption 9:2  0:24 mW

0:27  0:05 dB dc gain

dc o set 15  9:8mV

f 577:7  9:7 kHz -3dB, nom

Input

f 692:3  21:5 kHz

stream

-3dB, max

f 424  8:2 kHz

-3dB, min

409  5:7 V output noise upto 5 MHz

Ref. feedthrough 70:6  0:32 dB Smoothing to VCO

50 kHz test tone: ROM DAC

THD  40 dB 1:63  0:06 V

V Filter

i pp;max

Dyn. range THD  40 dB 63:7  0:57 dB

S=N + D  when THD = N 52:8  0:38 dB

Shift Register

576 kHz test tone:

V THD  40 dB 557  40 mV

i pp;max

Figure 2. Digital Gaussian Pulse Shap er

53:6  0:73 dB Dyn. range THD  40 dB

46:1  0:48 dB S=N + D  when THD = N

step responses: −3dB bandwidth = 1 rad/s

References 1

[1] K. Murota & K. Hirade, \GMSK Mo dulation for Dig-

elephony", IEEE Transactions on

ital Mobile Radio T 0.8

Communications,vol. 29, pp. 1044{50, Jul. 1981.

0.6

[2] Alfredo Linz & Alan Hendrickson, \Ecient Im-

plementation of an I{Q GMSK Mo dulator", IEEE

volts

,vol.43, no.1, pp. 14{23 , Jan. 1996.

TCAS{II 0.4

B. Baggini et al., \Integrated Digital Mo dulator and [3] solid: Bessel Filter(order 8)

0.2 dashed: Ideal

Analog Front-End for GSM Digital Cellular Mobile

Radio System", Proc. IEEE 1991 CICC vol. 31, pp.

7.6.1{4, Mar. 1991. 0

D. Sallaerts et al., \Ecient Implementation of an [4] 0 1 2 3 4 5 6 7

seconds

I{Q GMSK Mo dulator", Digest 1990 IEEE ISSCC,

pp. 336, 345

Figure 3. Step Resp onses

[5] F. Yang & C. Enz, \A Low Distortion Seventh Order

Bessel Filter Op erating at 2.5 Volts Supply", Proc.

IEEE 1995 CICC, pp. 551{554.

0

[6] Y. P. Tsividis and J. O. Vo orman eds., Integrated

Continuous Time Filters, IEEE Press 1992.

−20

1TM

[7] Speci cation for the DECT ARi Interfacetothe

(dB) 4 bits

adio Frequency Front End, National Semiconductor

R −40 App. Note 908, Sep. 1993. rum t −60 pec S

d −80 ze li −100 7 bits orma N

−120 Proposed Shaper ∞ Ideal −140 ∞ −160 0 0.5 1 1.5 2 2.5 3 3.5 4

fTb − fc

Figure 4. GMSK Sp ectrum with Di erent Pulse Shap ers

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C 1

Unity gain buffer RR Vi

Vo(s) = H(s) V i(s) 1 H(s) = ω 2 ω (s/ p ) + (s/Q p ) + 1 C 2 1/2 ω 1 1 C1 p = Q = R (C C ) 1/2 2 ( C )

1 2 2

nd

Figure 5. 2 order Sallen{Key Filter

bias_up

Figure 9. Frequency Resp onse: f = 1.4, 1.8, 2.2

ref MHz

in out

mid

bias_dn

Figure 6. Unity Gain Bu er

f ref 2nd order Master Filter sinusoidal reference input control Integrator (Charge Pump) control rectangular

gaussian

Fabricated Filter Step Resp onse bit stream in 8th order Figure 10. filtered Bessel Filter

stream out

Figure 7. Frequency Tuning Lo op

Figure 11. Resp onse to a Narrow Pulse

Figure 8. Chip Photograph

0-7803-4455-3/98/$10.00 (c) 1998 IEEE