Rocm: Leveraging Open Source Software for Accelerating
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GLSL 4.50 Spec
The OpenGL® Shading Language Language Version: 4.50 Document Revision: 7 09-May-2017 Editor: John Kessenich, Google Version 1.1 Authors: John Kessenich, Dave Baldwin, Randi Rost Copyright (c) 2008-2017 The Khronos Group Inc. All Rights Reserved. This specification is protected by copyright laws and contains material proprietary to the Khronos Group, Inc. It or any components may not be reproduced, republished, distributed, transmitted, displayed, broadcast, or otherwise exploited in any manner without the express prior written permission of Khronos Group. You may use this specification for implementing the functionality therein, without altering or removing any trademark, copyright or other notice from the specification, but the receipt or possession of this specification does not convey any rights to reproduce, disclose, or distribute its contents, or to manufacture, use, or sell anything that it may describe, in whole or in part. Khronos Group grants express permission to any current Promoter, Contributor or Adopter member of Khronos to copy and redistribute UNMODIFIED versions of this specification in any fashion, provided that NO CHARGE is made for the specification and the latest available update of the specification for any version of the API is used whenever possible. Such distributed specification may be reformatted AS LONG AS the contents of the specification are not changed in any way. The specification may be incorporated into a product that is sold as long as such product includes significant independent work developed by the seller. A link to the current version of this specification on the Khronos Group website should be included whenever possible with specification distributions. -
Intel Corporation
US RESEARCH | PUBLISHED BY RAYMOND JAMES & ASSOCIATES INTEL CORPORATION (INTC-NASDAQ) JULY 26, 2021 | 8:27 PM EDT Semiconductors COMPANY BRIEF Chris Caso | (212) 856-4893 | [email protected] Melissa Fairbanks | (727) 567-1081 | [email protected] Underperform 4 New Names, Same Problems Suitability M/ACC Intel hosted its "Intel Accelerated" manufacturing roadmap update Monday evening, detailing their process roadmap through 2025. The presentation laid a path through which Intel hopes to MARKET DATA Current Price (Jul-26-21) $54.31 have achieved parity with TSMC (and by extension, AMD) by 2024, and a goal of process leadership Market Cap (mln) $221,802 by 2025. This is no different from the goals laid out by Intel’s new CEO when he came on board Current Net Debt (mln) $10,552 a quarter ago, but the company did provide more details about how they intend to achieve that Enterprise Value (mln) $232,354 Shares Outstanding (mln) 4,084.0 goal. Attaining leadership by 2025 requires Intel to introduce a full process node improvement 30-Day Avg. Daily Value (mln) $1,362.7 each year for the next 4 years – an aggressive assumption given the production missteps from Dividend $1.39 the past several years. What Intel didn’t disclose were the costs of this roadmap, which we Dividend Yield 2.6% 52-Week Range $43.61 - $68.49 expect them to discuss during the November analyst day. And while there is great uncertainty BVPS $14.76 about Intel’s ability to achieve these targets, what’s less uncertain is a requirement for higher Long-Term Debt (mln) $24,632 capital intensity. -
Implementing FPGA Design with the Opencl Standard
Implementing FPGA Design with the OpenCL Standard WP-01173-3.0 White Paper Utilizing the Khronos Group’s OpenCL™ standard on an FPGA may offer significantly higher performance and at much lower power than is available today from hardware architectures such as CPUs, graphics processing units (GPUs), and digital signal processing (DSP) units. In addition, an FPGA-based heterogeneous system (CPU + FPGA) using the OpenCL standard has a significant time-to-market advantage compared to traditional FPGA development using lower level hardware description languages (HDLs) such as Verilog or VHDL. 1 OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos. Introduction The initial era of programmable technologies contained two different extremes of programmability. As illustrated in Figure 1, one extreme was represented by single core CPU and digital signal processing (DSP) units. These devices were programmable using software consisting of a list of instructions to be executed. These instructions were created in a manner that was conceptually sequential to the programmer, although an advanced processor could reorder instructions to extract instruction-level parallelism from these sequential programs at run time. In contrast, the other extreme of programmable technology was represented by the FPGA. These devices are programmed by creating configurable hardware circuits, which execute completely in parallel. A designer using an FPGA is essentially creating a massively- fine-grained parallel application. For many years, these extremes coexisted with each type of programmability being applied to different application domains. However, recent trends in technology scaling have favored technologies that are both programmable and parallel. Figure 1. -
Ipox® Portfolio Holding Analysis 02/24/2021
IPOX® PORTFOLIO HOLDING ANALYSIS 02/24/2021 To learn more, visit www.ipox.com; Email: [email protected] MARVELL TECHNOLOGY GROUP LTD (MRVL US) | AQUANTIA CORP (AQ US) Office: +1 (312) 526-3634 COMPANY DESCRIPTION Support +1 (312) 339-4114 ACQUIRER Founded in 1995, Marvell Technology Group is semiconductor company headquartered in Santa Clara, CA. Marvell provides data infrastructure semiconductor solutions for data storage, processing, networking, security and connectivity. TARGET Founded in 2004, Aquantia Corp is a fabless semiconductor company that designs, develops and markets advanced high-speed communications integrated circuits (ICs) for Ethernet connectivity. TARGET IPO HISTORY Aquantia began trading on the NYSE on 11/3/2017 led by Morgan Stanley. The ICs developer sold 6,818,000 shares at $9.00 per share, below its expected price range ($10 to $12). With the 15% greenshoe options fully exercised, Aquantia was valued at ca. $300.09 million. The shares opened at $9.31/share and closed the first day higher at $9.51 (▲5.67%). Aquantia Corp entered the IPOX® Universe on the 7th day of trading. M&A HISTORY Marvell Technology Group announced to buy Aquantia for $452 million on 5/9/2019 at $13.25 per share in cash, which represented a 38.60% premium to Aquantia’s previous close. The acquisition of the Multi-Gig Ethernet company was completed on 9/19/2019. Marvell Technology Group was included in the IPOX® 100 U.S. Portfolio (ETF: FPX) on 3/23/2020 and currently weights approximately 4.90% of the portfolio. *Marvell Technology Group was added to the Nasdaq-100 Index® on December 21, 2020. -
The Amd Linux Graphics Stack – 2018 Edition Nicolai Hähnle Fosdem 2018
THE AMD LINUX GRAPHICS STACK – 2018 EDITION NICOLAI HÄHNLE FOSDEM 2018 1FEBRUARY 2018 | CONFIDENTIAL GRAPHICS STACK: KERNEL / USER-SPACE / X SERVER Mesa OpenGL & Multimedia Vulkan Vulkan radv AMDVLK OpenGL X Server radeonsi Pro/ r600 Workstation radeon amdgpu LLVM SCPC libdrm radeon amdgpu FEBRUARY 2018 | AMD LINUX GRAPHICS STACK 2FEBRUARY 2018 | CONFIDENTIAL GRAPHICS STACK: OPEN-SOURCE / CLOSED-SOURCE Mesa OpenGL & Multimedia Vulkan Vulkan radv AMDVLK OpenGL X Server radeonsi Pro/ r600 Workstation radeon amdgpu LLVM SCPC libdrm radeon amdgpu FEBRUARY 2018 | AMD LINUX GRAPHICS STACK 3FEBRUARY 2018 | CONFIDENTIAL GRAPHICS STACK: SUPPORT FOR GCN / PRE-GCN HARDWARE ROUGHLY: GCN = NEW GPUS OF THE LAST 5 YEARS Mesa OpenGL & Multimedia Vulkan Vulkan radv AMDVLK OpenGL X Server radeonsi Pro/ r600 Workstation radeon amdgpu LLVM(*) SCPC libdrm radeon amdgpu (*) LLVM has pre-GCN support only for compute FEBRUARY 2018 | AMD LINUX GRAPHICS STACK 4FEBRUARY 2018 | CONFIDENTIAL GRAPHICS STACK: PHASING OUT “LEGACY” COMPONENTS Mesa OpenGL & Multimedia Vulkan Vulkan radv AMDVLK OpenGL X Server radeonsi Pro/ r600 Workstation radeon amdgpu LLVM SCPC libdrm radeon amdgpu FEBRUARY 2018 | AMD LINUX GRAPHICS STACK 5FEBRUARY 2018 | CONFIDENTIAL MAJOR MILESTONES OF 2017 . Upstreaming the DC display driver . Open-sourcing the AMDVLK Vulkan driver . Unified driver delivery . OpenGL 4.5 conformance in the open-source Mesa driver . Zero-day open-source support for new hardware FEBRUARY 2018 | AMD LINUX GRAPHICS STACK 6FEBRUARY 2018 | CONFIDENTIAL KERNEL: AMDGPU AND RADEON HARDWARE SUPPORT Pre-GCN radeon GCN 1st gen (Southern Islands, SI, gfx6) GCN 2nd gen (Sea Islands, CI(K), gfx7) GCN 3rd gen (Volcanic Islands, VI, gfx8) amdgpu GCN 4th gen (Polaris, RX 4xx, RX 5xx) GCN 5th gen (RX Vega, Ryzen Mobile, gfx9) FEBRUARY 2018 | AMD LINUX GRAPHICS STACK 7FEBRUARY 2018 | CONFIDENTIAL KERNEL: AMDGPU VS. -
AMD Socket AM2 with AMD M690T Chipset Reference Schematic D D
5 4 3 2 1 AMD Socket AM2 with AMD M690T Chipset Reference Schematic D D NOTES: Page Index Page Index ------- -------------------------------------------- ------- -------------------------------------------- 1) This schematic supports the AMD Socket AM2 CPU devices. 1 Cover Page 17 SB600 PCIe, PCI, LPC, Straps, & CPU Control 2) These are "Reference Schematics" and as such they have 2 Revision History 18 SB600 ACPI, GPIO, USB, and Audio Interfaces not been verified by an actual board build. 3 Block Diagram 19 SB SATA, IDE, SPI, and HW Management Interfaces 3) This reference schematic supports AMD M960T revision 4 Clock Structure 20 SB600 Power A12 or later. If A12 or later revision is not used, please 5 Power Configuration (1) 21 CRT Connector see your customer support representative for the 6 Power Configuration (2) 22 Broadcom Ethernet Controller necessary application notes for workarounds. 7 Reset & Voltage Sequence 23 Realtek Audio Codec C 4) This reference schematic supports SB600 revision 8 Socket AM2 HT Interface 24 LPC BIOS C A21 or later. If A21 or later revision is not used, please 9 Socket AM2 DDRII Memory Interface 25 USB Power and Connectors see your customer support representative for the 10 Socket AM2 Control & Debug 26 Power Main System, SB600 PCIe, & Other necessary application notes for workarounds. 11 Socket AM2 Power & Ground 27 Standby Power & Powergood 5) Unless otherwise specified, resistors have 5% tolerance. 12 SODIMM DDR2 28 Power for CPU Core 13 M690T HT, PCI, PCIe(R), PCIe Graphics Port 29 Power for DDR2 Memory and Interface 6) Unless otherwise specified, capacitors have 20% tolerance. 14 M690T PLL and Video Interface 30 Power M690T Core, PCIe Interface 15 M690T Power and Side Port Memory Interface 31 Unused Interfaces 16 Clock Generator IMPORTANT NOTICE: B 1. -
Khronos Template 2015
Ecosystem Overview Neil Trevett | Khronos President NVIDIA Vice President Developer Ecosystem [email protected] | @neilt3d © Copyright Khronos Group 2016 - Page 1 Khronos Mission Software Silicon Khronos is an Industry Consortium of over 100 companies creating royalty-free, open standard APIs to enable software to access hardware acceleration for graphics, parallel compute and vision © Copyright Khronos Group 2016 - Page 2 http://accelerateyourworld.org/ © Copyright Khronos Group 2016 - Page 3 Vision Pipeline Challenges and Opportunities Growing Camera Diversity Diverse Vision Processors Sensor Proliferation 22 Flexible sensor and camera Use efficient acceleration to Combine vision output control to GENERATE PROCESS with other sensor data an image stream the image stream on device © Copyright Khronos Group 2016 - Page 4 OpenVX – Low Power Vision Acceleration • Higher level abstraction API - Targeted at real-time mobile and embedded platforms • Performance portability across diverse architectures - Multi-core CPUs, GPUs, DSPs and DSP arrays, ISPs, Dedicated hardware… • Extends portable vision acceleration to very low power domains - Doesn’t require high-power CPU/GPU Complex - Lower precision requirements than OpenCL - Low-power host can setup and manage frame-rate graph Vision Engine Middleware Application X100 Dedicated Vision Processing Hardware Efficiency Vision DSPs X10 GPU Compute Accelerator Multi-core Accelerator Power Efficiency Power X1 CPU Accelerator Computation Flexibility © Copyright Khronos Group 2016 - Page 5 OpenVX Graphs -
Advanced Micro Devices, Inc. 2485 Augustine Drive Santa Clara, California 95054
ADVANCED MICRO DEVICES, INC. 2485 AUGUSTINE DRIVE SANTA CLARA, CALIFORNIA 95054 NOTICE OF ANNUAL MEETING OF STOCKHOLDERS You are cordially invited to attend our 2020 annual meeting of stockholders (our “Annual Meeting”) to be held on Thursday, May 7, 2020 at 9:00 a.m. Pacific Time. In light of the coronavirus/COVID-19 outbreak and governmental decrees that in-person gatherings be postponed or canceled, and in the best interests of public health and the health and safety of our Board of Directors, employees and stockholders, the Annual Meeting will be held virtually via the Internet at www.virtualshareholdermeeting.com/AMD2020. You will not be able to attend the Annual Meeting in person. We are holding our Annual Meeting to: • Elect the eight director nominees named in this proxy statement; • Ratify the appointment of Ernst & Young LLP as our independent registered public accounting firm for the current fiscal year; • Approve on a non-binding, advisory basis the compensation of our named executive officers, as disclosed in this proxy statement pursuant to the compensation disclosure rules of the U.S. Securities and Exchange Commission (the “SEC”); and • Transact any other business that properly comes before our Annual Meeting or any adjournment or postponement thereof. We are pleased to provide access to our proxy materials over the Internet under the SEC’s “notice and access” rules. As a result, we are mailing to our stockholders (other than those who previously requested printed or emailed materials on an ongoing basis) a Notice of Internet Availability of Proxy Materials (the “Notice”) instead of printed copies of our proxy materials. -
Khronos Native Platform Graphics Interface (EGL Version 1.4 - April 6, 2011)
Khronos Native Platform Graphics Interface (EGL Version 1.4 - April 6, 2011) Editor: Jon Leech 2 Copyright (c) 2002-2011 The Khronos Group Inc. All Rights Reserved. This specification is protected by copyright laws and contains material proprietary to the Khronos Group, Inc. It or any components may not be reproduced, repub- lished, distributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express prior written permission of Khronos Group. You may use this specification for implementing the functionality therein, without altering or removing any trademark, copyright or other notice from the specification, but the receipt or possession of this specification does not convey any rights to reproduce, disclose, or distribute its contents, or to manufacture, use, or sell anything that it may describe, in whole or in part. Khronos Group grants express permission to any current Promoter, Contributor or Adopter member of Khronos to copy and redistribute UNMODIFIED versions of this specification in any fashion, provided that NO CHARGE is made for the specification and the latest available update of the specification for any version of the API is used whenever possible. Such distributed specification may be re- formatted AS LONG AS the contents of the specification are not changed in any way. The specification may be incorporated into a product that is sold as long as such product includes significant independent work developed by the seller. A link to the current version of this specification on the Khronos Group web-site should be included whenever possible with specification distributions. Khronos Group makes no, and expressly disclaims any, representations or war- ranties, express or implied, regarding this specification, including, without limita- tion, any implied warranties of merchantability or fitness for a particular purpose or non-infringement of any intellectual property. -
The Openvx™ Specification
The OpenVX™ Specification Version 1.0.1 Document Revision: r31169 Generated on Wed May 13 2015 08:41:43 Khronos Vision Working Group Editor: Susheel Gautam Editor: Erik Rainey Copyright ©2014 The Khronos Group Inc. i Copyright ©2014 The Khronos Group Inc. All Rights Reserved. This specification is protected by copyright laws and contains material proprietary to the Khronos Group, Inc. It or any components may not be reproduced, republished, distributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express prior written permission of Khronos Group. You may use this specifica- tion for implementing the functionality therein, without altering or removing any trademark, copyright or other notice from the specification, but the receipt or possession of this specification does not convey any rights to reproduce, disclose, or distribute its contents, or to manufacture, use, or sell anything that it may describe, in whole or in part. Khronos Group grants express permission to any current Promoter, Contributor or Adopter member of Khronos to copy and redistribute UNMODIFIED versions of this specification in any fashion, provided that NO CHARGE is made for the specification and the latest available update of the specification for any version of the API is used whenever possible. Such distributed specification may be re-formatted AS LONG AS the contents of the specifi- cation are not changed in any way. The specification may be incorporated into a product that is sold as long as such product includes significant independent work developed by the seller. A link to the current version of this specification on the Khronos Group web-site should be included whenever possible with specification distributions. -
SYCL – Introduction and Hands-On
SYCL – Introduction and Hands-on Thomas Applencourt + people on next slide - [email protected] Argonne Leadership Computing Facility Argonne National Laboratory 9700 S. Cass Ave Argonne, IL 60349 Book Keeping Get the example and the presentation: 1 git clone https://github.com/alcf-perfengr/sycltrain 2 cd sycltrain/presentation/2020_07_30_ATPESC People who are here to help: • Collen Bertoni - [email protected] • Brian Homerding - [email protected] • Nevin ”:)” Liber [email protected] • Ben Odom - [email protected] • Dan Petre - [email protected]) 1/17 Table of contents 1. Introduction 2. Theory 3. Hands-on 4. Conclusion 2/17 Introduction What programming model to use to target GPU? • OpenMP (pragma based) • Cuda (proprietary) • Hip (low level) • OpenCL (low level) • Kokkos, RAJA, OCCA (high level, abstraction layer, academic projects) 3/17 What is SYCL™?1 1. Target C++ programmers (template, lambda) 1.1 No language extension 1.2 No pragmas 1.3 No attribute 2. Borrow lot of concept from battle tested OpenCL (platform, device, work-group, range) 3. Single Source (two compilations passes) 4. High level data-transfer 5. SYCL is a Specification developed by the Khronos Group (OpenCL, SPIR, Vulkan, OpenGL) 1SYCL Doesn’t mean ”Someone You Couldn’t Love”. Sadly. 4/17 SYCL Implementations 2 2Credit: Khronos groups (https://www.khronos.org/sycl/) 5/17 Goal of this presentation 1. Give you a feel of SYCL 2. Go through code examples (and make you do some homework) 3. Teach you enough so that can search for the rest if you interested 4. Question are welcomed! 3 3Please just talk, or use slack 6/17 Theory A picture is worth a thousand words4 4and this is a UML diagram so maybe more! 7/17 Memory management: SYCL innovation 1. -
Opencl on The
Introduction to OpenCL Cliff Woolley, NVIDIA Developer Technology Group Welcome to the OpenCL Tutorial! . OpenCL Platform Model . OpenCL Execution Model . Mapping the Execution Model onto the Platform Model . Introduction to OpenCL Programming . Additional Information and Resources OpenCL is a trademark of Apple, Inc. Design Goals of OpenCL . Use all computational resources in the system — CPUs, GPUs and other processors as peers . Efficient parallel programming model — Based on C99 — Data- and task- parallel computational model — Abstract the specifics of underlying hardware — Specify accuracy of floating-point computations . Desktop and Handheld Profiles © Copyright Khronos Group, 2010 OPENCL PLATFORM MODEL It’s a Heterogeneous World . A modern platform includes: – One or more CPUs CPU – One or more GPUs CPU – Optional accelerators (e.g., DSPs) GPU GMCH DRAM ICH GMCH = graphics memory control hub ICH = Input/output control hub © Copyright Khronos Group, 2010 OpenCL Platform Model Computational Resources … … … … … …… Host … Processing …… Element … … Compute Device Compute Unit OpenCL Platform Model Computational Resources … … … … … …… Host … Processing …… Element … … Compute Device Compute Unit OpenCL Platform Model on CUDA Compute Architecture … CUDA CPU … Streaming … Processor … … …… Host … Processing …… Element … … Compute Device Compute Unit CUDA CUDA-Enabled Streaming GPU Multiprocessor Anatomy of an OpenCL Application OpenCL Application Host Code Device Code • Written in C/C++ • Written in OpenCL C • Executes on the host • Executes on the device … … … … … …… Host … Compute …… Devices … … Host code sends commands to the Devices: … to transfer data between host memory and device memories … to execute device code Anatomy of an OpenCL Application . Serial code executes in a Host (CPU) thread . Parallel code executes in many Device (GPU) threads across multiple processing elements OpenCL Application Host = CPU Serial code Device = GPU Parallel code … Host = CPU Serial code Device = GPU Parallel code ..