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Memristive Systems Analysis of 3-Terminal Devices

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Memristive Systems Analysis of 3-Terminal Devices Memristive Systems Analysis of 3-Terminal Devices Blaise Mouttet George Mason University Fairfax, Va USA Abstract— Memristive systems were proposed in 1976 by Leon rarely been applied in electronic device design or analysis. Chua and Sung Mo Kang as a model for 2-terminal passive Only recently has it been recognized that the memristive nonlinear dynamical systems which exhibit memory effects. Such systems framework may be relevant to the modeling of passive, systems were originally shown to be relevant to the modeling of 2-terminal semiconductor devices which exhibit memory action potentials in neurons in regards to the Hodgkin-Huxley resistance effects [3]. This is despite the fact that materials model and, more recently, to the modeling of thin film materials exhibiting such effects were known [4] several years prior to such as TiO2-x proposed for non-volatile resistive memory. the original memristive systems paper ! However, over the past 50 years a variety of 3-terminal non- passive dynamical devices have also been shown to exhibit The memristive systems framework has recently been memory effects similar to that predicted by the memristive expanded to cover memory capacitance and memory system model. This article extends the original memristive inductance devices [5]. This begs the question of whether it systems framework to incorporate 3-terminal, non-passive would also be useful to develop an expanded memristive devices and explains the applicability of such dynamic systems systems model to cover memory transistors. Several examples models to 1) the Widrow-Hoff memistor, 2) floating gate memory of memory transistors are found in the literature dating back 50 cells, and 3) nano-ionic FETs. years [6]-[16] but there is an apparent lack of a formal dynamic systems analysis of these devices comparable to the memristive Keywords-memristive systems, memistor, transconductance, systems approach of Chua and Kang. In Section II formal synaptic transistor; non-linear dynamic systems dynamic systems framework for memory transistors is I. INTRODUCTION proposed and small-signal AC characteristics are determined. In Section III some examples of memory transistors from the Memristive systems [1] was originally defined in 1976 by literature are discussed in terms of this framework. Leon Chua and Sung Mo Kang as an extension of the memristor [2]. The main feature which distinguished memristive systems from the broader class of dynamical non- linear systems is a zero-crossing property in which the output II. MEM-TRANSISTORS:DEFINITIONS AND SMALL SIGNAL of the system is zero whenever the input is zero. Such systems ANALYSIS were defined mathematically as: A voltage-controlled n-th order mem-transistor is defined by the systems equations: dw f (w,u,t) dt dw f (w,vg ,vd ) y g(w,u,t)u dt ig g(w,vg ,vd ) where t denotes time, u and y denote the input and output of the system, and w is an n-dimensional vector representing the state id h(w,vg ,vd ) of the system. The function f was defined as a continuous n- dimensional vector function while g was defined as a where vg and vd denote input voltages, ig and id denote output continuous scalar function. currents, and w is an n-dimensional vector representing the state of the system. The function f is defined as a continuous n- The original memristive systems paper proved several dimensional vector function while g and h are defined as generic properties related to the passivity, frequency response, continuous scalar functions. and small signal AC characteristics of devices or systems which meet the form of (1). It was also shown that existing The system expressed by (2) is a 2-port dynamical system. devices and systems such as the thermistor, discharge tubes, The case of multiport memristive systems was contemplated in and the Hodgkin-Huxley circuit model of nerve axon [1] but not analyzed. The more significant distinction between membranes may be modeled using the memristive framework. (2) and the general equations of a memristive system is the lack Despite the formal development of memristive systems it has of the zero-crossing property. This more general approach eliminates the passivity requirement found in memristive for the state W(s) and plugging the result into the equation for systems but allows for the possibility of modeling active Id(s) obtaining: devices capable of both signal amplification and memory storage. h(W0 ,Vg0 ) f (W0 ,Vg0 ) In the same manner as (2) a current-controlled mem- I (s) w v g h(W0 ,Vg0 ) transistor is defined by the systems equations: g d . (7) m V (s) f (W ,V ) v g s 0 g0 g dw w f (w,ig ,id ) dt As a result of (7) some general properties of mem-transistors can be stated: vg g(w,ig ,id ) For periodic excitation frequencies f (s=j2f) the vd h(w,ig ,id ) transconductance of a mem-transistor is generally a frequency dependent complex number and represents wherein the currents are the inputs and the voltages are the both gain and a phase shift between the input and outputs. Similarly, a hybrid voltage-current controlled mem- output signals. transistor is defined as: At high excitation frequencies (f∞) the first term of (7) reduces to zero and the transconductance reduces dw f (w,v ,i ) to that of an ordinary transistor. This is analogous to dt g g the limiting resistive characteristic of memristive systems at high frequency, i.e. property 6 of [1]. vd g(w,vg ,ig ) Stability of the mem-transistor requires id h(w,vg ,ig ). f (W0 ,Vg0 ) The small signal AC characteristics of mem-transistors can 0 be determined by the linearization method in a similar manner w to that discussed in Property 7 of [1]. One may take as a representative example a 1st order voltage-controlled mem- since otherwise the inverse Laplace transform of the transistor as in (2) in which vd is a fixed DC voltage. impulse response would produce a growing Linearization about state W0 and voltage Vg0 produces: exponential. f (W ,V ) f (W ,V ) dw 0 g 0 0 g0 III. MEM-TRANSISTOR EXAMPLES w vg dt w vg A. Widrow-Hoff Memistor g(W0 ,Vg0 ) g(W0 ,Vg0 ) In 1960 Bernard Widrow of Stanford University was (ig ) w vg working on developing adaptive circuitry having the capability w vg to simulate neurons [6]. His graduate student Marcian Hoff h(W ,V ) h(W ,V ) suggested using electroplating cells as a means of developing (i ) 0 g0 w 0 g0 v . an electrically controlled variable resistance device. The term d w v g “memistor” (i.e memory resistor) was used in describing the 3- g terminal cell. As described by Widrow in [6]: Applying the Laplace Transform to (5) one obtains: An ideal memistor would have the following electrical characteristics: the conductance would vary linearly with total f (W ,V ) f (W ,V ) plating charge. Achieving this characteristic requires that the sW (s) 0 g 0 W (s) 0 g0 V (s) plating process be reversible, that the memistor resistance stay g put indefinitely when plating current is zero, that the w vg conductance vary smoothly with plating current, and that there g(W ,V ) g(W ,V ) be no hysteresis associate with change in direction of plating. I (s) 0 g0 W (s) 0 g0 V (s) g g Widrow was able to achieve very near to this ideal w vg memistor using a pencil lead in a copper sulfate-sulfuric acid h(W0 ,Vg0 ) h(W0 ,Vg0 ) plating bath having brightener additives to eliminate unwanted I d (s) W (s) Vg (s) hysteresis. Based upon Fig. 6b of [6] a model for Widrow’s w vg memistor may be formed in the linear region of the st conductance vs. charge curve. In this region the conductance of The transconductance gm of the 1 order voltage-controlled the memistor may be approximated as the ratio of the current mem-transistor can be determined by solving the first equation flowing through the memistor id and the voltage across the It is straightforward (although cumbersome) to calculate memistor vd so that: the transconductance of this mem-transistor using (7). Applying the small-signal stability criteria (8) to the dynamic equation of (12) linearized around w and V produces an i 0 gc0 d (104 mhos / C)q inequality in which the state variable terms can be isolated on g one side so that: vd 2 wherein q is the plating charge. Equivalently to (9) mem- 1 V V g w w w (1 ) 2 transistor equations may be written in terms of the plating corner max 0 e Vgc0 VdcV (13) 1 2 current ig with the plating charge equated to the state variable w w QT w. corner 0 As described in [10] is linearly related to the thermal voltage dw i and thus increases with temperature. Rearranging (13) to dt g consolidate all constant terms into a single term K and emphasizing the dependence of on temperature produces: id vd 4 (10 mhos / C)w 1 (T ) 1 (T ) 2 w0 wcorner w0 K(1(T)) A similar linearization procedure as in Section II may be performed for a memistor having a fixed dc current id=IDC At low temperatures when (T)<1 the above equation biased around a plating charge Qg0 and plating current Ig0. In indicates that the state variable w (i.e. the source current) this case the small signal transimpedance may be calculated as: needs to be larger than a critical value for stability of the transistor. However, at high temperatures when (T)>1 the V (s) I source current needs to be smaller than a critical value to d DC .
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