desigMarchn 2014 | Volume 4, Issue 3 www.electronicspecifier.com Could GFETs drive RF integration?

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09:10 design Contents 06 News All the news from this year’s Embedded World 14 Markets & Trends 12 Smart Energy Systems The last piece of the puzzle 14 Could a new process for CMOS RF power match GaAs? Could GFETs drive RF integration? 18 The latest research around Graphene FETs Building better memories 20 Developments in Charge Trap engineering could challenge Flash 22 Ultra-Thin is the New Bulk 21 Smaller, faster, cheaper devices promised by a new SOI process Taking back the power 22 PMICs target the ultra-portable Raging trench warfare 26 While breakthroughs may be slowing, development continues Monitoring your health 29 Structural health monitoring on a big scale 29 Let there be better LED light 34 Thermal issues are key to LED efficiency It’s all in the timing 38 Manufacturers continue to deliver the tools needed by designers Try before you buy 42 Taking a look at the development kits launched at Embedded World The 3 flavours of Bluetooth 44 Making it simpler to get connected 44

Editor: Ad sales: Head Office: Copyright 2013 Electronic Specifier. Contents of Electronic Specifier, its publication, websites and Philip Ling Ben Price ElectronicSpecifier Ltd newsletters are the property of the publisher. The [email protected] [email protected] Comice Place, Woodfalls Farm publisher and the sponsors of this magazine are not responsible for the results of any actions or Gravelly Ways, Laddingford omissions taken on the basis of information inthis Designer: Publishing Director Kent. ME18 6DA publication. In particular, no liability can be ac - cepted in result ofany claim based on or in rela - Stuart Pritchard Steve Regnier Tel: 01622 871944 tion to material provided for inclusion. Electronic [email protected] [email protected] www.electronicspecifier.com Specifier is a controlled circulation journal.

electronicspecifier.com 3 Editor’s Comment design Software Simplification Could interpreted languages provide expanding the -A range, this looks set to continue. the solution to a problem looming on Freescale is already talking about developing ‘bigLittle’ multicore devices targeting the embedded space. Of the IoT roadmap? course, all of this extra processing could just be used to run the ‘same old’ Linux/C software platforms, but it seems as if something more innovative is emerging. While a general buzz around the Internet of Things pervaded this year’s Embedded World Conference & Interpreted languages, such as Java, Python and Lua, Exhibition, there was an underlying indication that offer a level of portability not really seen compiled software may no longer reign as the most complex part of languages, and as such they are massively popular for embedded design. It almost felt like the industry as a developing applications running in the (admittedly, whole had decided that enough was enough; if software resource-rich) desktop domain. This hasn’t gone is that much of a problem, let’s do all we can to remove it unnoticed and as complexity continues to apply pressure from the equation. Whether that approach will really on embedded development, it seems leading deliver remains to be seen, but there were definite semiconductor vendors have (either collaboratively or indications that it stands a chance. If the IoT really is going independently) identified a need to port the benefits of to emerge as the biggest thing that’s ever happened to interpreted languages more concertedly to the the semiconductor industry, it relies heavily on embedded domain. Running interpreted languages encouraging more developers to develop ‘things’, which would need more processing resources, but today that’s in turn is largely dependent on making it easier to write almost a gimme. Using scripts to power the embedded applications. (IoT) world would significantly increase the number of potential developers, as well as lower the barriers to entry Raising the level of software abstraction is a subject that for people new to programming. has been debated for many years, yet for most of those years is has been generally acknowledged that C remains As usual, there’s no clear or obvious leader; Java the dominant language for embedded developers. The probably has a head start but others (such as subsequent ascendence of Linux and its embedded MicroPython, eLua) are hot on its heels and there’s a variants as the operating system most suited to new growing community of developers pushing for more. designs has probably only enforced that position; the proliferation of 32-bit Application Processors also Although it may sound like the solution, ARM has supports it. identified that interpreted languages can also suffer from portability issues (you need to be able to interpret the Just as the Cortex-M class cores have now successfully script, for one), which means IoT nodes may need to penetrated the embedded domain, the same is support multiple interpreted languages, but that’s not happening with application processors based on the necessarily as difficult as it would have been before Cortex-A cores. With more resources going in to everything had access to ‘over the air’ updates. t

4 electronicspecifier.com Rugged, Reliable MOSFETs for Industrial Applications

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News design Embedded World 2014 Promises Brighter Horizons

This year’s Embedded World Exhibition & Conference had a definite feeling of success; many manufacturers showed signs of higher than expected profitabil - ity for 2013 which, on the whole, was expected to continue though 2014. It may be too early to attribute this up-turn to the Internet of Things, as we’re yet to see the volumes predicted, but the foundations are certainly being put in place, as many of the announcements made during the event indicated.

RTOS for IoT VxWorks 6 being available as little indication that self-powered Software development is now being ‘applications’, which will also create a nodes will be the norm yet, so seen as a major opportunity for many marketplace for additional battery-power will prevail for the time manufacturers focusing on the IoT. applications. Any overhead incurred being, making low power operation Dinyar Dastoor is the Vice President through adopting the packaging just as crucial. of Product Management, overseeing concept is expected to be mitigated all operating system platforms within through the ability to leave out large Targeting this kind of application, ST Wind River. As an introduction to the parts of the OS that aren’t needed for announced the latest addition to the announcement of VxWorks 7, he a given product. As such it could STM32 family, the L0x, which explained that the core attributes for become the RTOS of choice for features the ARM Cortex-M0+ core. any OS targeting the IoT would be resource-limited IoT nodes, as long at A major feature of this family is its security, safety and scalability, adding they employ one of the supported ability to run at full speed across all that the latest version of the the 32bit processors. supply voltages down to 1.71V and RTOS will focus on delivering these. at 125°C, while consuming a Ultra-low, ultra-small maximum of 139 μA/MHz. In Standby It will introduce the concept of Another key concept for the success (no RTC running) it consumes packaging; while the kernel will be of IoT, at least in the nodes, will be 270nA, while a True RNG function ‘frozen’ for three years, the ultra-low power operation. There’s means it can support secure functionality of the OS will be configurable through application The Kinetis KL03 from packages that can be added at build. Freescale is the industry’s smallest yet. This creates the scalability, which will now extend down to the kernel, with a new ‘micro kernel’ that can be as small as 20kbyte. Dastoor explained that, while code-compatible, there will be some limitations with the micro kernel, such as running complex protocols.

The packaging concept sees all of the existing functionality available from

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transactions. The provision of 16kbyte of RAM means it can also take on the role of a sensor hub.

Another Cortex-M0+ family, this time the Kinetis from Freescale, was also being positioned for IoT applications by receiving a shrink. The KL03 is now 15% smaller than the KL02 at just 1.6mm by 2.0mm. The level of integration offered by these devices will be crucial, according to Geoff Lees, Senior Vice President and General Manager of Microcontrollers with Freescale, not least to allow Mechanical Button higher levels of software abstraction Replacement (MBR) is expected to be significant in for application development. Lees wearable technology confirmed that Freescale is now bringing its 40nm and 28nm Application-Ready Platforms; the MDO4000 series, which was the first programs online and believes that pre-integration and validation of to combine both time and frequency 28nm will be the node of choice for hardware and software, to target domain measurements in a single the IoT, at least for the foreseeable industrial and automation. However, instrument. The MDO3000 goes future. Intel acknowledged that choice is future to combine an oscilloscope vital, as there is ‘no one right way to with a spectrum analyser, logic Application-ready offer system consolidation’. analyser, protocol analyser, arbitrary With a slightly different focus, Intel function generator and digital believes the IoT is completely Consolidation of a different kind was voltmeter in a single instrument. changing the way we interact with being introduced by Tektronix, with technology and the underlying trend the official unveiling of the MDO3000 Wearables & Connectivity is consolidation. With that in mind, it series of mixed-domain Another aspect of connected nodes announced a new initiative called oscilloscopes. This builds on the is the concept of wearable technology. Freescale sees this as a growth area, stating that it will be positioning the forthcoming i.MX 7 family here. Cypress also sees this as an opportunity and used Embedded World to introduce a new family of its CapSense controllers under the MBR (mechanical button replacement) series. The latest devices, CY8CMBR3x, offer greater tolerance to water, better proximity sensing and improved self-tuning. The is the third generation of the MBR range and the company believes it could

The MDO3000 from Tektronix, see significant design-wins in launched at the Exhibition, wearable applications. integrates six instruements in one

8 electronicspecifier.com design News

The connectivity medium of choice for Favouring its IoT looks set to be wireless in general proprietary and BLE in particular. Illustrating this, RXv2 32-bit Toshiba launched a new single-chip core, the BLE solution that features an ARM7 RX64M core able to host IoT applications, MCUs from including server and client functions Renesas defined by the Generic Attribute differentiate themselves through optimised Profile (GATT). Digi-Key also sees the integration of SRAM and Flash solutions wireless connectivity as essential in memory. They are also the first of the which, supporting IoT and announced it was RX family to be fabricated on a 40nm rather augmenting its already broad line card process and are aimed squarely at than being of wireless suppliers with Nordic the IoT. driven by cost, Semiconductor, through a global appear to be aimed at simplifying distribution agreement. Singled out development and allowing a greater The market for single-board number of devices to get to market. MCUs computers is perceived to be much This appears to be a result of the As well as those already mentioned, larger than that for computer-on- anticipated ‘explosion’ in connected there was the usual clutch of new modules, according to congatec. nodes (IoT), which could otherwise MCU introductions at Embedded Despite now being number 1 in be stalled by the availability of World this year. Showing that there’s Europe and number 2 worldwide, it engineering talent. Whether that is still life in 8-bit, Microchip launched intends to expand further by the case remains to be proven, but the PIC12(L)F157X family, which developing SBCs. The company there is enough evidence to features multiple 16bit PWM admits there is much more encourage companies including FTDI interfaces, along with analogue competition in this market, but to invest in new products such as its peripherals and serial communication believes the opportunities are so great Application Oriented Controller line. in an 8-pin package. As part of the that it wouldn’t need to be in the top The first two products were revealed company’s ‘core independent two in order to be successful. at the Exhibition and include the peripherals’ strategy, the PWMs can According to the company, the first FT900 (an MCU featuring a run autonomously. Microchip is also product (which will be announced at proprietary 32-bit RISC core) and the seeing demand for 8-bit devices in this year’s Electronica) will most likely FT51 (based on an 8051 compatible safety-critical applications and is use the mini-ITX format. core). meeting that demand with the introduction of another family In a departure from its established Another aspect of application- featuring an autonomous CRC business, Sapphire Technology was oriented is mixed-signal devices module; the intention is to add the present at Embedded World to targeting specific applications, which module to all new products. discuss its newly formed Embedded was the theme from ADI’s stand Systems Business Unit and the first where it was displaying its latest At the 32-bit end of the market both product; a 4in by 4in SBC. Sapphire software-defined radio platforms. NXP and Renesas introduced new exclusively uses AMD technology and They come with the HDL code and devices. The former, the LPC1500 the SBC is based on the G-Series device drivers needed to develop an from NXP, is intended to ‘streamline’ SOC. The company says it will also SDR platform. motor control and employs the ARM explore developing SBCs in industry- Cortex-M3 core. The peripheral set standard formats. Simplified solutions makes it suitable for simultaneously Platforms like Arduino and Raspbery driving two motors, in both sensored Application Oriented Pi have become very popular with and sensorless configurations, while a Another key theme from the developers, enthusiasts and GUI is used to tune the algorithm. Exhibition this year was the need for hobbyists over recent years, but

electronicspecifier.com 9 News design

IoT is a megatrend that will last ‘for decades’, but he feels it needs to be simpler, stating: “Simplicity will be more important in the future than the chips themselves.”

Following the integration of Energy Micro’s product range, the company is now standardising on the EFM32 family going forward, which means that Precision32 will no longer be recommended for new designs. Furthermore, the company is attempting to align the EFM32 families with its legacy 8051-based MCUs under a common Eclipse- based development environment.

Leadless power While it may still be seen as an emerging technology, wireless charging is picking up momentum, however the presence of two dominant standards could be seen as ARM’s Director of IoT Platforms, variant. There are currently many a hurdle. Not by IDT, though; it Simon Ford, believes they’re now scripting languages being ported to announced a single-chip dual-mode being used in ways they were never the embedded domain, such as wireless power receiver that is designed for. He sees IoT as being Micro Python, eLua and of course compatible with both the Wireless analogous to the Internet; it is a Java, but with no clear leader it may Power Consortium (WPC) 1.1 ‘Qi’ platform to enable new industries, be necessary for platforms like standard and the Power Matter’s driven by ‘hidden’ technology. This mbed to support multiple options. Alliance (PMA) 1.1 standard. It means concept is now driving the mbed OEMs can support both with a single project, which Ford says was SoC for IoT solution, while allowing them to also originally conceived to provide a According to Silicon Lab’s CEO, meet the latest magnetic induction platform for ‘IoT’ applications Tyson Tuttle, the IoT is going to be a standards. The embedded MCU (although the term had yet to be single-chip and he thinks his allows the coil drive circuit to be tuned used when mbed was launched). company is going to be the one to for optimal power transfer efficiency. t provide it. Tuttle claims Silicon Labs While its launch may have been has been pursuing the IoT for about followed by a period of inactivity, four years, through innovation and Ford says ARM is now investing in acquisition. The most recently building an ecosystem based on acquired company and, perhaps, mbed, which will include the most significant, was Energy componentised software. More Micro. According to Geir Forre, significantly, Ford believes that Senior Vice President and General scripting languages could be critical Manager of Microcontrollers and in that success and that nodes may Wireless Products at Silicon Labs need to support more than one (and founder of Energy Micro), the

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Stefano Mantegazza, Head of Industry, Services, Energy and Retail at NTT DATA, looks into the future of smart energy and the use of new business mod - els and new technologies.

The latest International Energy Distribution is the second part of the metering, provides more insight into Outlook predicts that worldwide equation. Currently, most operators customer usage and encourages energy demand will rise by 56 per work very reactively when it comes to more accurate billing and better load cent by the year 2040. While the maintenance and repair of power balancing across the network. renewable energy sources are grids, but as demand grows and the reducing the reliance on fossil fuels, it flow of power becomes increasingly Smart metering enables energy creates a more complex and bi-directional the automation of companies to manage infrastructure unpredictable energy source network maintenance and repairs is assets with significant cost savings. landscape, meaning energy going to become critical to minimising Energy usage is automatically management systems need to service disruption to users. Tapping transmitted back to the provider, on a become intelligent. Collecting data into intelligent supply, demand and regular and frequent basis, providing about the behaviour of suppliers and grid optimisation data will allow far better insight into actual usage consumers in an automated fashion providers to look for problems before and customer behaviour. can improve the efficiency, reliability, they arise and fix them before they economics and sustainability of the become an issue. To thrive in the complex, shifting and electricity production and distribution. highly regulated environment of the This intelligent insight into the energy sector, companies need to Because storing energy on a large distribution network can also be optimise their business processes scale is not currently feasible, grid pivotal in ensuring balanced energy and IT solutions to address stability requires a balance between supplies to match ever-changing user operational, commercial and energy power consumption and creation. This demands. Traditionally, power management challenges. is especially important, as regulation demand has been dynamic while has introduced huge costs to the production has been relatively static. This requires new levels of deep energy companies related to the When an intelligent communication intelligence to be inserted to every network latency. In essence, new rules layer is added into the grid, it aspect of the production, delivery and are underway that make the producer becomes possible to transform the consumption of energy. From smarter pay when energy is not balanced. The energy distribution and dynamically plant design and maintenance, more end result is that near real-time allocate energy where it is needed. effective energy trading and dynamic monitoring of supply and demand is This is particularly useful when power distribution and load going to become crucial, as is the considering the integration of management, through to intelligent ability to model usage patterns in order consumer micro grids into the larger usage and micro-grid generation. to accurately predict demand and network. shape energy supply accordingly. This is beneficial for both consumers Business intelligence solutions can The final piece of the puzzle occurs at and energy and utility companies, ensure more efficient production from the point of consumption — whether improving the overall user experience every source; even looking for within the home or business. The through improved insight and more problems before they occur and introduction of advanced metering personalised services. This is the proactively manage potential issues. infrastructure, such as smart future of smart energy. t

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*according to T&Cs www.renesas.eu Advanced Processes design The last piece of the puzzle

Thanks to a new process, a CMOS RF power (ACLR) of -38dBc, is equal for the GaAs PA and Peregrine’s device at close to 50%. The amplifier has matched the performance of nearest competing CMOS device falls 10 GaAs devices for the first time, resulting in percentage points short. The data in Figure 1 new possibilities for reconfigurable RF front was gathered without envelope tracking (ET) or ends, reports Sally Ward-Foxton. digital predistortion, but when ET is added, the PAE for Peregrine’s PA increases up to 20 The widely-adopted compound percentage points. semiconductor Gallium Arsenide (GaAs) may be about to lose its stronghold on the RF Long time coming power amplifier (PA) business. A new RF SOI The CMOS PA owes its performance to a process from Peregrine Semiconductor has process unveiled by Peregrine last Autumn – enabled the company to produce a silicon UltraCMOS 10. An UltraCMOS 10 wafer can CMOS PA with equivalent performance to its be seen in Figure 2. This advanced process GaAs counterparts. Although CMOS PAs have has been a long time in the making. been available for some time, their performance was lacking and in the highly “Peregrine has worked for the last 25 years on competitive smartphone market it wasn’t good SOI technology platforms. We describe it as a enough to gain any market share. technology platform because we combine process developments with circuit level IP and The performance of Peregrine’s new CMOS advanced substrates,” says Duncan Pilgrim, PA, part of its Global 1 CMOS RF front end Director of Technical Marketing at Peregrine. system, is shown in Figure 1. Power-added “Until UltraCMOS 10, Peregrine used a efficiency, a standard industry metric for PA Sapphire substrate due to its near perfect RF performance when measured for a WCDMA properties. We worked with Globalfoundries signal with an adjacent channel leakage ratio and SOITEC to develop UltraCMOS 10 which

Figure 1: Comparing CMOS and GaAs PA power-added effi - ciency performance without Envelope Tracking (ET). Pere - grine is claiming equal performance for GaAs devices and the PA from its CMOS platform, Global 1.

14 electronicspecifier.com design Advanced Processes

for the first time makes use of a CMOS based SOI substrate and a 130nm process node.”

A primary challenge with a standard CMOS process is the breakdown voltage of the FETs. Most CMOS PA companies have solved this by using power combining techniques at the output in order to minimise the voltages across the FETs.

“This power combiner is lossy and causes significant degradation in efficiency,” says Pilgrim. “Peregrine approaches the problem very differently and uses stacking techniques to create a virtual HBT [Heterojunction Bipolar Transistor] device which enables a similar architecture to ones used in GaAs power amplifiers.”

The RF transistors created by UltraCMOS 10 feature a strikingly low RON*COFF, the figure Global 1. Previously, RF front ends containing of merit for RF switches. Figure 3 tracks the GaAs PAs had to use multi-chip module Figure 2: An UltraC - progress made on RON*COFF over the last 8 packaging. This high level of integration in turn MOS 10 wafer. Pere - years. According to Pilgrim, this reduction is in allows a greater degree of reconfigurability, a grine worked with large part due to the shift to the new process huge bonus when set against an evolving RF Globalfoundries and node of 130nm. landscape which is placing more and more Soitec to develop this demands on the RF front end. CMOS process that All-CMOS RF can rival GaAs for RF The new PA is part of Global 1, Peregrine’s “To increase the data throughput LTE uses a power amplifiers. all-CMOS RF front end. Global 1 includes a 3- complex transmit modulation scheme [SC- path multi-mode multi-band PA, post PA FDMA], this means that higher linearity is switching, antenna switch and antenna tuner. required to optimise the transmit path,” Pilgrim Because all these blocks are now CMOS, explains. “There are no global frequency bands they can be integrated at die level onto the for LTE so there has been a massive same chip. proliferation of frequency bands in order to support a global footprint. In addition, the The implications of this technology increase in data rates means that even at the development are pretty compelling. To start regional level more spectrum is required to with, eliminating GaAs means the well- support this growth. In many cases the established CMOS supply chain can be used spectrum that is being rolled out has resulted to deliver higher volumes at lower cost, with in more complex interference scenarios, which guaranteed repeatability. There is also a is being further compounded by the roll out of roadmap to more advanced process nodes carrier aggregation.” and increased wafer sizes. To keep up with demands for more data, there Because all the blocks of the CMOS RF front are now more than 40 frequency bands end are now CMOS, higher levels of worldwide for LTE, and more than a 5000-fold integration are possible, as demonstrated by increase in the possible number of operating

electronicspecifier.com 15 Advanced Processes design

states is forecast for the next few years (the an example, the Apple iPhone 5S launched product of the number of frequency bands, with 5 handsets for the different regions with modulation schemes, power amplifier modes, differing RF front ends (and which were antenna tuning states and downlink carrier otherwise identical). If the RF front end could aggregation). This means that RF front ends have been common to these models, there are having to become much more complex to would be potential cost savings in keep up. A reconfigurable RF front end would engineering, validation, manufacturing and certainly help keep things simple. supplier and inventory management. Pilgrim says that when truly global handsets arrive, “Reconfigurability removes the need for a they will be configured in the factory, based soldering iron and bag of capacitors!” Pilgrim on the specific bands supported, and also says. “Instead of manually retuning the power reconfigured in the field based on the mode amplifiers for the supported frequency bands of operation (i.e., WCDMA or LRE, downlink Global 1 can be electrically reconfigured, this carrier aggregation, etc.). means that it is fast and simple to change the supported frequency bands and to optimise A reconfigurable RF front end is the final the interface between the duplexer and the piece of the puzzle — basebands and power amplifier, which can take out any transceivers have effectively been software variances due to trace length and loss.” defined for a number of years. The synergies created by having entirely reconfigurable “This just scratches the surface of what hardware are now open to OEMs, and that reconfigurability can enable,” he adds. In should result in cost savings for fact, there is a huge benefit to smartphone development and deployment of new makers in the ability to reduce inventory. As smartphone products. t

Figure 3: The re - duction in RON*COFF over the years has been steady, but the shift to a smaller process node has placed UltraCMOS 10 ahead of the curve.

16 electronicspecifier.com 

 
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 '$&+&!+)(/!*+(&.! (-% Advanced Processes design Could Graphene FETs drive greater RF integration?

There is growing anticipation that graphene demonstrations made, the conventional will soon emerge as a replacement for sili - process flow of first constructing the active device and then applying a series of back-end- con, fuelled by its outstanding promise. of-line (BEOL) processes to complete the IC Now, a lack of progress towards monolithic have been shown to cause deterioration in the integration may have turned an important GFET, due to the delicacy of the graphene. corner thanks to the latest R&D break - Recently, however, researchers at IBM throughs, as Philip Ling reports. presented results of a multi-stage graphene RF IC fabricated in a standard silicon fab. In Graphene FETs (GFETs) have been shown to order to overcome the problem of device deliver intrinsic benefits in RF applications, degradations, the researchers decided to such as unity current gain frequencies higher completely reverse the fabrication flow; by than 400GHz and (theoretical) operating building all the passive components together frequencies exceeding 500GHz. But despite a with device gates on an 8in silicon wafer significant amount of effort having been before the graphene films are applied. applied to developing and improving many Furthermore, the team says the same process aspects of GFETs, such as the graphene can be applied to any channel materials that materials, gate dielectrics and device can be transferred, such as carbon nanotubes architectures, their use in RF applications or other two-dimensional nano materials. hasn’t followed. Standard flow, backwards Most of the results available today relate to The process can be implemented using a discrete transistors and externally connected standard silicon BEOL flow; four metal layers passive components, and while these were required for the demonstration chip examples show promise if the technology is to which illustrates how the passive-first, active- be fully commercialised a truly monolithic last flow first sees inductors and the bottom solution is required. Of the few monolithic plate of capacitors being formed on metal

Figure 1: The circuit designed was a three-stage RF front-end.

18 electronicspecifier.com design Advanced Processes

layer 1, followed by metal layer 2 becoming both the top plate of the capacitors and the bottom part of the T-shaped gate. Metal layer 3 forms the top of the gate, which is then followed by the dielectric formed using atomic layer deposition. Chemical vapour deposition was then used for the graphene transfer. Resistors and drain/source contacts were formed using metal layer 4.

The researchers reported that the T-shaped gate structure and multiple-finger design delivered very low gate resistance while maintaining short channel length, leading to notably improved maximum operating When tested as a receiver the circuit out- frequency. performed previously demonstrated Figure 2: The ASCII circuits; with 50 times higher conversion code for ‘IBM’ was The IC constructed comprises eleven gain with 200 times smaller LO power. A successfully received components, as shown in Figure 1. The circuit low power LO prevents it from impacting and demodulated designed is an RF front-end with three stages; the IF output. Furthermore the three- each stage is connected to the next through stage IC consumed less than 20mW, capacitive coupling, allowing the gate bias which is 600% less than a single-stage voltage of each stage to be individually graphene IC previously referenced. adjusted. The first two stages are band-pass amplifiers to provide both amplification and To demonstrate the functionality, an RF filtering. The third stage performs mixing with carrier of 4.3GHz was amplitude a local oscillator (LO) signal, to down-convert modulated with a 16-bit stream and the GHz RF signal to an intermediate applied to the receiver, to mimic the frequency in the MHz range. typical digital data transmitted using a wireless carrier. The results indicate a A key feature of this process flow is fabricating high quality receiver function had been the GFET at the last step, as it prevents it from achieved, by allowing the original binary being damaged in the harsh BEOL processes, code to be recovered by rectification and such as chemical mechanical polishing and low-pass filtering. Figure 2 shows how Cu electroplating. This could be seen in the the ASCII code for IBM was successfully transfer characteristics and peak received and demodulated. transconductance. In addition, low output conductance shows clear drain current The team believes that the IC saturation, which delivers high intrinsic gain. demonstrated multifunctional RF circuits are feasible using the grapheme-last flow Performance using a silicon fab, leading to Before testing the IC as an RF receiver it was used heterogenous 3D system integration with to drive a 50Ohm load, where it demonstrated a a silicon CMOS backbone. This could power gain of +4dB; the first graphene IC able to result in high performance graphene RF perform amplification when loaded with 50Ohm circuits being built directly on top of impedance. Also, stability was shown to be high-density CMOS logic, to create excellent, with less than +/-1dB variation over a extremely low-cost, ultra-compact testing period of more than 20 hours. communication systems. t

electronicspecifier.com 19 Advanced Processes design Building Better Memories

Perhaps best known for its integrated de - temperatures, and the higher programming vices, Cypress Semiconductor also offers voltage required. Through thin-film deposition, Cypress has been successful in reducing the foundry services. And the customer-base for programming voltage but, perhaps more its Minnesota wafer fab is expanding, as significantly, it says it has also solved the data Philip Ling reports. retention problem by using charge trap engineering to give 10 year retention at 85°C. The confidence Cypress shows in its foundry service is evidenced by the recent The benefits of floating gate are being eroded by announcement that L-3 Cincinnati Electronics the demand for smaller nodes, according to had selected Cypress — or more specifically its Cypress. The premise is, the tunnel oxide SONOS process — to manufacture a readout IC thickness will not scale below 55nm without for thermal imaging applications. The process impacting retention. This means that, in turn, the selected by L-3 CE was Cypress’ S8 mixed- program/erase voltage will have to remain higher signal 130nm Silicon-Oxide-Nitride-Oxide-Silicon than the supply voltage in order to be compatible (SONOS) technology, which Cypress uses for its with a thicker gate oxide. Furthermore, the need PSoC devices. The process has, in the past, for a thicker gate oxide will introduce additional been targeted at Flash memory, thanks to its process steps and IP incompatibilities. specific qualities, but Cypress has been developing the process for many years and now This would contribute even more process steps; uses it extensively to create mixed-signal Flash memory already needs up to 12 additional solutions. In particular, it was the defect control masks. The deposition of multiple poly layers strategy that attracted L-3 CE, who will be using could also increase defect density, according to the process to manufacture large-format thermal Cypress, while any defect in the tunnel oxide Figure 1: The imaging sensors for the US defence markets. (which is a conducting poly oxide) can create a SONOS process leakage path and thereby result in weak bits. uses an insulating Charge Trap Engineering layer to trap charge The SONOS process has been used in non- Conversely, SONOS uses an insulting layer, such carriers. volatile memory for several decades but as silicon nitride with traps, as the charge storage struggled to compete against floating gate layer. The traps in the nitride capture the carriers technology due to poor data retention at high injected from the channel and retain the charge, as such Cypress says it is less sensitive to tunnel oxide defects. Furthermore, the process requires lower program/erase voltages thanks to the thin tunnel oxide layer in the ONO stack.

The SONOS FET is shown in Figure 1, a MOS transistor with ONO stack as the gate dielectric. Cypress claims that, because the SONOS transistor shares many key process steps with CMOS transistors, the process architecture is significantly simpler than floating gate. t

20 electronicspecifier.com design Advanced Processes Ultra-Thin is the New Bulk

Fortunately, the timescales involved in developing The quest for smaller, faster, cheaper drives a process technology aren’t entirely governed by the semiconductor industry; an ever-present the lifecycle of commercial goods, even if that’s where it will inevitably be deployed. Silicon-on- burden on developers working on the next Insulator technology is a point in case; it has great process breakthrough. By Philip Ling been in development for many years but is probably still viewed as niche rather than a mainstream process. However, that may change in the near future, with the demonstration of an ultra-wide voltage range (UWVR) DSP based on a 28nm ultra-thin body buried-oxide (UTBB) fully depleted SOI (FD-SOI) technology from STMicroelectronics.

The results of the demonstration were presented recently at the International Solid State Circuits Conference (ISSCC) in San Francisco, the preeminent event for sharing research in the semiconductor industry. “UTBB FD-SOI technology is ST’s faster, cooler and simpler solution,” said Phillippe Magarshack, Executive FD-SOI can operate up to 30% faster than the Vice President, Design Enablement Services at maximum frequency of an equivalent transistor ST. “It delivers significant improvements in manufactured using bulk CMOS. This is enabled, Figure 1: Leakage to performance and power savings, while minimising in part, by a shorter channel length, but because the substrate is pre - adjustments to existing deign and manufacturing the ultra-thin insulation layer prevents any leakage vented by the ultra- methodologies.” He went on to say: “This to the substrate it allows much more effective thin insulation layer. demonstration DSP shows that FD-SOI is blazing body biasing, providing greater control over the the trail for better portable and battery-powered channel and two independent gates (Figure 1). products, using more efficient semiconductor chips, all the way down to the 10nm node.” ST also claims that FD-SOI transistors can run extremely fast at low voltages, as shown by the Planar Process demonstration device presented at ISSCC which is ST introduced FD-SOI in 2012, describing it as a able to operate at 10x ‘state of the art’ frequencies planar technology that could simplify the at just 0.4V. While a lower supply voltage can lead to manufacturing process thanks to two primary greater energy efficiency, unwanted leakage innovations; a ultra-thin insulation layer, and an currents are also contained by the buried oxide ultra-thin channel. As the channel contains no layer, which confines the electrons flowing from dopants it is described as being ‘fully depleted’ source to drain, supporting ST’s claims of it being and it is the combination of these two ‘cooler’ than bulk silicon technology. With the 28nm breakthroughs that ST terms UTBB, or ultra-thin planar UTBB FD-SOI process now in production, a body and buried oxide. The company’s results 14nm node is already in development, with a shows that the a transistor manufactured in the proven scaleability down to 10nm. t

electronicspecifier.com 21 Power Semiconductors design Taking Back The Power

Increasingly, PMICs are being used to ease cite poor battery life as the single most the burden while streamlining power design annoying feature of their mobile equipment. Modern 4G phones use more battery power in moble devices, such as smart phones and for decoding high data rate transmissions. ultraportable PCs. By Dave Blissett, Ismosys Additionally, consumers now use their phone to talk, text, email and video conference; not Mobile computing of all kinds is booming. The forgetting music streaming and GPS location public has a seemingly insatiable demand for finding functionality. All of these features make a myriad of different smart phones, the need for effective power management ultraportable computers and tablets. The ever more pressing. demand for even more functionality squeezed in to smaller and thinner devices has brought Traditional power management has typically about a ‘squeeze’ of a different kind. Power meant on-chip control, integrated with the management has become a key factor as host processor. As power needs have users consume and create more content on become more complex this approach is no the move for longer periods between battery longer feasible in sophisticated designs. The charges. inclusion of multicore processors and all of the subsystems of a modern phone or tablet, In 2014 1.9 billion handsets are forecast to be such as Wi-Fi, Bluetooth, high resolution shipped, meanwhile shipments of ‘ultra- screens and megapixel cameras, requires a mobiles’ (tablets of all sizes) will for the first new generation of dedicated power time outnumber those of PCs rising to break management ICs (PMICs) which can supply the 300 million mark. and control multiple outputs as well as the voltage scaling and sequencing demanded by Effective power management is vital for the multicore mobile designs. success of any mobile product. Consumer’s A PMIC can in some cases generate up to 30 different power lines within one phone or tablet to feed the different communications, multimedia and processing blocks on a modern battery powered mobile device. By using a dedicated PMIC, designers can gain greater efficiency than with an on-chip system, by using many individual low voltage supplies.

One significant advantage when using PMICs is that they allow designers to use a ‘platform’ approach to designs, allowing easy customisation and late changes to a design. Needless to say, the market is highly competitive for any designer working in the

22 electronicspecifier.com design Power Semicondcutors

field of mobile products. OEMs are under core while delegating complex tasks to more pressure to release new models typically powerful processing cores. every 6 to 9 months, and consumers demand new features as manufacturers aim to keep Sequencing up with the competition. Each of these application processors need to be individually sequenced correctly. Using a Increasingly modern smartphones and PMIC can greatly simplify this task by Tablets use multicore processors. This controlling blocks within a system; individually approach allows for a significant power powering them up and down into sleep mode advantage by pairing a simple processing and correctly sequencing their operation. core alongside a more complex core allowing the device to use processing resources A good example of a flagship PMIC with efficiently. multicore support is Dialog Semiconductor’s DA9063. This leading edge device is aimed For example, when playing a graphically squarely at dual and quad core processor sophisticated game the GPU and the display designs. will draw most power; the CPU will be able to reduce power and speed giving the best The DA9063 features six buck regulators overall result. operating at 3MHz and is able to deliver up to a total of 12A from its six DC to DC Despite this complexity there is a significant converters. The device can simultaneously advantage to using multicore devices, power the processor (the core at up to 5A allowing simple tasks access to their own plus other processor supplies) and external Power Semiconductors design

precise current/voltage charging as well as pre-charge and USB modes without processor interaction. During charging, die temperature is thermally regulated which enables higher capacity batteries to be rapidly charged at currents up to 1.8A with minimum thermal impact when space is at a premium on densely packed PCBs.

The DA9063 supports USB suspend mode operation and for robustness USB power inputs are internally protected against overvoltage conditions. The device’s autonomous power path controller seamlessly detects and manages energy flow between an ADC adapter, USB cable and battery whilst maintaining USB power specification compliance. The internally The DA9063 can memories, together with wireless generated system power rail supports power manage energy flow communications, GPS and other peripheral scenarios such as instant-on with a fully from multiple inputs blocks. discharged battery. A reverse protected backup battery charger is also integrated into The DC/DC converters can be paralleled to the power path function. provide 3A and 5A rails, meaning the PMIC is scalable and can be adapted for different Controlled by a programmable digital power requirements in smart phones, tablets and manager all of the DA9063’s 14 user other embedded applications. programmable switched/linear regulators may be configured for a variety of start up Also included are 11 LDO’s, 16 GPIO’s and sequences, levels and timings. For optimal two rail switches. Any start-up sequence, processor energy per task performance, output voltage and DVC ramps can be dynamic voltage scaling is permissible on up programmed allowing designers to minimise to 5 supply domains. energy consumption. The buck converter’s 3MHz switching frequency enables inductors The DA9063 is designed for, and ideally to be just 1mm high while maintaining the suited for powering the latest generation of high Peak current. portable media and wireless computing applications; packaged in a 169 ball VFBGA The device features a switched mode DC 7x7mm package or in a VFBGA 11 x 11 the input and USB compatible charger, full power device is rated in both consumer and path management as well as multiple sleep automotive grades. modes. Using the DA9063 designs can be created with exceptional energy efficiency Putting it in to practice based around many different processors from A good example of a PMIC in action is the vendors such as Freescale, Marvell, Renesas power management reference board for and Samsung. Freescale i.MX6 series dual/quad processors. Developed with Freescale ecosystem partner The DA9063 interfaces directly to a Li- NovTech, the NOVPEK i.MX6 platform ion/polymer battery pack and supports evaluation kit allows OEM’s to rapidly bring

24 electronicspecifier.com design Power Semiconductors

designs to market based on the i.MX6 series thought and focus on power supply design. processors. Third-generation PMIC devices are currently The quad buck subsystem powers the i.MX6 in development. New features that will be series system-on-chip and peripherals added include greater integration of low including external memories, WLAN, power audio routing and amplification and Bluetooth, GPS, FM receivers and modems OTP devices that can be programmed by the on a 200mm² size PCB. customer, allowing a simple but optimum solution yet providing the flexibility to The use of a configurable PMIC in this case incorporate late changes in the power tree. has delivered multiple settings for each peripheral voltage rail, programmable control Also, expect to see the inclusion of battery for multiple power-on events and an accurate fuel gauges which calculate charge remaining power consumption analysis framework to cut in a battery and maybe estimate how long the power consumption of the whole design. that battery can continue to provide power under specific operating conditions. As Demand for mobile computing products is designs become thinner, batteries are rising inexorably. Mobile phones have evolved becoming smaller yet need increased from ‘wireless telephones’ to complete mobile capacity. The addition of an accurate battery computing solutions in just a few years. fuel gauge will become vital to make efficient Power performance has become a key issue use of battery life. As designers are under of this era. Consumers enjoy the freedom and pressure to save board space and develop flexibility of Wi-Fi in their domestic and work ever thinner devices that include ever more environments but this places added features, the use of PMIC devices looks pressures on battery life, requiring more assured. t

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More information at +49 711 61946-0 [email protected] or pcim-europe.com Power Semiconductors design Raging Trench Warfare

The rate of improvement in trench MOSFETs per square inch was leading edge. Even with higher voltage parts in the 200 to 250V range, may be slowing down but, as Steve Roger - densities of 50 to 100 million cells per square son found out, there are still some left pre - inch are not uncommon. pared to fight the battle. Cell density True, at the higher voltages, increasing cell

Increasing cell densities, reducing R DS(on) and density is not as important because other reducing die size continue to be the main factors are more prevalent, such as the challenges facing the designers of trench epitaxial layer structure and the substrate. MOSFETs. But many fear that the limits on what can be achieved with existing structures “As you increase the voltage, the cell density may soon be coming to an end and the becomes less important,” said David Gray, question will soon have to be faced that, given head of the power MOSFET group at Vishay the expense of investing in designing new Siliconix. “The epitaxial influence becomes structures, will it be worth it for what could be more dominant as you increase the voltage. very small benefits in performance. So, if you increase the density at higher voltages, there is very little effect on the on- Marcello Sgroi: “The There have already been some dramatic resistance.” Also, increasing the cell density idea is to have bet - improvements over the years. Take cell density, still does increase the capacitance, which can ter performance in for example, where for devices of 30V and have an overall detrimental effect on the terms of parasitic below a density of a billion cells per square device’s performance. losses” inch is not unknown. Compare that with 15 years ago when a density of eight million cells “At each voltage, there is an optimum cell density,” said Gray. “At lower voltages, though, you are still getting benefits in overall performance as you increase the density. It is certainly possible to double the current density to two billion per square inch, but you have to look at the cost versus performance benefits.”

The other aspect is switching frequency, and Gray believes there is more work in R&D departments in trying to improve switching frequency than there is trying to reduce the on- resistance.

“This is where there is a lot more IP on the design,” he said. “There are more elaborate structures now. Not many of the devices look like a traditional trench FET; they are more elaborately designed.”

26 electronicspecifier.com design Power Semiconductors

The main contributor to switching losses is parasitic capacitance, usually between the gate and the source: “All the new developments are in trench MOSFETS because the idea is to have better performance in terms of parasitic losses,” said Marcello Sgroi, Product Marketing Manager at STMicroelectronics. He said that for 30V products, all the main players were working towards an on-resistance of around 1m Ω; the range is just over that to about 3.4m Ω.

“We are working at getting below 1m Ω,” he said. “With silicon it might not be possible. We may have to change the structure. There are physical limitations.” This may, he said, lead to a complete change of technology, which was not really needed in the market today.

Nearing the limit Chris Bull, Marketing Manager at Texas Instruments, added: “We are not a million miles from the limit you can go to in reducing

RDS(on) . But how much investment do you need to get to the next big jump and is it really worth it? Will it be too expensive? There is room to improve, but we are getting to the end of the learning curve. We are still improving but synchronous buck converter,” said Bull. “The the pace will slow.” He said that there would high-side and low-side switches need very Andrew Smith: now be more emphasis on improving the different specifications. The low side needs low “Practical designs switching performance. “R DS(on) is always the resistance. For the high-side FET, you have a balance switching first thing the customer asks,” he said. “The die that is smaller with a two to three times loss and conduction next is cost. And then, depending on the higher resistance. But here you have to worry loss” customer, the switching performance. Just about switching losses. The planar FETs we choosing the lowest resistance is not always have are probably the best in the world for the the best choice for the application.” high side but not for the low side.”

At high current, conduction losses due to the At lower power, lateral transistors tend to work on-resistance are much more important than better but at higher power trench transistors switching losses, and so switching losses take are the better option. However, there is a grey a low priority. But at low current, the switching area in the middle where both can work losses become more important. And the depending on the application. higher the switching frequency, the greater the loss because it occurs on each cycle. This is “Practical designs balance switching loss and why this type of MOSFET is preferred in conduction loss and may trade off switching applications that need a lower frequency. frequency to optimise the balance point,” said Andrew Smith, Senior Product Marketing “Look at a classic 30V trench FET for a Manager at Power Integrations. “When you

electronicspecifier.com 27 Power Semiconductors design

look at the power loss of the transistor, you 400V, the super-junction technology pioneered have the trench transistor with low conduction by Infineon has produced a large reduction in loss and the lateral transistor with low on-resistance by using charge balancing. This switching loss. It depends on the application can actually be applied at all voltages, but the where which will be most beneficial.” effect is less when the voltage is lower.

However, at say 25 to 65W applications, both MOSFETs also have an intrinsic diode, called conduction and switching losses are the body diode, between the drain and source. important, so there is no clear benefit for either In a lot of DC-DC converters, that body diode technology. The switching frequency, though, conducts on every cycle and that causes does play a role in this region. For the same losses. That is why many now put a Schottky power loss, a lateral transistor can switch at diode in there but there is still a lot of work higher frequencies because the switching loss going on to improve the performance of that per cycle is lower. Higher frequencies also diode. Basically, they are trying to reduce the allow smaller transistors, so the cost is lower. forward voltage and the charge when With trench MOSFETs you need a larger conducting. transformer because they switch at lower frequencies. “If they can improve both of these, they can improve the performance of the MOSFET,” However, using techniques such as resonant said Gray. “Every time we release a new family, switching reduces losses, increasing the we spend a lot of time trying to optimise the applications for trench MOSFETS: “If you use performance of the body diode.” these kinds of techniques,” said Smith, “you can move the trench MOSFET up to the higher Another factor in the design of these products frequencies.” is the packaging, and more particularly how that is linked to the silicon. According to Sgroi, Techniques such as charge balancing are used just switching from wires to ribbons in some in most modern MOSFETs to reduce the types of packaging can improve the on- contribution of the epitaxial region. Above resistance by as much as 22 per cent. This can be reduced even further by using clips.

On trying to drive down cost, some manufacturers are trying to look at reducing the number of mesh levels: “Say you have ten mesh levels on device,” said Bull, “if you can reduce that to seven or eight, that takes away cost.” David Gray: “We spend a lot of time Designers of trench MOSFETs are realising that trying to optimise their quest to bring down the on-resistance the performance of could soon come to an end without large the body diode” investments in deigning new structures. However, there are other techniques that are being explored to improve the performance of these devices and it is into these that most current research is concentrating. Without a pressing market design, this situation is likely to continue. t

28 electronicspecifier.com design Sensors Monitoring your health

Structural health monitoring (SHM) has been Structural Health Monitoring is an emerging employed for many years in civil infrastructure, in field that provides information on demand various forms ranging from visual observation and assessment of structural condition to technology- about any significant change or damage oc - led approaches involving deployment of an array curring in a structure. Sensors now place an of sensors that can include accelerometers, increasingly important part in this essential inclinometers and strain measurement devices on activity. By Mike Baker, Sherborne Sensors site. These sensors can be deployed on a permanent basis or moved on and off site each time a fresh set of data is required. catastrophic failures. When implemented as part of a maintenance strategy, it can assist with the Conventional forms of inspection and monitoring effective allocation of resources, reducing both are only as good as their ability to uncover service disruptions and maintenance costs. potential issues in a timely manner. One of the major difficulties with SHM instruments, for One of the core drivers however, is the growing example, is managing the huge volumes of data requirement for refurbishment of critical transport that sensor arrays generate. Meanwhile, visual infrastructure. Many owners and operators need inspections and evaluations are insufficient for timely information to ensure continued safe and determining the structural adequacy of bridges economic operation of ageing infrastructure, while or buildings. the construction and engineering industry faces a mounting challenge to shore-up supporting civil With many civil structures throughout the world structures. Deterioration can be due to multiple in urgent need of strengthening, rehabilitation, factors, including the corrosion of steel or replacement, SHM has seen renewed focus. reinforcement and There have been major advances in consequent breakdown of communications, data transmission and concrete, or the fact that computer processing, which have enabled some structures may be SHM solutions with the ability to acquire vast sound but have become volumes of data in relatively short periods of functionally obsolete, such time and transfer it via high-speed fibre-optic or as a bridge that is no wireless connections to a central database. longer able to support Subsequent analysis and modelling of this data growing traffic volumes, can provide critical intelligence for maintenance vehicle sizes and weights. and management strategies, as well as improved design. According to the American Society of Civil Engineers Shoring-up civil structures (ASCE), one in four bridges The immediacy and sensitivity of SHM enables it in the US is either to serve a variety of applications. It can allow for structurally deficient or short-term verification of new or innovative functionally obsolete. In designs, as well as the early detection of Canada, more than 40% of problems and subsequent avoidance of operational bridges were

electronicspecifier.com 29 Sensors design

built over 30 years ago and have been impacted measurements are required. Such devices by the adverse climate and extensive use of de- include: icing salts. And in the UK, an increasing number of bridges and other structures need to be -Inclinometers, which measure horizontal and strengthened to comply with legal minimum vertical angular inclination to very high levels of requirements specified by European Community precision, and output the data in analogue or legislation. Efforts to reinforce the resilience of key digital form. In SHM applications, inclinometers infrastructure to extreme weather events are also are employed to monitor movement over time of ongoing. bridges, buildings and other large structures. In addition, customised products can offer specific The aim of SHM is many fold, including performance specifications to meet exacting monitoring the in-situ behaviour of a structure requirements. accurately and efficiently, to assess its performance under various service loads, to -Accelerometers, used to measure acceleration detect damage or deterioration, and to determine and deceleration of dynamic systems. Low ‘g’ its health or condition in a timely manner. range accelerometers are used within SHM to monitor accelerations induced into bridges and Although a single definition has yet to be other structures to check design calculations and universally agreed, SHM describes the long-term critical safety. Accelerometers can also confluence of structural monitoring and damage be used in the development phase of projects to detection, with the physical diagnostic tool being ensure design calculations correlate with actual the integration of various sensing devices and measurements in the application. ancillary systems. The latter can include data acquisition and processing, communications and -Load cells; transducers used to convert a force networking, and damage detection and modelling into an electrical signal and offer measurement of software powered by sophisticated algorithms. tension, compression and shear forces. Load cells are available in many physical shapes and Field-proven technologies lie at the heart of SHM forms to suit particular applications and types of innovation. For the past few decades, closed loading. The majority of today’s designs employ loop sensors have proven to be highly robust, precision strain gauges as the primary sensing reliable, repeatable and accurate in a variety of element, whether foil or semiconductor, and applications where extremely precise feature low deflection and high frequency response characteristics. SHM applications for load cells include bridge lifting/weighing, vehicle/crane load monitoring, and earthquake force monitoring.

Bridging old and new Improvements in electronics packaging and assembly methods have allowed the sensing devices employed in SHM solutions to become smaller, more cost effective, and so sensitive that there is no longer a need to excite a structure in order to gain vital

30 electronicspecifier.com

Sensors design

information about its integrity. By placing the right A sensors-based SHM solution was brought in to number of sensors in the appropriate positions on monitor the bridge over a period of time and, a bridge for example, analysts now have the raw using its data collector devices and advanced data required via ambient sources such as wind analysis techniques, discovered that the crack in gust loads, foot falls, and traffic flows. the concrete was not the cause. Rather, it was the frequency of the movement of the returning Moreover, advanced algorithms have been trains coupled with that of the bridge. The developed that allow asset owners and managing solution was simply to reduce the speed of the authorities to acquire both short and long-term trains by 20km per hour when they crossed the structural integrity assessments that prove bridge un-laden, the vibration was eliminated essential in taking decisions regarding repairs and without the need for costly engineering works to upgrades, strengthening projects, financing, the bridge. insurance, and dispute resolution. Using conventional methods, a displacement A long-span suspension bridge currently under sensor would have been placed over the crack to construction in Asia employs a sensor network measure how it responded to ambient vibration that includes Sherborne Sensors’ precision servo over time. But such a device would not have told inclinometers and accelerometers. This sensor the bridge owners why the crack had come network enables the identification of structural about, or whether it had anything to do with the problems at an early stage, prolonging the life of movement in the structure. the structure, identifying areas of concern and improving public safety. In this scenario, an SHM solution takes raw vibration data from field-proven and trusted SHM’s benefits have also been clearly sensors and turns it into valuable information demonstrated at a remote steel bridge in the enabling analysts to provide a holistic diagnosis of heart of Brazil’s Amazon basin. Supporting freight a structure. This ensures asset owners and trains carrying 10% of the world’s iron ore each management authorities are fully-equipped with year, the bridge had been rolling back and forth the knowledge to establish the most appropriate whenever an ore carrying heavy-laden train was strategy for modifying a structural system to crossing. A horizontal crack had also appeared in repair current weaknesses, minimise further one of the supporting concrete girders, with train issues and thus prolong the life of the asset. drivers returning to the mines reporting increasingly violent vibrations as they crossed Wireless innovation despite their cars being empty. As more capable sensors are deployed, the opportunity exists for engineers to find even more efficient and effective ways to acquire data, analyse the vast volumes being stored, identify areas for improvement and most importantly act on the information provided. Automated SHM, for example, brings a number of benefits, such as enabling cost-effective, condition-based maintenance as opposed to conventional schedule-based approaches.

Current commercial monitoring systems suffer from various technological and economic limitations that prevent their widespread adoption. In particular, the fixed wiring used to route from

32 electronicspecifier.com design Sensors

system sensors to the centralised data hub a given structure or component thus helping to represent one of the greatest limitations, since determine range of motion, as well as any they are physically vulnerable and expensive structural weaknesses and whether maintenance from an installation and is required. This simple and cost-effective solution subsequent is extremely beneficial, especially when multiple maintenance readings must be obtained. standpoint. The introduction of Building business intelligence wireless sensor Although implementing change in the civil networks in engineering and construction industry takes time, particular is new approaches to SHM can deliver immediate attracting benefits to asset owners, financiers, and public significant authorities in reducing the risk of litigation, interest. improving public safety and the sustainability of critical civil transport infrastructure. Using the latest A wireless sensor SHM solutions, structural performance detection network consists of and monitoring can be performed continuously, ‘nodes’, which can range from a on a periodic basis, or in direct response to an few to several hundred sensors, with event that may have affected the structure. each node connected to one or several sensors. This model provides a practical solution A variety of innovative structural integrity for bridging information systems and the physical assessment solutions are being developed that world. One of the major potential benefits is that provide the vital information that analysts use to often a large number of individual wireless sensors compare the dissipation of vibrations with either can be monitored using a single display device, or the predicted behaviour of the structure given its with a wide variety of fixed base stations and design and materials, or with baseline hand-held readers that are already available. measurements captured earlier. Customised servo accelerometers for example, are central to Wireless solutions are shown to reduce the data collector devices used to capture these installation costs and sensor installation times baseline measurements and enable users to dramatically. They also increase safety levels establish whether a structure transfers loads as because they can often be configured remotely or designed. prior to installation, and exchanged easily for calibration and maintenance. Conversely, the When placed either singly or in an array on bridges more permanent a sensor installation, the more or other structures for a period, data collector costly the maintenance requirement tends to be. devices record a structure’s three-dimensional In addition, a solution that combines both movement in extreme detail. Further successful wireless data transmission and battery operation, applications include road deck frequency and together with low power consumption is mode shape determination; seismic structural preferable. monitoring; vertical, lateral and rotational acceleration measurements of decks, cables and The Wireless Tilt System (WTS) developed by bridge towers; and integration with GPS systems Sherborne Sensors, for example, is designed to to improve deflection frequency response. provide structural engineers with a complete However, determining the most appropriate sensor measurement solution able to record and log technology for the application, and also the data remotely without the cost and complexity of interpretation of the data, is where the knowledge traditional wired methods. The engineer simply fits and experience of a specialist supplier of sensor the low power inclinometers to strategic points on technology comes to the fore. t

electronicspecifier.com 33 Development Tools design Let there be better LED light

Thermal issues are the key technology bar - rier to LED adoption for general lighting ap - plications. By Dr. John Parry

As much as 95% of the electric input in traditional incandescent light sources becomes heat and is mostly dissipated by radiation. LEDs are much more efficient; 60% of the energy becomes heat and almost none of it dissipated through radiation. However, in order to keep the LEDs cool and promote quality light output, reliability and longer product life, heat must be efficiently removed by conduction and convection. The challenge for this rapidly growing industry is effective thermal management of solid-state lighting (SSL) products.

The LED lighting industry is hampered by a lack of standardisation on data relating to their thermal performance. Because LEDs emit a substantial proportion of the power they consume as light, the power emitted as light has Figure 1: The TeraLED-T3Ster thermal characterisation and to be taken into account when calculating their measurement system real thermal resistance. And because LED light emission and lifetime strongly depend on With these factors and trends in mind, Mentor temperature, proper thermal characterisation of Graphics continues to create innovative solutions individual LED components is important. for the LED supply chain, from manufacturers through subassembly to end-user SSL products Accurate data for the real thermal resistance of with the recent introduction of a larger TeraLED LEDs is critical for lighting system designers to and an LED Module for the CAD-embedded develop proper thermal management solutions CFD product, FloEFD. With these solutions, of their SSL products. Knowledge about engineers can use combined thermal and temperature dependence of the light output radiometric measurements to accurately test characteristics (such as luminous flux or colour their products for improved performance and coordinates) of LEDs is necessary for designing reliability, and these results can be quickly and luminaires that provide light intensity and light easily converted into compact models to use in distribution patterns required by lighting computational fluid dynamics (CFD) for standards. Unfortunately, because of the lack of simulating not only the thermal behaviour, but industry standards, LED vendors’ data sheets also to predict light output properties of LEDs often do not provide sufficient useful information under different operating conditions, allowing in this regard. SSL products to be designed and built using

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virtual prototyping measured and used in the thermal resistance- techniques, avoiding impedance calculations, but the temperature the need for time- dependence of other light output properties such consuming and costly as luminous flux or colour coordinates can also physical testing. be measured. This way the best suitable LED from various LEDs of different vendors can be Better selected for the design of a particular lighting measurement application. These LED testing standards are fully The market demand for implemented by the T3Ster and TeraLED bigger, brighter LEDs measurement systems. Figure 2 is an example of and light engines that an LED junction temperature transient measured dissipate more power on a cold plate—as the JESD 51-51 and JESD has necessitated the 51-52 standards recommend. development and release of a larger The measured junction temperature transient is TeraLED sphere with turned into thermal impedance if it is divided by greater heatsinking the applied heating power. In the case of LEDs, capability. The TeraLED this is the supplied electrical power (forward Figure 2: Typical tester now includes both 30-cm and 50-cm voltage x forward current) less the emitted optical LED Module inter - integrating spheres and a range of cooling power, also known as total radiant flux. The LED face illustrating the options to 50W. T3Ster measurement results can under test must be characterised optically to T3Ster-TeraLED be converted into compact thermal models account for this. If the emitted optical power is workflow in FloEFD (CTMs) suitable for CFD simulation. These not considered, the resulting thermal resistance models have now been extended through will be smaller than reality, misleading the TeraLED measurements to include temperature- designers of the cooling solution. Measurement dependent light output data. These provide SSL of the light output properties in combination with designers, for the first time, with the precise thermal tests as suggested, for example, by the models of individual LEDs needed to calculate JEDEC JESD 51-52 standard provides useful the hot lumens of their luminaire designs. information about their temperature dependence.

The first step using these systems is to measure The data processing software of the T3Ster the LEDs that are generally suitable for the system derives structure functions from the lighting application and to evaluate them by transient measurement, which are then thermal and radiometric characterisation. The converted into models that are accurate in the LED must be measured as it transitions from a case of packages that possess one-dimensional hot to a cold state of operation to be able to heat-flow path such as power LED packages. thermally characterise it using the so-called Such models can be created as ‘side products’ electrical test method. The results of such when the junction-to-case thermal resistance measurements are LED package thermal metrics (RthJC) of the package under test is identified and descriptive functions that will help design according to the latest JEDEC transient engineers understand the structure. measurement standard (JESD 51-14), based on the so-called transient dual interface method. The proper thermal design of the cooling solution can be created when the latest JEDEC LED CFD for LEDs thermal testing standards are used in this The FloEFD LED Module allows designers to use approach to identify the real thermal resistance accurate CTM and photometric models of LEDs and the real thermal impedance of the LED obtained from T3Ster and TeraLED within a general package. Not only is the radiant power purpose CFD simulation package (Figure 2). These

36 electronicspecifier.com design Development Tools

models are uniquely driven at constant forward current as opposed to estimated power consumption inputs that yield less accurate predictions. This ensures correct accounting for power that is emitted as light when calculating the heat dissipation of the LED. As a result, the temperature, power consumption and light output in the application (hot lumens) of the LED are predicted accurately by simulation (Figure 3). In addition, thermally and photometrically characterised LED models (CREE XT-E; Osram Golden Dragon; Seoul P4; and Philips Luxeon REBEL) are provided. The module also includes the ability to account for adsorption of radiation in semi- transparent solids such as a lens in front of the LED and is able to represent a PCB as a compact from junction to bottom (Rjb and Cjb) values of Figure 3: Typical model with orthotropic thermal conductivity. the LEDs as a bulk value representing a single LED Module hot lu - thermal time constant for the package, but mens prediction for The LED Module provides the so-called JEDEC represents the heat-flow path structure in details a retrofit SSL bulb 2R thermal resistor model in an extended format. appropriate for accurate transient simulation For the 2R model, the necessary information can using CFD analysis. be found easily in the datasheets. In case of LEDs, the junction-to-bottom resistor of the 2R For the proper prediction of the LED’s hot model is relevant; it is more or less equal to the lumens (luminous flux at operating junction junction-to-case thermal resistance of the temperature), an LED model in FloEFD also package. But for the junction-to-top resistance of contains simple models for the radiant flux and the 2R model, the junction-to-lens thermal luminous flux for constant drive currents of the resistance is needed. This is usually not provided LED. These models use the measured junction and it hardly can be correctly tested, and usually temperature sensitivity of these light output a sufficiently large value obtained from CFD properties. Including the temperature sensitivity simulations is provided. The way the standard 2R of these parameters is important to account for model is extended in FloEFD is that the junction- the complex, multi-domain operation of LEDs. to-bottom part of the model is re-presented an RC model, which allows transient simulations Over the last decade, as the efficiencies of LEDs because the thermal capacitance is also has increased to the point where they are a viable included in the model. However, the more replacement for incandescent bulbs and compact detailed RC model requires more data of the fluorescent lamps, the world has reached a LED, which often cannot be found in datasheets. tipping point in the usage of LED Lighting within In this case, FloEFD makes it easier with an automotive lighting, street lighting, back lighting interface to the thermal characterisation system. (for consumer electronics), and now general lighting applications. With the new measurement, Post-processing analysis, and simulation technology now available A file can be exported out of T3Ster-Master specifically for LEDs, product engineers can get thermal transient data post-processing software better results because the component properties that can be read by FloEFD with all the used in their application are based on real necessary data for the RC model in form of a measured component data, which allows them to Cauer-type ladder model. This file contains not make better judgments for the thermal aspects of just single thermal resistance and capacitance their design. t

electronicspecifier.com 37 Development Tools design It’s all in the timing

With the complexity of modern technology function to meet the needs of the architectural rising, semiconductor manufacturers are in - building blocks. In general, until those architectural components are chosen, the full list creasingly providing tools to equip digital of clock specifications cannot be determined. design engineers with the know-how they need to achieve system-level results. Once they are chosen, their power, area and airflow requirements are taken care of by the By Ian Dobson, IDT board designer. Then, placement-critical components, such as connectors, faceplate When going through the design process for high- switches and LEDs are added. This often leaves end servers or communications systems, the very little board area, power or cost budget for approach has typically been hierarchical with the the service components such as glue logic, selection of large ‘building-block’ chips such as power supplies and clocking. CPUs, framers, NPUs, FPGAs and protocol switches being made first. This is then followed In all but the simplest cases, multiple clocks are by choices regarding I/O and glue logic and then needed with different protocols, voltages and finally decisions are made regarding clocking performance specifications. While each needed devices and power supplies. function in a clock tree can be simply described and is often available as a discrete component, The expertise of the board designer is in the cost, area and power penalties of using a selecting and combining the key building-blocks separate device for each is not viable. For that to create the board architecture. However, due to reason, timing component suppliers have the availability and popularity of higher-speed and created components that integrate many multi-protocol I/O interfaces such as Optical functions into a single package. This is intended Transport Network (OTN), the clock tree design to assist in achieving an optimal board design, has suddenly increased in but creates the problem of which set of parts complexity. Dependent upon on the protocol running on the line at any given time, different clock frequencies may be needed to decode them. In many cases, the clock frequencies will be required to change dynamically to prevent data under or over-runs on the I/O interfaces. The speed and performance of the I/O interfaces require extremely tight frequency-domain performance from those clocks. Companies such as Integrated Device Technology have developed tools to help board designers with primarily digital expertise to achieve the clock results they need without having to employ specialist resources or learn the detail themselves. Clock component selection is rarely simple any more; clocking provides a service

38 electronicspecifier.com design Development Tools

contains the optimal mix of functions for your Compliant components can be readily selected particular requirements. Also, the trade-off priority through good parametric search tools on a between cost, area, power and performance can timing supplier’s web site. differ from one design to another. Historically, timing components were simple Timing component suppliers recognise that their devices with a single power rail and few large catalogues of parts represent both an programmable functions. This allowed their opportunity for an optimal solution and a source datasheets to contain a single power of potential confusion. As a result, most timing consumption or current figure and straight- component suppliers provide either a clock tree forward comparisons were easy to do. builder tool or an expedited service from their Furthermore, that power consumption number Applications Engineers to provide a set of was usually much less than the device’s package solutions tuned to the requirements of each could dissipate without airflow or a heat sink, so design. Working with a timing supplier that can thermal calculations for that specific device were offer all the needed components will relieve the not needed. digital board designer of the need to fit together several partial and often incompatible solutions. Integration and the higher power consumption needed to meet low phase-noise targets have Hitting the limits changed this into a complex and application- Time-domain jitter refers to refers to inaccuracies specific effort in terms of ascertaining power in the placement of the clock edges and can be consumption and analysing thermal issues. seen on a regular oscilloscope view of a clock. Many recent timing components offer a high Cycle-to-cycle jitter represents a very short-term degree of flexibility and the ability to power-down view; one clock edge to the next. It is important unused functions. They also allow the powering in digital logic applications, where a short clock of individual circuits at a voltage rail appropriate pulse can cause setup or hold time violations. to the application environment. Period jitter is a longer-term view and is important in data recovery applications because excessive In this situation, the solution is a device period jitter closes the ‘eye’, resulting in a higher configurator tool. Not only will such a tool allow rate of bit errors. Both these are dealt with via designers to determine the settings for the timing fairly straight-forward comparisons of the target device, but a properly constructed one will also value versus the timing component’s datasheet. provide the designer with power consumption and junction temperature estimates that are valid for that particular board and usage.

Frequency proliferation Until quite recently, a board designer working in a particular market segment only had to worry about providing five or six different frequencies which were fixed once the board powered-up. For example an Ethernet router might need to provide one of 25MHz, 125MHz or 156.25MHz for the line interfaces, depending on which pluggable optics module was installed. Today functionality designed for one market space is rapidly being crossed-over to others. That Ethernet router may now need a USB 3.0 port and an SD-card slot for maintenance, requiring

electronicspecifier.com 39 Development Tools design

Figure 1: Example phase noise plot from IDT Timing Commander

40MHz and 12MHz clocks. It may also support performance applications, it is necessary to an Optical Transport Network-compatible uplink compare the phase noise performance of the port, which could require several of 30-40 timing component to the input specs on the different clock frequencies that can change via device it drives. Phase noise performance is software configuration. Not only can this result in dependent on the exact configuration of the a lot more frequencies, those frequencies are no timing component and so leading configurator longer related to one another by simple integer tools will show these plots for each setup. ratios. These issues are resolved by timing components that offer increased flexibility and The clock tree in a board design is tying together multiple PLLs in a single device. However, devices from most, if not all, board sub-systems flexibility tends to add programming complexity. as well as frequency sources like crystals and These new components need to come with a oscillators. As a result there is often a need to configurator tool, such as IDT’s Timing convert signals between single-ended (CMOS) Commander, which allow a complex device to protocols and one or more differential protocols be setup more easily. (e.g. LVDS) and often to adjust voltage swings as well. This is usually done with networks of passive Frequency-domain jitter refers to unexpected, components, although active level shifters are and usually undesired, extra frequencies that sometimes used. For a designer not familiar with exist in all real-world clock signals. These the current and voltage specifications of each frequency components are especially bad when protocol, this used to require reading through a lot present on the reference clock for a high- of application notes. Configurator tools will provide performance Analog-Digital Converter (ADC) or recommendations on how to deal with these Digital-Analog Converter (DAC) since those protocol and/or voltage mismatches on either the devices will add many aliases of the unwanted input or output of a particular timing component. frequencies. Also, physical–layer devices (PHY) The same capability can generate recommended for high-speed serial interfaces often include schematics and component values for power ADCs or DACs internally, so frequency-domain supply filters and loop filters that may be required, jitter is of increasing concern there too. In high- especially on higher-performance devices.

40 electronicspecifier.com design Development Tools

Redundancy and failure defined, system-level specification must be met. scenarios Board designers will need to work with an As connectivity gains increasing importance, experienced and system- knowledgeable reliable operation of everything from mobile Applications Engineering team at the timing handsets to Terabit core routers has become component supplier to solve these problems more important than ever. Techniques pioneered today. This is not a problem that can be readily for voice telephone switches and fault-tolerant solved on a chip-by-chip basis as those who military grade systems have trickled down the have tried to mix components from different network hierarchy. Systems must be designed in suppliers can testify. a way to minimise likelihood of failure, and the impact if a failure does occur. Many systems also Designers need an increasingly in-depth level of need to meet international standards such as knowledge of digital, analog, software, thermal ITU-T G.8261 for their behaviour under failure and mechanical design topics. In the area of scenarios. For timing components this is mainly clocking, this has accelerated rapidly in the last about switchover and holdover. Switchover is the five years with the proliferation of frequencies, process of identifying that one clock source has tight time and frequency domain jitter suffered degradation in quality or total loss of requirements and a complex myriad of signal signal and switching to a backup source. protocols and voltage levels. Leading timing Holdover is the end-case of switchover and component suppliers have recognised this issue occurs when all backup clock sources are and responded with clock tree builder, parametric disqualified and there is a fall-back on a local search and configurator tools with rich yet user- crystal or XO to maintain some level of friendly capabilities. These tools provide valuable functionality. assistance to the board designer, but can’t relieve the whole burden. For any issues that remain, Creating a reliable clock tree is a system-level there needs to be a knowledgeable applications problem that must be solved at the level of the engineering team that understands the system entire clock tree, especially if an externally- implications of a clock tree. t

Figure 2: Example Termination Schematic from IDT Timing Commander

electronicspecifier.com 41 Development Tools design Try Before You Buy

Once again, Embedded World 2014 pro - device is also making inroads in the industrial controller arena. vided visitors with an excellent opportunity to get ‘hands-on’ with the latest technology, In an effort to target this class of application, much of which was supported by develop - and in association with Freescale, Farnell ment kits available to take away. Philip Ling element 14 used Embedded World to officially launch a development platform called RIoT, takes a look at some of what was on offer. which stands for ‘Revolutionising the Internet of Things’. The board features Freescale’s i.MX A picture may be worth a thousand words, but 6Solo processor, which integrates a single a development kit speaks volumes. The ability ARM Cortex-A9 (dual- and quad-core versions to get to grips with a device using a ready- of the processor are also available), along with made platform can potentially cut months off a a Kinetis K20 (ARM Cortex-M4) microcontroller. The kit is able to run Linux and Android, and as such is aimed at teams familiar with these high- end operating systems.

The use of Linux in embedded systems is now well established, what’s less established is the Yocto Project (although many manufacturers now support it), which is an effort to make a hardware-agnostic custom-made embedded Linux distribution. The fact that it claims to be able to target ‘any’ application processor is a great benefit, The Hachiko Board particularly if your fis the latest offer - development team ing withni Silica’s hasn’t decided on ArchiTech range one. Silica is a project’s timescale, particularly if that project is Participant of the using open source software. For high-end Yocto Project (as embedded devices, typically those that make is Freescale) and use of applications, then an ARM-based is applying this application processor running some flavour of concept to its Linux is now the standard; when coupled with ArchiTech design tools the right processor it can provide an ideal (announced at last year’s platform for consumer equipment such as Embedded World); a range of streaming (mobile) internet devices. This kind of development boards based on

42 electronicspecifier.com The RIoT board from Farnell Element14 design Development Tools

application the technology, XMOS has now offi - processors. apart from being multicore, cially launched the is that it replicates hardware in the software sliceKIT development Working within the Project, Silica has created domain, as such, the IDE is ‘timing aware’ and platform to support an OS that is independent while featuring a xCORE says it can be used for a range of its xCORE Analog standard format for the BSP layers. The latest industrial solutions. It is further supported by a family ArchiTech board, which was revealed at growing range of IP, such as industrial Fieldbus, Embedded World this year, is the Hachiko image processing and motor control, as well as board and is based on the RZ/A1H real-time Ethernet, USB and human-machine microcontroller from Renesas, which is also interface functions. enabled by the ARM Cortex-A9. It comes with a Yocto-compatible Linux distribution and Silica In a bid to continue the integration of Energy has ported a GUI library with demonstration Micro’s products following the acquisition, application to the board. Silicon Labs announced a new version of the Simplicity Studio development environment, A slice of life which means it now supports both the ARM- Sometimes, technology is so based EFM32 Gecko microcontrollers and radical that the only real way to 8051-based MCUs in a single tool, allowing assess it is to use it. This is developers to target both architectures for the arguably the case with the same tool. As the environment is Eclipse-based, multicore microcontroller it supports Eclipse plug-ins and used the Eclipse developed by XMOS. To Debugger for C/C++, while also supporting Keil support its range of 6, 8, and Gnu Compiler Collection (GCC) build tools. 10, 12 and 16-core MCUs, it announced the sliceKIT development board at As the use of more complex operating systems, Embedded World, as well as enabled by the continued adoption of ARM’s A- the volume production class (application) cores, push deeper in to the of its xCORE-Analog embedded world manufacturers are doing product range. everything they can to make not only manage that complexity but actually reduce it. The Yocto The board is initiative is one example of that, but there are supported by a free- likely to be many more in the form of more to-download design intuitive software development tools and an environment, called elevation in the level of abstraction, to match the xTIMEcomposer Studio. proliferation of more capable development One of the key differentiators of platforms. t

electronicspecifier.com 43 Wireless design The 3 flavours of Bluetooth

Initial impressions of being over-complicated Bluetooth Smart only apply to devices that and perhaps unreliable meant Bluetooth got actually make use of the low energy features, and only in certain use cases. off to a slow start back in the early 2000s. Now, it enables an increasing number of The current state of Smart connected devices, but which version is Since its development Bluetooth LE has been right for your application? By Karl Torvmark integrated into a wide range of devices including heart-rate monitors, watches, smart meters, peripherals and many more (some of which are The Bluetooth 4.0 specification — commonly featured at the Bluetooth SIG’s Bluetooth Smart known to as Bluetooth Low Energy (LE) or product showcase pages Bluetooth Smart — brought a new form of (www.Bluetooth.com/Pages/Bluetooth-Smart- Bluetooth technology to consumers; developed Devices.aspx). Similarly, Bluetooth Smart is to enable new types of Bluetooth devices in commonly supported in new mobile phones, areas where it hadn’t previously been widely tablets and PCs ensuring a healthy ecosystem adopted for reasons of battery life or cost. But for the technology. now, with three ‘flavours’ of Bluetooth available, it’s not always immediately obvious which is the From a consumer perspective, Bluetooth devices best option to use for a given product. incorporating Bluetooth LE technology are branded using the ‘Bluetooth Smart’ and Bluetooth LE started out as ‘Bluetooth lite’ inside ‘Bluetooth Smart Ready’ monikers. These do not of Nokia’s research labs in the mid-2000s, and necessarily correspond directly to the technical was envisioned as a way of bringing Bluetooth to categories, but rather have their own definitions simpler, less powerful devices. Initially Nokia, rooted in the consumer experience. Bluetooth together with a number of other companies, put together an industry alliance around this technology and christened it Wibree. However, a year or so later, it became clear that it made the most sense to develop this technology inside the Bluetooth Special Interest Group (SIG), and the technology was handed over to them. At this point the technology became known as Ultra- low Power Bluetooth, and would eventually be re-christened Bluetooth Low Energy (LE). This technology was included in the Bluetooth v4.0 specification when that was released in 2010.

This has led to several distinct, but inter-linked versions of Bluetooth. As such, those without an in-depth knowledge of the inner workings of the technology assume that Bluetooth Smart lowers power consumption for all types of Bluetooth usage, which is incorrect. The benefits of Figure 1: An array of examples of Bluetooth LE devices, driven by TI tech

44 electronicspecifier.com design Wireless

Smart Ready devices are generally those that and these will probably remain Bluetooth ‘classic’ support connections from a Bluetooth Smart devices for the foreseeable future. device — for instance a smartphone, tablet or laptop. Bluetooth Smart devices are Bluetooth Then there are ‘dual-mode’ devices, which can low energy-based devices that communicate communicate with both ‘classic’ and Smart with Bluetooth Smart Ready devices; for devices. These devices do not gain any benefit instance a heart-rate monitor or smartwatch. of the power consumption improvements One important thing to note is that Bluetooth enabled by Bluetooth low energy, as they still Smart devices by definition can only need to conform to the requirements of legacy communicate with Bluetooth Smart Ready Bluetooth devices, but they are an important part devices, and not with Bluetooth devices based of the overall ecosystem. These are usually the on previous versions of the technology. hub devices that a Bluetooth device will connect to, such as a computer, a tablet or a The intention is that when the consumer smartphone. purchases a Bluetooth Smart device, he or she will know that this will work with other devices The third and perhaps most interesting category bearing the Bluetooth Smart Ready logo, but not are the ‘single-mode’ devices, which support with devices only bearing the regular Bluetooth Bluetooth LE only. Although these devices can’t logo. From a technical perspective, there are communicate directly with Bluetooth ‘classic’ essentially three different types of devices: devices, they have the advantage of being highly ‘Classic’ Bluetooth, Bluetooth ‘dual-mode’ (aka optimised for Bluetooth LE. Smart Ready) and Bluetooth ‘single-mode’ (aka Smart). In essence, Bluetooth LE has been optimised for use-cases that have a relatively low duty-cycle. The first is the ‘classic’ Bluetooth device as For example, a heart rate belt may stay mentioned earlier. These are typically those connected for several hours during a long work- devices that need a maintained and often high- out, but it only needs to transmit a few bytes throughput connection. In these cases, every second, so in an optimised protocol, the Bluetooth LE does not provide much benefit, radio would be on for less than a millisecond. Compare this to a headset, car stereo or wireless speaker, where the amount of data is measured in the hundreds of kB per second and the radio might be on for a double-digit percentage of the time. The original Bluetooth specification was designed to do general-purpose wireless data transmission, and has been successfully adapted to other use-cases such as input devices and wireless audio. Bluetooth low energy was designed to address use cases that the original Bluetooth specification is less suited for, and therefore extend the overall addressable market for Bluetooth.

Markets for Bluetooth Smart Thanks to this optimisation, Bluetooth LE has seen good adoption in the sports and fitness space. It also has great promise in medical and hnology health-care, in novel new use-cases such as

electronicspecifier.com 45 Wireless design

proximity tags, beacons, computer peripherals Bluetooth LE PHY only has 37 channels and and remote user interfaces. In recent months we does discovery on three channels. have seen the rise of a new breed of ‘connected’ devices based on Bluetooth LE, including home Since Bluetooth LE has a lot fewer channels to automation and smart metering, a raft of go through when doing discovery, the process is smartwatches, proximity tags, activity monitoring much quicker, and a connection can be set up and even a toothbrush. within a few milliseconds rather than the couple of seconds required in ‘classic’ Bluetooth. Another growing application for Bluetooth Smart Similarly, the channel spacing of Bluetooth LE is is as an enabler of the so-called ‘Internet of 2MHz in contrast to BR’s 1MHz, this has the Things’. Rather than being directly connected to effect of reducing demands on RF filtering. the Internet, Bluetooth Smart devices interface to the Internet through ubiquitous Bluetooth Smart Moving up the stack we see that Bluetooth LE Ready devices such as smartphones, tablets or connections are essentially similar to BR’s so- PCs. The main benefit of this approach is that called sniff sub-rating mode. This provides the wireless devices can be simpler, lower cost Bluetooth LE with an energy-efficient way of and lower power than devices that would maintaining connections while keeping the radio interface to the Internet directly (either through off as much as possible. Not immediately GSM/3G/LTE or Wi-Fi connections). Also, no apparent from the Bluetooth specifications is the extra infrastructure is required; the users already fact that the relaxed requirements allow IC have the equipment needed to interface vendors to do a lot of optimisations that are Bluetooth Smart devices to the Internet. difficult or impossible to make with ‘classic’ Bluetooth, lowering sleep and active currents In order to achieve this level of optimisation, and shortening switching times. These Bluetooth LE differs from ‘classic’ Bluetooth right optimisations enable single-mode chips to be Figure 2: The rela - down to the physical layers. The Bluetooth LE lower power, simpler and lower cost than dual- tionship between PHY is a slimmed-down and optimised version mode or classic chips. Bluetooth Smart of the Bluetooth Basic Rate (BR) PHY. While the and Bluetooth BR PHY hops over 79 channels (although this There are also differences at the profile layer. Smart Ready de - can be reduced down to a minimum of 20 Bluetooth low energy profiles so far are all vices (Source: Blue - channels through adaptive frequency hopping) layered over GATT, using the GATT/ATT protocol tooth SIG) and performs discovery on 32 channels, the to exchange data. In ‘classic’ Bluetooth, profiles often define their own protocols. This is more flexible, but renders the implementation more complex and increases the amount of code that needs to run, increasing complexity. With all this in mind, the question can be raised about what version is best suited for a given product.

When it comes to choosing between dual-mode and single-mode ICs or system-on-chips (SoCs), it depends on what application you are targeting. If you need to communicate with ‘classic’ devices, then the choice is simple; you need to use a dual-mode device. If you have flexibility on both sides of the link, then the most important criteria are determined by what and how much data you are moving over the wireless link. If you

46 electronicspecifier.com design Wireless

Figure 3: Compari - son of Bluetooth low energy (left) and Bluetooth ‘classic’ (right) architecture

are moving a lot of data or streaming media, then communicate with iOS-based devices, then you should go with a ‘classic’ solution. Bluetooth low energy may be an easier way to achieve that. Apple currently requires any If you are only transmitting smaller amounts of ‘classic’ devices that support anything other than data then Bluetooth low energy may be a better a set of pre-defined profiles to be certified under choice. Bluetooth low energy can provide very the MFI program. For Bluetooth LE devices there long battery life when used in the types of use- are no such restrictions, and an iOS app running cases it was designed for. For example, a sensor on a reasonably modern Apple device can use a communicating with a phone once every second GATT-based API to communicate with Bluetooth 24/7 may last for more than a year on a CR2032 LE devices. Similarly, most recent Android coin cell. Power consumption (and therefore devices support Bluetooth v4.0 and Windows 8 battery life) scales with the communication period has full Bluetooth v4.0 support. used. Bluetooth LE supports communication periods of between 7.5 milliseconds and 16 A final factor to consider is the ease of seconds. The 16 second limit is related to a development and availability of development communications time-out; if longer times are tools and documentation. Some single-mode needed, it is possible to drop the connection and Bluetooth LE vendors provide royalty-free then reconnect every time as needed. software stacks with all documentation openly available from a web site. In the ‘classic’ SoC Solutions Bluetooth space, it is more common to charge For single-mode ICs, the industry is moving to ICs royalties for the protocol stack and keep that can implement all the functionality in a datasheets and other technical documentation sensor-type device except the sensing element under NDA. itself. For ‘classic’ and dual-mode, newer ICs are generally dual-mode rather than ‘classic’, so from Whether you call it Bluetooth Smart, Low Energy a hardware perspective, the choice will often be or LE, with Bluetooth v4.0, designers have made for you. That said, certain application- another tool in their toolbox; one that opens up a specific devices might continue to be BR only if range of new possibilities for connected devices the applications they target do not make use of and ease-of-use. Bluetooth LE. From a software perspective, many commonly-available Bluetooth stacks include low This choice builds on the massive success energy support at this point, although again, there of Bluetooth in the short-range wireless may be some that will not. market and enables new applications to make use of Bluetooth technology through Other factors may also play a role. For example, lower power consumption, lower complexity if you want your device to be able to and lower cost. t

electronicspecifier.com 47