Sunday, April 27, 2014 - Teradyne Users Group

4:00-6:00 p.m. Conference Check-In / Welcome Reception Monday, April 28, 2014 - Teradyne Users Group

7:30-8:30 a.m. Breakfast

8:30-9:00 a.m. Welcome

9:00-10:00 a.m. Keynote Address

10:00-10:30 a.m. Break

TEST INFRASTRUCTURE POWER MANAGEMENT 10:30 a.m.–12:00 p.m. MIXED SIGNAL RF WIRELESS DIGITAL ILO TRAINING AND PRODUCTION AND AUTOMOTIVE

IG-Link: Stop Merging and Keeping All the Cores Busy – Dynamic Error Vector Measuring Switching Need more time? Follow the Pin Margin Tool & IG-XL Start Linking - Roy Chorev & How to Multithread with IG-XL - Magnitude (DEVM) Test for RF Characteristics With or fat rabbit! A Way to Spot and V8.20.00 - Paul Picarski & Keith Mike Patnode Teradyne; Stephen Hlotyak, Teradyne (3) Power Amplifiers (PA) and Without QTMU? - Maciej Miler, Eliminate Time-Wasting Code Thomas, Teradyne (170) Michael Back, Qualcomm (1) Front-End-Modules (FEM) on Texas Instruments; Jozef in Eagle EV & MST Test the ETS-88 RF - Stephen Molnar, Teradyne (38) Programs - Ingo Wahl, 10:30-11:00 a.m. Lyons, Aik-Moh Ng & Guillermo Teradyne (96) Pidal, Teradyne; Paul Chen, Aeroflex (19)

IG-Diff - You changed what? - Implementing Concurrent Test Reducing EVM Error Through Tips for Successful Pattern High Accuracy Wafer Level Roy Chorev, Holly Wang & Ying- on a Mixed Signal Device - Traditional Device Calibration Conversion to Eagle DPU16 - RDS(on) Measurement Can Wei, Teradyne (2) Xiaorong Song, Freescale (136) and Error Correction by ESA Chiau-Woon Yeo, Teradyne Techniques - Jack Weimer, 11:00-11:30 a.m. for LTE Transceivers - Han- (12) Teradyne (31) Won Jin & Dae-Sung Kim, Teradyne (97)

IG-Data/IG-Review – What’s in Automated Eagle Wait Time TD-SCDMA Demodulation and Managing SVM to Improve Site Control Across Sectors these 200 sheets anyway? - Optimizer and Production EVM - Lawrence Luce, Test Time - Claude Hanchard, with MST - Chuck Carline, Krista Bertsch & Sherri Scharf, Release Tool - Chakra Teradyne (15) Teradyne (138) Teradyne (54) 11:30 a.m.-12:00 p.m. Teradyne (4) Jamdagneya, Texas Instruments (8)

12:00-1:00 p.m. Lunch

TEST INFRASTRUCTURE POWER MANAGEMENT 1:00–3:30 p.m. MIXED SIGNAL RF WIRELESS DIGITAL ILO TRAINING AND PRODUCTION AND AUTOMOTIVE

Test Time Analysis and Programming Sine and Using the nWire DUT Clock to System Level Test Using Advanced APU Measurement TimeLines: An IG-XL Tool for Multisite Efficiency Made Easy Cosine Waves Using the LMF Capture Highly Unstable Protocol Aware ATE - Shawn Techniques - Chuck Carline, Test Time Reduction - Paul 1:00-1:30 p.m. - Adrian Carleton, Freescale on J750 - Hock Meng Tan, Device Clocked Data - Dan Molavi, Broadcom (33) Teradyne (53) Picarski, Teradyne (58) (41) Teradyne (17) Buker, Teradyne (131)

Automating Flow Simulation - Multi-Tone Generation on What Do Higher Data Rates Protocol Memory Display - APU-12 Best Practices - Kevin Lai-Choon Chan, Teradyne Eagle Test System Arb - John Mean to Cellular and Gopi Muthu & Pavan Baade & Hugh Jackson, 1:30-2:00 p.m. (75) Lewis & Mike Robichaud, Connectivity Testing? - Ramakrishna, Teradyne (49) Teradyne (154) Teradyne (39) Steven Fields, Teradyne (169)

IG-XL Run-Time Error Continuity Probe Solution - LTE-A Test Time Reduction Case Study: A Production 96V Automotive Testing Using Processing: How Binning Is Alan Tham, Teradyne (73) with UltraWave 12G Ready Project with APU12: Trials and Determined for an Error - (Modulation / Demodulation) - Concurrent Test Flow and Tribulations - Joseph Yehle, Hansung Kim, Teradyne Jong-ik Oh, Teradyne; Youshan Texas Instruments 2:00-2:30 p.m. (108) Massive PA Calls - (42) Sung-Jong An, FCI (28) Jin & Chunlei Li, Hisilicon; Troy Zhang, Teradyne (100)

Integrating Automated Test How to Avoid Yield Loss Due Get the Most Out of Those RF Behavior of the PE Pin When Simple Method to Generate Program Generation in Your to Site-to-Site Interaction Ports You Have! - Stephen Selecting Input/Output in the Transients of >30KV/us Using Daily Workflow Saves Time - Caused by Substrate Currents Pruitt, Teradyne (166) Pinmap - Byung-Woo Han, the SPU500 - Victor Lopez de Nico Nebel, Bosch; Ralf - Jakob Goossens, ON Teradyne; SukMin Lee, HANA Nava, Texas Instruments (135) 2:30-3:00 p.m. Baumann, Teradyne (84) Semiconductor (101) Micron; SungBok Yun, Amkor (70)

3:00-3:30 p.m. Break

TEST INFRASTRUCTURE POWER MANAGEMENT 3:30–5:00 p.m. MIXED SIGNAL RF WIRELESS DIGITAL ILO TRAINING AND PRODUCTION AND AUTOMOTIVE

Associating High PTE and MATLAB 2 UltraFLEX: A LTE-A Transceiver Quad Sites Tips on Using the nWire SPU-112 SOA Pin Margin Tool & IG-XL Resources Usage on ETS-800 Design Flow for Custom DSP Test by Daughter Board on Engine to Generate Free- Characterization - Kevin V8.20.00 - Paul Picarski & for a Successful DIB Design - Algorithm Development - UltraFLEX - Running Clocks for Multisite Baade & Hugh Jackson, Keith Thomas, Teradyne (170) Claude Hanchard, Teradyne Daniel Rosenthal, Teradyne Sang-Jin Choi & Dae-Sung Kim, Vic Li, Teradyne (153) 3:30-4:00 p.m. Applications - (133) (27) Teradyne (98) Teradyne; Chihome Chung, TSMC (63)

Getting the Most Out of the Testing GainSpan’s Ultra Low- Test Optimization For Dual RX How to Use nWire PA to Test Quality Improvement for MST Environment: Tips & Power WLAN SOC with RF Transceiver - Karthik Implement All BIST Tests for Automotive Products - Davide Techniques - Steven Katz, Protocol Aware - Tony Armell, Chellappa, Tessolve (25) High Speed Devices and Appello, STMicroelectronics; Teradyne (139) Teradyne (65) Customize a Template for IP Tamas Kerekes, NplusT 4:00-4:30 p.m. Reuse - Tian Gan, Teradyne; Semiconductor (91) Huawei Zhang, Hisilicon (94)

Dynamic Test Sequence Automated Printing of Test Low Cost RF SOC Solution nWire PA Makes Digital Control in Eagle Test Systems Resource Condition in Eagle with J750Ex-HD+LitePoint - Source/Capture More Efficient Product Sheets - Richard Tester Without Using RAIDE - Tiger Feng, Teradyne; Jing Hu, for Various Protocols on Tuttle, Atmel (18) Sanoop Sukumaran, Texas Spreadtrum (24) Smartphone Baseband IC - Instruments (88) Rison Jia & Arthur Zhang, 4:30-5:00 p.m. Teradyne; Xiaogang Li, Rongwen Xu & Yanfeng Zheng, RDA Microelectronics (50)

5:45-10:00 p.m. Teradyne Hospitality Event @ Angel Stadium Tuesday, April 29, 2014 - Teradyne Users Group

7:30-8:30 a.m. Breakfast

TEST INFRASTRUCTURE POWER MANAGEMENT 8:30–10:00 a.m. MIXED SIGNAL RF WIRELESS DIGITAL ILO TRAINING AND PRODUCTION AND AUTOMOTIVE

8:30-8:45 a.m. TUG Business Meeting

8:45-10:00a.m. Semiconductor Business Meeting & Engineering Update

VENDOR FAIR 10:00-10:30 a.m. Break / Vendor Fair 10:00 a.m. - 5:00 p.m. TEST INFRASTRUCTURE POWER MANAGEMENT 10:30 a.m.–12:00 p.m. MEMORY RF WIRELESS DIGITAL ILO TRAINING AND PRODUCTION AND AUTOMOTIVE

A Study on Optimized Settling How to Implement the Capture UltraWave 24: The Future of My TF and ATPG Patterns Are Terminating Toxic Test - Jack TimeLines: An IG-XL Tool for Time & Device Interface Board Processor on the Nextest RF Test - Ron Burke, Teradyne Failing: Tips and Tricks to Weimer, Teradyne (32) Test Time Reduction - Paul Application for Measuring MPAC Option to Test a DAC - (172) Debug Them - Francois Deun, Picarski, Teradyne (58) Static Power Dissipation of the Grant Viehmann, Teradyne (23) Teradyne (26) Device with Large Capacitor Applications - Roberto (Young- 10:30–11:00 a.m. woo) Lee & Kang-Hoon Oh, Teradyne (80)

Resolving Encryption Issues How to Use the Nextest Synchronization of UltraPin800 with Teradyne's Test Program Magnum DBM as a Digital and SB6G for JTAG Test of Protection Tool - Bruce Chang, Send Instrument - Grant JESD High Speed Serial I/Os - Teradyne; Karl Liu, TSMC (64) Viehmann, Teradyne (126) Aparna Tata & Sri Lakshmi 11:00a.m.-11:30 p.m. Tummala, Analog Devices (66)

100X Faster ASCII Worksheet Testing 2304 ADCs MIPI D-PHY Loopback Relays Taking Full Advantage of ETS- Import in Excel - Glenn Carson, Concurrently Using The Can Be Replaced w/UltraFLEX 800 APEx Architecture - Brent Freescale (45) Magnum I Plus MPAC Option UltraPin1600 Passive Rousseau, Teradyne (60) Board - Bob Jamieson, Loopback Path - Hyoung-mo 11:30-12:00 p.m. Teradyne; Tor Urdalen, Atmel Choi, Teradyne; Young-cheol (51) Kim, Samsung (89)

12:00-1:00 p.m. Lunch TEST INFRASTRUCTURE POWER MANAGEMENT 1:00–3:00 p.m. MIXED SIGNAL RF WIRELESS DIGITAL ILO TRAINING AND PRODUCTION AND AUTOMOTIVE

Visual Basic Dictionaries: High-speed SerDes DAC and Testing Wideband IQ Signals UltraSerial10G, Jitter and Eye Time Measurement of Real- Pin Margin Tool & IG-XL Solve Your Software ADC Test Solution - Ryan Shi, Using UltraFLEX UltraWave Analysis Over the 10.7Gbps - World Signals - John Wilcox, V8.20.00 - Paul Picarski & Keith Interfacing Problems - Lauren Teradyne; Leo Liu, Hisilicon (82) 12G Receiver - Yu-Jen Chen & Hiroyuki Komatsuzaki, Teradyne Teradyne (147) Thomas, Teradyne (170) Guajardo, Teradyne; Christopher Chi-Chan Cheng, Broadcom; (47) 1:00-1:30 p.m. Kuzen, Flir Commercial Systems Young-Kun Ann, Teradyne (44) (124)

Mixed Signal ADC Testing with Multisite RF Probe on the J750 - Effect of Training Data Challenges of Mobile PMIC the UltraVI80 Instrument - Bruck Girma, Michael Marintzer, Variations on the CDR Lock Device Testing on ETS-800 Stephanie Draeger, Teradyne; Jason Webb & Tengxiang Time - Weng Kwong Yeo, with Direct Probe I/F - Min- 1:30-2:00 p.m. Keith Remlinger, Test Spectrum Zhang, Silicon Labs (118) Teradyne (29) Young Kim & Hyun-Su Kim, (130) Teradyne (86)

Modular Programming on the Rotating Gravity - Frequency RF Performance in Array High Speed and Multi-Lane Best Practices and Test J750 - Maite Chatskis & Peter Domain Test for MEMS - Dan Structures Based On Ground Testing Using XD Module - Techniques with UPU-64 on Tran, Teradyne (119) Thornton, Analog Devices (145) Placement - Sarosh Patel & Jeff Atsuko Hatta, & Hiroyuki ETS-800 - Bethany Van 2:00-2:30 p.m. Sherry, Johnstech International Komatsuzaki, Teradyne (46) Wagenen, Teradyne (146) (121)

Leveraging a Code Library to Testing RFIC Devices Over Speed Inter-Platform Code DigRF v4 - Moris Shakeri, Application - Stephanie Broadcom; Fady Bishay, Ron 2:30-3:00 p.m. Draeger, Teradyne; Keith Burke, Wade Shih & Shawn Remlinger, Test Spectrum (129) Sullivan, Teradyne (168)

3:00 - 5:00 pm VENDOR FAIR / ROUNDTABLES / POSTER SESSIONS

Increasing Tester Resource Adaptive ETS Resources High Speed Digital TimeLines: An IG-XL Tool for Utilization Efficiency for Application - Min-Young Kim, Programming Techniques by Test Time Reduction - Paul Continuity Test to Reduce Test Teradyne (106) Differential Measurement - Picarski, Teradyne (58) Time and System Resources - Nichle Su, Teradyne (36) Hoijik (Jimmy) Kim, FCI; Roberto Lee & Kang-Hoon Oh, Teradyne (95)

High Site Count Test Solution Using 10K Probe Tower - Daniel Park, Teradyne (13)

PCB Integrated Solution for IC Testing - Henry Chang, Teradyne (59)

Examining the Throughput Benefits of Distributed vs. Centralized Multicore Computing - Roy Chorev & Shreekar Diwakarla, Teradyne (109) Wednesday, April 30, 2014 - Teradyne Users Group

7:30-8:30 a.m. Breakfast

TEST INFRASTRUCTURE POWER MANAGEMENT MIXED SIGNAL RF WIRELESS DIGITAL MEMORY 8:30–10:00 a.m. AND PRODUCTION AND AUTOMOTIVE

8:30-10:00 a.m. Panel Discussion: Imagine the Future of Test (174)

10:00-10:30 a.m. Break

TEST INFRASTRUCTURE POWER MANAGEMENT 10:30 a.m.–12:00 p.m. MIXED SIGNAL RF WIRELESS DIGITAL MEMORY AND PRODUCTION AND AUTOMOTIVE

Getting a Head-Start on HDCTO vs. MSO – Emerging Measuring Noise Figure for Implementing Sflash PVI for Power/Automotive Memory Testing on IP750 Converting IG-XL Programs Competition in the AC / RF Receivers Using Protocol Aware Testing: Optimizing Test for Using Image Processing - into ETS-800 MST Programs - Mixed Signal League - Rainer UltraFLEX UltraWave 12G Characterization - Hank Production Environment - Masataka Tsuji, Teradyne Steven Katz, Teradyne (140) Gruber, Teradyne (102) Receiver - Yu-Jen Chen & Chi- (Hyunkue) Kang, Broadcom; How Chuin Yoong, Teradyne; (151) 10:30–11:00 a.m. Chan Cheng, Broadcom; Vivian Wang, Teradyne (132) Chee Kian Chong, Infineon Young-Kun Ann, Teradyne (16) (43)

New Instrument Customer DC Trend Removal by DSP- SerDes Testing Beyond Using DSIO to Measure High-Voltage Detect Tool to Using TEC Save to Find a Evaluation (NICE) Flow - based Analysis on DAC 15GBps - Rien Looijen & Rien Frequency on J750 - Kevin Avoid HSD Gripen Circuit Data Valid Window During Charles Esteves, Teradyne; Testing - Shawn Peng, Van Oort, Salland Engineering Giltner, Teradyne (137) Damage - Alec (Chia-Min) Lin, Synchronous Tests - Nathan Sundeep Desai, Texas Teradyne (57) (30) Teradyne (10) Linquist, Micron; Randal Clark, 11:00-11:30 a.m. Instruments (62) Michael Naron & Lyle Tarbet, Teradyne (125)

Online Stability Study Tool - Encoding and Decoding a Probe Card Design Rise/Fall Time Measurements Test Time Reduction: Our Massively Parallel Parametric Miroslav Stuchlik & Jakub Sine Signal for PCS 10base- Guidelines for Test on J750Ex-HD - Lauren Story - Raymond Seah, Go/No Go Tests with Tiller, ON Semiconductor (79) G 64b66b Standard - Pritish Concurrency on RF Guajardo & Chien Min Hwong, Teradyne; Pan Hu, Qualcomm Measured Results Sampling - Agarwal, Marc Hutner & Steve Connectivity Devices - Teradyne (112) (115) Randal Clark & Larry Hatton, 11:30 a.m. - 12:00 p.m. Lyons, Teradyne (71) Manikandan Palanisamy, Teradyne (111) Teradyne (37)

12:00-1:00 p.m. LUNCH TEST INFRASTRUCTURE POWER MANAGEMENT 1:00–3:30 p.m. DIGITAL RF WIRELESS DIGITAL MEMORY AND PRODUCTION AND AUTOMOTIVE

Probe Card Supernova! Best Analytical Approach to ESA Programming Overview How to Optimize High Testing Power Modules and KGD Memory Testing at Practices and Lessons Loadboard Design - Noel Del & Test Time Reduction Parallel Digital Test Smart Power Modules with 2.133Gbps - Wade Bick, Craig Learned to Avoid Burnt Rio, Freescale; Don Methods - Steven Fields, Programs - Ralf Baumann, the ETS-2500 - Hector Valdez, DiPalo, Leebo Shim, Luis Needles - David Lam, Thompson& Thomas P Teradyne (173) Teradyne (105) Teradyne (68) Valiente & Vlad Vayner, 1:00-1:30 p.m. Teradyne; Sundeep Desai, Warwick, RD Circuits (141) Teradyne (117) Texas Instruments (67)

ETS-364 Eagle Vision/ETS-88- Signal Integrity - Teppei Speeding up Test Programs Understanding Index Parallel Advanced Shmoo Features MST/ETS-800-MST Upgrade Yamaguchi, Teradyne (150) for High Site Counts on Testing - Ed Mateyka, on Magnum - Brendan Ryan, Process for Windows 7 J750Ex-HD - Leo Di Bello, Teradyne (144) Teradyne (116) 1:30-2:00 p.m. Offline Systems - Lam Tran, Teradyne (120) Texas Instruments (5)

Testing High Current Switch The Benefits and Use Model Controlling Voltages in a Devices with Ganging 10 for Concurrent Pattern Pattern on the Nextest HexVS Supplies - Richard Testing on the J750Ex-HD - Magnum I - Brandon Bohlen & 2:00-2:30 p.m. Matte, Broadcom; Vivian Daniel Murphy, Teradyne Patrick O'Connell, Cypress Wang, Teradyne (143) (127) Semiconductor (152)

Comparing UltraPin1600 Effect of DC Supplies on RF Application of Auto Strobe Even Parity Subroutines Are HRAM, CMEM and DSSC Transient Response - Keith and DIB Access in J750Ex- Reusable for Your Embedded Digital Capture - Pritish Carroll & Patty Carroll, HD - Haohui Gu, Teradyne ARM! - Ross Youngblood, 2:30-3:00 p.m. Agarwal & Ann Yong, Teradyne (171) (74) Teradyne (122) Teradyne (72)

Building Your Own Tester GUI For The ARM Debug Access Port - Ross 3:00-3:30 p.m. Youngblood, Teradyne (123)

3:30 - 5:30 p.m. Survivor Party