AMD A50M Fusion Controller Hub Databook

AMD A50M Fusion Controller Hub Databook Publication # 47776 Revision: 3.00 Issue Date: June 2012 Advanced Micro Devices 47776 Rev. 3.00 June 2012 AMD A50M Fusion Controller Hub Databook © 2012 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to this document including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD shall not be liable for any damage, loss, expense, or claim of loss of any kind or character (including without limitation direct, indirect, consequential, exemplary, punitive, special, incidental or reliance damages) arising from use of or reliance on this document. No license, whether express, implied, arising by estoppel, or otherwise, to any intellectual property rights are granted by this publication. Except for AMD product purchased pursuant to AMD's Standard Terms and Conditions of Sale, and then only as expressly set forth therein, AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD arrow, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Broadcom is a trademark of Broadcom Corporation. Microsoft, Windows, and Windows Vista are registered trademarks of Microsoft Corporation. PCI Express and PCIe are registered trademarks of PCI-SIG. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 47776 Rev. 3.00 June 2012 AMD A50M Fusion Controller Hub Databook Contents Chapter 1 Introduction ............................................................................................................ 12 1.1 Features of the Hudson-M1 Fusion Controller Hub (FCH) ............................................. 12 1.2 Part Numbers and Brandings ........................................................................................... 15 1.3 Hudson-M1 FCH Block Diagram .................................................................................... 17 1.4 Conventions and Notations .............................................................................................. 18 1.4.1 Pin Names ................................................................................................................ 18 1.4.2 Pin Types ................................................................................................................. 18 1.4.3 Numeric Representation........................................................................................... 18 1.4.4 Register Field ........................................................................................................... 19 1.4.5 Acronyms and Abbreviations .................................................................................. 19 Chapter 2 Functional Description .......................................................................................... 21 2.1 EHCI USB 2.0 and OHCI USB 1.1 Controllers .............................................................. 21 2.1.1 USB Power Management ......................................................................................... 23 2.2 SMI/SCI Generation ........................................................................................................ 25 2.2.1 Event Sources for SCI .............................................................................................. 25 2.2.2 SMI Events............................................................................................................... 26 2.2.3 SMI/SCI Work Flow ................................................................................................ 26 2.3 LPC ISA Bridge ............................................................................................................... 28 2.3.1 LPC Interface Overview .......................................................................................... 28 2.3.2 LPC Module Block Diagram ................................................................................... 30 2.4 Real Time Clock .............................................................................................................. 30 2.4.1 Functional Blocks of RTC ....................................................................................... 30 2.5 Serial ATA Controller ..................................................................................................... 31 2.6 High Definition Audio ..................................................................................................... 32 2.6.1 HD Audio Codec Connections................................................................................. 33 2.7 Clock Generation ............................................................................................................. 33 2.8 Power Management/ACPI ............................................................................................... 34 Chapter 3 Ballout Assignment ................................................................................................ 35 Chapter 4 Pin Descriptions ..................................................................................................... 37 4.1 APU Interface Pin Descriptions ....................................................................................... 37 4.2 LPC Interface Pin Descriptions ....................................................................................... 37 Contents 3 47776 Rev. 3.00 June 2012 AMD A50M Fusion Controller Hub Databook 4.3 Unified Media Interface (UMI) Pin Descriptions ............................................................ 38 4.4 General Purpose PCI Express® Ports Interface ................................................................ 39 4.5 USB Interface .................................................................................................................. 39 4.6 Serial ATA Interface ........................................................................................................ 40 4.7 HD Audio Interface ......................................................................................................... 42 4.8 Real Time Clock Interface ............................................................................................... 42 4.9 Hardware Monitor Interface ............................................................................................ 42 4.10 SPI ROM Interface .......................................................................................................... 43 4.11 Power Management Interface .......................................................................................... 44 4.12 SMBus Interface .............................................................................................................. 47 4.13 Reset / Clocks / ATE / JTAG........................................................................................... 48 4.14 General Purpose I/O and General Event .......................................................................... 53 4.15 Infrared Interface ............................................................................................................. 63 4.16 Power and Ground ........................................................................................................... 64 4.17 Miscellaneous Pins .......................................................................................................... 66 4.18 Unsupported Interfaces/Signals ....................................................................................... 67 4.19 Integrated Resistors .......................................................................................................... 67 4.20 Strap Information ............................................................................................................. 68 Chapter 5 Power Sequence and Timing ................................................................................. 72 5.1 Power Sequence ............................................................................................................... 72 5.2 Reset Timing .................................................................................................................... 77 5.2.1 ROMRST# ............................................................................................................... 77 5.2.2 System Reset ............................................................................................................ 78 5.2.3 PCIe Reset ................................................................................................................ 79 5.3 ACPI Timing ...................................................................................................................

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