Now That It Looks Like We Will Have Additional Project Reports That Will

NEMI

2006

iNEMI Optoelectronic

Substrates Project Report

Optoelectronic Substrates Project Report 1

November 1, 2006

The 2002 iNEMI Roadmap identified the potential for an optoelectronics interconnection system to replace existing copper interconnect systems for high bandwidth applications. The unresolved issues were, what bandwidth will be required for various applications, and at what bandwidth will the cost of optoelectronics interconnect systems become cost effective. The optoelectronic system would have an optoelectronics substrate on which to mount optoelectronic components including devices and connectors. An Optoelectronics Substrates Project group was formed in 2003 to address this emerging issue. Many iNEMI member companies were interested in participating. This project was the result of these discussions.

The group has served as an excellent forum for interaction among members of the current progress, future direction, and implications of optoelectronic developments within the industry. Now four years later, it is not as clear as to when optoelectronic substrates will be needed by industry. Firms are continuing to improve the performance of copper systems, and wireless systems are rapidly expanding.

This report serves to document the accomplishments of this project over the past four years. If future roadmaps identify the impending need of optoelectronic substrates, it is hoped that this report can serve as a starting point for future projects.

Sincerely

Robert Pfahl Vice President of Operations iNEMI

Optoelectronic Substrates Project Report 2

Table of Contents

EXECUTIVE SUMMARY ...... 4

INTRODUCTION...... 4

BACKGROUND - TECHNOLOGY OVERVIEW ...... 4

PURPOSE OF THE PROJECT ...... 5

MATERIALS AND METHODS ...... 6

RESULTS ...... 10

Cost Model Factors ...... 10

Existing Waveguide Technology Analysis...... 11

Polymer waveguide technology:...... 11

ANALYSIS OF SUCCESS...... 12

APPENDICES...... 13

Appendix 1 - Industry Requirements: Reliability and Performance Table for Multimode Optical Interconnections...... 13

Appendix 2 - Results from Analysis of Existing Optical Waveguide Technology ...... 20

Appendix 3 - Copper Technology Roadmap...... 29

PARTICIPATING ORGANIZATIONS...... 30

INDIVIDUAL PARTICIPANTS...... 30

BIBLIOGRAPHY FROM PROJECT ...... 32

Optoelectronic Substrates Project Report 3

Executive Summary The Optoelectronics Substrate Project was an outgrowth of needs identified in the 2002 iNEMI Roadmap.. The ultimate decision by the project group was to perform a generic cost analysis comparing the use of traditional copper interconnections for a communications industry backplane versus the use of optoelectronic technology. The original goal was to identify the conditions under which copper interconnections would not be able to handle the higher speed signals needed. Results from the project include: • The development of a copper backplane product emulator with an initial cost analysis • A Generic Copper Bandwidth Technology Roadmap, which is included in this report • Reliability and Performance Tables for Multimode Optical Interconnections • Results from Analysis of Existing Optical Waveguide Technology

The project has provided a valuable forum for the industry to continue discussion on the applicability of using optoelectronic technology in future high speed systems. However, based on input from the iNEMI OEM membership that there is little or no planned activity in the use of optoelectronic substrates, the iNEMI Technical Committee has recommended that this project be suspended as of this report. The project may be re- started if optoelectronic substrates are identified as a gap for future new product developments.

Introduction This project was the outgrowth of the recognition by the industry that optoelectronic devices could have an impact on system design in many of the areas in which iNEMI members were doing business. The Technical Committee reviewed the 2002 iNEMI Roadmap gap analysis and, as a result, an Optoelectronics Technology Integration Group (TIG) was formed in 2003 to address this emerging issue. Many iNEMI member companies were interested in participating. This Optoelectronics Substrate Project was the initial project for this TIG.

Background - Technology Overview At the end of 2001, much of the buried optical fiber, which comprises the global telecommunication, and internet-worldwide web network, was dark or unlit fiber, carrying no traffic. It is widely reported that somewhat less than 20% of buried fiber, which makes up the backbone, or superhighway, of this long haul (or long reach) network is actually being used. Meanwhile, advancements in Wavelength Division Multiplexing (WDM) are rapidly adding to the information carrying capacity, or bandwidth, of much of this buried fiber. Parallel advancements in laser transmission and receiver technology promise the near term deployment of 10 Gb/s transmitters and receivers. Early 40 Gb/s transmit/receive systems are in evaluation or latter stages of development. Approximately 20 million miles of advanced fiber was added to the long haul backbone in the past 2-3

Optoelectronic Substrates Project Report 4

years. This fiber, and most of the fiber deployed since 1995, has the chemistry and characteristics to support these new technologies. The growing use of Dense WDM (DWDM) systems, and the advanced Erbium Doped Fiber Amplifiers, and Raman amplifiers, will vastly increase the bandwidth of the existing backbone, especially when used with the emerging 10 and 40 Gb/s transmitter-receiver technologies. While it is true that much of the fiber buried before 1995 may not be able to support these new DWDM and 10-40Gb/s technologies, this legacy fiber is performing well in the healthy and busy internet-telecommunication backbone of today. How will all of this backbone capacity be utilized in the future? It is projected that telephony will consume a continually diminishing portion of network capacity, as data transmission demands continue to escalate. Within five years or less, telephony may consume less than 5% of network bandwidth, implying that telephony markets will not light up the dark fiber. Data demand from individual users in offices, through campus networks, and at home will gradually grow to fill the available bandwidth. Currently, the datacom or premise networks are connected with relatively low bandwidth optical pipes to the backbone. Most home users are connected through low bandwidth modems due to service provider limitations. The users at these access points in the business complexes, educational institutions, and neighborhoods will supply the data demand-pull if given the local capability. This local capability could be provided by extensions of fiber optic networks to provide convenient and low cost broadband to these users, creating a huge demand. Assessments of electronic and optoelectronic equipment demands for various telecommunication network segments predict that the value of the equipment needed for each mile of deployed fiber will increase radially from the backbone to the access rim. Equipment values per mile of fiber may be 100 times, or more the value of backbone optoelectronics. It is apparent that demand from the network rim will drive growth in the telecommunications industry and that much of this growth will be in the form of optoelectronics. This enormous volume demand will require very low cost laser transmit- receive hardware. Most of the optoelectronic industry is focusing on the cost reduction of backbone optoelectronic hardware. While this is necessary, success in this area will not light up the network, consume existing bandwidth, begin to consume the bandwidth of promised 40 Gb/s DWDM systems, and provide a growth stimulant to the telecommunication industry. Focus needs to shift to providing real broadband connectivity to the network rim, and to manufacture of truly low cost optoelectronic hardware for individual users and the local area networks. As the consumers become accustomed to the freedom of portable electronics, the trend to wireless is accelerating. This trend makes fiber optics, its components and design characteristics, and all of its system issues extremely important to the growth of the electronics industry.

Purpose of the Project Initially, the objectives of the project were: • To provide a formal forum for interaction among members on the current progress, future direction, and implications of optoelectronic developments within the industry

Optoelectronic Substrates Project Report 5

• To investigate implementation of optical and optoelectronic technologies in printed wiring boards (PWB’s). Specifically, the project sought to: o Define the drivers and constraints related to production of optoelectronic PWB’s, including cost analysis and tradeoffs o Identify design considerations and materials properties for materials used in PWB fabrication and assembly o Evaluate manufacturability and performance of waveguides and connector attachment to waveguides, including testing o Address issue of component mounting and interconnecting structures

This agenda proved to be too ambitious for the state of the technology, and was narrowed. Participants showed the most interest in investigating the cost of using copper interconnections for transporting the electrical signals vs. the cost of using optoelectronic technology. There were companies who had already done some sort of cost tradeoff analysis and were looking for validation of their efforts as well as companies who were just beginning to look into the possibility of replacing copper interconnections with optoelectronic technology. Based on the input from the project team members, the project goals were determined to be: • An initial analysis to develop cost models for backplanes • In order to meet as many member needs as possible, multiple designs for the optoelectronics portion of the study were provided. Each of these designs is called a "black box". • Four designs will be evaluated.

The project team prepared the following scope statement and presented it to the iNEMI Technology Committee in November 2003:

Develop a cost/ performance business analysis model for a “copper” telecom industry backplane and then model potential designs for equivalent optoelectronic backplanes. The goal is to determine a bandwidth crossover point between copper and optoelectronics. The team used a backplane as the primary focus of the activity. Copper and optoelectronic transmitters and receivers were required for each scenario

Materials and Methods The assembly cost model approach used was: • Sequential process model – the sequence of process steps is important because modeling recurring functional test (and possibly rework is important) • Supports system physical hierarchical – parts -> subassemblies -> assemblies, etc. • Distinguishes between mature and immature processes and parts • Relative costs – more interested in accurately modeling cost differences between technology options rather than absolute costs The cost model inputs are: • Part data • Procurement cost and yield at assembly

Optoelectronic Substrates Project Report 6

• Assembly process data • Generic processing steps with labor, material, tooling, and capital equipment contributions • Recurring functional test steps (additionally characterized by fault coverage) • Rework steps

Because cost-performance is the key driver; we need an industry metric to compare optical vs. Cu-based, e.g. $ / (Gb/s/channel/m)

Crossover zone: changeover will not be immediate, but will range Copper

st depending on issues including PCB cost sensitivity, reliability, and

Co design limitations e

lativ al PCB e Optic R

2004 2000

Bandwidth x Distance

The project team developed four different “boxes” for the cost analysis. “White Box” was used for designs with copper interconnections and “Black Box” was used for optoelectronic designs. The team originally identified four different technology steps. WB1 and BB1, WB2 and BB2, WB3 and BB3, and WB4 and BB4. Below are details of White Box 1 and Black Box 1 along with high level definitions for the follow on boxes. We did not try to define the follow on boxes because we knew that the technology was developing and would change over time.

• Electrical “White Box” #1: o ATCA/PICMG3.0 backplane, single shelf system o 10G per link, serial, fixed physical path o Dual star, 2 hub (switch) cards, up to 14 line cards per shelf (total 16 cards), o Channel through the backplane (fabric): o XAUI (4 x 3.125G differential pairs, i.e. 8 Tx & Rx pairs per channel), or o UXPi (10G over single pair, 2 Tx & Rx pairs per channel) o Run separate cost models for each case? o Channels per switch card: depends on number of line cards (max 14) o Channels per line card: each line cards connects to both hubs and depends on the “dot spec” on the front side (can be 1, 2 or 4 channels) o Chose PICMG 3.1 Gb Ethernet for front side (same for each line card): o SERDES based GbE: 1,2 or 4 links per fabric channel, or o XAUI 10Gb Ethernet: 1 link per channel: selected for simplicity o Chip set, integrates two or more functions in CMOS: serdes, pre-emphasis, equalization, 8B / 10 B coding (ASIC vendor TBD)

Optoelectronic Substrates Project Report 7

o Signal coding over backplane: PAM-4 or NRZ, latter preferred o Backplane: dual 48V power, ground, high speed signal layers (# TBD), probably back-drilled, enhanced FR4 o “RTM” optional rear board: ignore for our purposes o Card dimensions: 8U high x 230 mm depth x 1.4” o Signal connectors, differential, press-fit: ZD (Tyco or ERNI), 5 per line card (in Zone 2)

• Optical “Black Box” #1: o Identical to “White Box” #1, except optical links will replace the high speed electrical channels o Fiber based, multi-mode (TBD), point-to-point, separate unidirectional Tx & Rx links o 10G optical transceivers XFP (10G small form factor pluggable, e.g. PicoLight), will be located in Zone 3 of each ATCA card o Each XFP has one Tx and Rx port, package width 0.722”, length 2.73” o Issue: there will be insufficient space in Zone 3 for optical transceivers, particularly for the switch cards (15 per card). The high speed electrical connectors in Zone 2 can be replaced with optical transceivers (although this is not in the ATCA spec, it is a practical solution). o If 10G VCLSEL transceivers are available, these may be lower cost than SM laser types o Electrical switching, dual star, 2 hub (switch) cards

• Optical Black Box #2: o 40GHz implementation of BB#1, and/or fully populated frame (3 ATCA shelves, 16 cards per shelf), and/or full mesh system (high channel count) TBD o Fiber based o Possibly use CWDM optical multiplexed signals within the fabric to overcome space restrictions

• Optical Black Box #3: o Fiber Flexplane version of BB#2 (TBD)

• Optical Black Box #4: o Organic embedded waveguide in backplane, version of BB#2

The following is a schematic block diagram of an ATCA system used in the cost model, showing the backplane, Switch card and multiple line cards.

Optoelectronic Substrates Project Report 8

Switch Card Back plane

Line Cards Line Cards

Other items to be considered as part of the cost model, included:

Test: • Physical test, e.g. connector cleanliness inspection, link loss testing • Functional test, e.g. BERT • Test must be considered in design, e.g. provision for test access • Include test equipment capital costs and test time

Assembly: • Mechanical assembly costs could be significant for high I/O system • Connector end face contamination concern, may require system assembly in relatively clean conditions • Fiber/flexplane management and connector mating will remain manual for foreseeable future • Large parallel optical connectors may run into physical space limitations, e.g. card edge connector width & length, daughter card spacing

Reliability: • VCSEL array reliability improving from 50 to 10 FITs as technology matures. Failure rate per element in a large VCSEL array may be unacceptable at present. May require redundancy

Thermal: • Problems created in maintaining wavelength and output stability of optical sources (critical for DWDM). Use wave locker and/or active cooling (the latter increases power consumption) • Emitter lifetime can be significantly increased by running at reduced output power • Additional power consumed by adding signal conditioning ASICs (Application Specific Integrated Circuits) that must be cooled

Optoelectronic Substrates Project Report 9

Cost-performance: • Will be built into cost model • Consider technologies which can be extended to higher performance, to avoid redesign of the system and rebuild of the model

Results The team completed the Copper Technology Roadmap to 40Ghz. This roadmap was an aid in determining which scenarios were to be used in the cost modeling. The Copper Technology Roadmap is included in Appendix 5.

Several models were developed to assist the cost modelers with technology and component selection. One such model is shown below:

Cost Model Factors

Generation 1 Generation 2 Generation 3 Generation 4a Generation 4b High Frequency High Frequency Fiber bundles or Planar Embedded FR4 Exotic Material Ribbons Waveguide Waveguide Processor cost Signal conditioning costs • Pre conditioning N/A* N/A* N/A* • Post conditioning N/A* N/A* N/A* EMI control cost N/A N/A N/A Power Budget (per unit length) Thermal Budget Fiber Assembly cost N/A N/A # of Cu layers removed N/A # of optical layers required N/A N/A N/A # of processors removed and N/A N/A replaced by VCSELs # of VCSELs required N/A N/A Frequency per VCSEL/ N/A N/A channel VSCEL cost • Traditional VCSEL N/A N/A • Edge Emitting N/A N/A VCSEL • Embedded VCSEL N/A N/A * Signal conditioning may also be used for optical devices in Generation 3+ since it can potentially squeeze higher performance out of lower cost devices

Detailed spreadsheets of BB1 and WB 1 were developed to aid in cost model input. For each box WB 1-4 and BB 1-4 a spread sheet of inputs were required for all components on each of the 18 boards used in the analysis. The spreadsheets are provided in the appendix.

In 2005 the committee began working on two additional pieces of the optoelectronics puzzle. Black Box 4 is an embedded waveguide model. Embedded waveguide technology is still developing and changes rapidly. To prepare for the Black Box 4 inputs, the iNEMI team decided to do an analysis of existing waveguide technology. This work is presented in a tabular format. Below is a small piece of the table for review; the complete table is in the Appendix.

Optoelectronic Substrates Project Report 10

Technology maturity is assigned for each of several technologies to be considered along with maturity for each important attribute using a scale of [1] to [4]; namely [1] literature, conceptual stage or early feasibility only, [2] laboratory demonstration, preliminary proof of concept, evaluation and testing, [3] prototypes constructed and delivered for evaluation, and/or demonstration or system design development, limited pilot production, initial application specific testing, [4] commercial product deployment, extensive testing, manufacturability demonstrated.

Existing Waveguide Technology Analysis

Polymer waveguide technology:

Technology based on: Technologies based on: Ridge Formation with Clad Backfill Monomer Diffusion with clad lamination Technology-- Polymerization induced Image and develop with Screen print Embossed General Attribute monomer diffusion self aqueous , etching (wet or mold development – [3] chemical or RIE) processing Representative Optical CrossLinks, Inc. Rohm&Haas/Shipley, Gemfire / Dow OptoFoil-Fraunhofer practitioners IBM, Corning Institute, IZM

In parallel with the technology comparison analysis, the waveguide sub-committee started to analyze the reliability requirements needed for embedded waveguide technology, independent of technology. This effort was initiated by IBM Yorktown. The full report is included in the Appendix. Industry Requirements: Reliability and Performance Table for Multimode Optical Interconnections (See full table in Appendix) General performance factors: ---Factors important or relevant to real world performance characteristics and needs as generic system requirements. This is not to address any polymer or technology for waveguide creation, which is covered in the polymer attribute tables---but only what is really needed for a practical stable polymer interconnection system.

Optoelectronic Substrates Project Report 11

2006 has been a time of refining inputs and running some first pass models and verifying the model output. The following is a typical output of the cost model program showing the total cost of the BB 1 (10Gbs, fiber based, optical), yielded and un-yielded.

Analysis of Success This project was very successful in providing a forum for original equipment manufacturers, materials/components suppliers, fabricators, electronic manufacturing system companies, and others to investigate the use of optoelectronic technology in the design of electronic systems. Many good ideas were generated and the interactions provided members with a realistic view of the state of the optoelectronics sector. A set of definitive milestones tied to a project plan were not established early in the project development and thus the activities undertaken were an outgrowth of the forums, conference calls, and discussions of the group. The lack of a definitive project plan at the outset of this project was not necessarily a non-positive characteristic because it allowed for a continuous discussion of alternatives as the participating companies reviewed and evaluated their future optoelectronic needs. However, it did make the project too open ended and made it difficult to bring the project to a timely conclusion.

Optoelectronic Substrates Project Report 12

Appendices Appendix 1 - Industry Requirements: Reliability and Performance Table for Multimode Optical Interconnections

1) General performance factors: ---Factors that are important or relevant to real world performance characteristics and needs as generic system requirements. This is not to address any polymer or technology for waveguide creation, which is covered in the polymer attribute tables---but only what is really needed for a practical stable polymer interconnection system.

Subcategories Minimal Typical / High Acceptable expected performance Total System optical loss at 850nm/980nm *1 Few cm guide lengths 2 dB +/-1dB 1.5 dB +/- 1.0 dB +/- 0.3 0.5dB Up to 10 cm lengths <5 dB <4dB <3dB 20 cm or greater <10dB <8dB <6dB Effective Tg *2 150Tg 200 Tg 300+Tg Effective CTE *3 <100ppm 50ppm 20ppm Acceptable range for waveguide <0.4dB/cm <0.2 dB/cm <0.1dB/cm losses Acceptable radius of curvature 10mm 5mm 2mm (ROC) with min. loss Acceptable coupling goal loss 0.7dB/couple 0.5 dB/ couple 0.3dB/ couple range *4 Acceptable loss max increase 0.2dB/cm /yr < 0.1dB/cm /yr <0.05dB/cm/yr over time

*1 System optical loss is the critical issue. Low material losses with high coupling or configuration loss (ROC etc.) can be practically the same system impact as high material losses and low coupling losses. System losses can include all bulk material loss at important wavelengths, scatter due to waveguide formation processes, WG configurations like bends (ROC), I/O coupling, back reflections , alignment issues; NA and size mismatch. System loss for long lengths could be reduced with WG+OF hybrid designs *2 Effective Tg is the max sustained T above which the system losses mechanical properties and robustness---self supporting polymer go limp, bonded to board have a higher effective Tg *3 Effective CTE determines the T range over which how well alignment can be maintained for example between polymer guides and solid state components, i.e. if the CTE is 100 ppm alignment over a broad range is difficult with sources that have a 15ppm CTE, polymers with <50 ppm have a reasonable alignment T range

Optoelectronic Substrates Project Report 13

*4 Coupling loss impacted by direction as to or from a) graded index OF from step profile WG, b) NA max differences, c) size /overlap as well as other factor like axial alignment, air gap etc.

2) Configurations ---acceptable application requirements like bonding to surfaces, covering large areas or selected links like with strips, being embedded inside or in between substrates, existing both on or off board for an interconnect link. How is the polymer guide to be embodied for a practical application? What is really needed or expected to be practical

Subcategories Minimal Acceptable Typical / expected High performance

Board Surface; coverage (%) 5 to 30% 5 to 50%max 5 to 90% max application specific Embedded between boards Not likely Optional Optional application specific Size cut or uncut Few cm sq or lengths Up to 20 cm >20 cm

Flex off board in part Bonded Bonded & unbonded Bonded & unbonded

3) Installation processing—what are the requirements for attaching or processing waveguides in situ to make for acceptable applications that form reliable links

Subcategories Minimal Acceptable Typical / expected High performance

Self supporting guides *1 optional Yes yes In situ process guides *2 optional optional optional Bonding treatments, agents, board Epoxies Epoxies, Epoxies prep

Cleaning/solvents PET ether PET ether Thermal range acceptable to bond 46C 65C 100C

Pressures (embedded) *3 5psi 10 psi 20psi

*1 self supporting guides can be pre made, machined, connected and QC’d then bonded all or in part to substrate board—what are the acceptable issues for bonding, aligning reliably, induced distortions during installation-- that provide are acceptable industry performance *2 spin coated or guides built up on the substrate during construction, --what are issues, solvents allowed, imaging for alignment, etching, in situ coupling / connectorization overall connecting acceptable to industry practice.

Optoelectronic Substrates Project Report 14

*3 guides embedded between boards---what are acceptable pressures for board, for waveguide films to remain viable. Unique coupling issues inherent for interfacing to surface components such as use of lenses, vias, or direct link to surface etc. Coupling is functionality covered below

4) Functionalities – what are acceptable and needed functions for reasonable broad range of applications. How diverse must allowed functionality be to have a practical system. These could be one function or many depending or the application requirements.

Subcategories Minimal Acceptable Typical / expected High performance

Point to point, lengths, 0.5 to 5 cm 0.2 to 10 cm 0.1 to 20cm # in arrays – high density Several 12+ 50+ Single or multi layers One layer Up to 2 layers > 2 layers Pitch 500 um center to 250 um center t0 center 50 um center to center center

Embedded components in none some Yes waveguide grid

Board edge connectors MT style Yes MT style / or small Custom or std MT or small ferrules ferrules

Bkpl to Daughter board 90 deg no yes yes connectors, array/layers

Mirrors in - or out of-plane Edge only At edge & within plane At edge & within plane

splitting, combining None Up to 1x16 To 1x32 star couple(mixing) None Up to 8x8 Up to 32x32 crossovers None Up to 11 as needed Up to 50

switching none none Opt mech/bubble

Coupling efficiency *1 <1dB/couple <0.5dB/couple <0.5dB/couple Bandwidth / length max

*1 Coupling involves alignment, size or overlap, NA matching or mismatch, off axis angles, air gap, ---but bottom line is the allowed or acceptable loss before performance is unacceptable

Optoelectronic Substrates Project Report 15

5) Industry accepted electronic component assembly process compatibility – After guides are in place what are acceptable conditions for adding electronic or E/O components before loss of properties. Conversely, if E/O, E chips or components are already in place what must requirements be for application or installation of waveguide links to achieve properly aligned acceptable performance etc.

Subcategories Minimal Acceptable Typical / expected High performance

IR solder reflow Temp & time max 200C @ 0.5 min 300C @ 1 min 400C @ 10 min *1 Convection/solder bath *2 no no possible Solvent cleaning impact *3 Loss inc. < 0.1 db/cm Min. loss increase of <0.05 No impact under typical operations dB/cm

T = Temperature t = time

*1 IR solder reflow T and t where acceptable changes for min performance impact due to low or no increase in material loss, coupling/alignment satisfactory, distortion (microbend issues) okay etc. *2 most polymers have real issue with extended high T impacting items in *1 above, but if required what is min acceptable impact at min T an t *3 some solvents have major impact on unprotected polymers like hazing, scattering, cracking etc. particularly alcohols, benzenes. Solvents like PET ether are usually fine with no impact

Optoelectronic Substrates Project Report 16

6) Operational conditions –What are the expected and accepted operating conditions essential for a viable optical link/interconnection system to be practical and deployed?

Subcategories Minimal Acceptable Typical / expected High performance

Std. Temp range 0 to 80C -45C to 85C -55 C to 150C Mil spec range no -55C to 125C -65C to 150C Moisture impact *1 Minimal Minimal / protectable No issue Operating environment - no Not typical Hermetic req. hermeticity needed?

Local T max (i.e. laser facet)- 85C 125C 150C sustained

Radiation Rad units, time, loss no 50% loss, 50 % recover in None!? 24 hours Thermal cycle T, t max 0 C to 85C 2 hour -45C to 85C / 2 hour -55C to 150C ½ hour

Inertial shock – std spec No issue No issue No issue Vibration - std spec ? ? Vacuum out gas - impact Min. Low to 0 none

T = Temperature

t = time

*1 moisture impacts different wavelengths, different polymer structures, and is significantly increased in time, severity with temperature. Removal can return to pre moisture conditions or leave permanent change

Optoelectronic Substrates Project Report 17

7) Lifetime / shelf life conditions – What are expected and essential characteristics that must be met to sustain viable performance, like how high a T and over what time, temperature and humidity limits, Arrenhenius extrapolations for allowed loss increase over time at a wavelength and at a sustained T, other degradation induced losses like cracking, hazing, etc over time

Subcategories Minimal Acceptable Typical / expected High performance

Temp max range & t 85C 125C 200C 85C/85%RH& t *1 <1 hour <4 hours Req. Loss inc. time at Temp for λ 1yr at 85C @ 850nm i.e. 5yr at 85C @ 850nm No impact with <0.2dB/cm with<0.1dB/cm loss inc.

Loss degradation in time *2 <1dB < 0.5 dB <0.2dB

T = Temperature t = time

*1 A currently used test for adverse impact and lifetime but not a practical test or environment for real world, and also has adverse impact on solid state components, very corrosive *2 System loss degradation regardless of source has a limit for real applications –so what is acceptable loss limit for system performance. Degradation sources for polymers can be thermal (max or min T, cycling, spikes and/or sustained), water/moisture at T and t, uv (t,P and wavelength)}, thermal shock, solvents, multiple flexing or other mechanical distortions, structural integrity like delamination etc. All these are attributes of the various waveguide polymers and technologies---here what is acceptable by industry for implementation is the question.

Optoelectronic Substrates Project Report 18

8) Solid state components, light sources, detectors, chips, electronic interconnections ---Polymer optical interconnects are only part of the issue for a stable reliable high speed system as the entire system must be subjected to the same operational environment and remain stable, and have acceptable lifetime----and no one system component should be held to a higher standard. Thus for light sources, detectors, chips , electronic interconnections, fixtures etc., what are the acceptable operational and storage condition standards (in terms of T max / min, solvents, moisture at T&t, shock, etc. before degradation or failure for these system it components. Much of this needs to be fleshed out to provide limits to which all parts of the system are measured against for stable reliable performance. For example if the VCSEL’s start degrade at say 100C then should polymer interconnects remain stable at 125C. Obvious life time projections from Arrenhenius plots or other routes provide useful data that is important –but not for necessarily for operational constraints.

Subcategories Minimal Acceptable Typical / expected High performance

VCSEL’s –T, moisture etc.------85C <50% 90C < 60%RH 95C <80%RH

Edge emitting lasers T, Same as above LED’s ? chips ? Electronic connectivity ? T = Temperature t = time

Optoelectronic Substrates Project Report 19

Appendix 2 - Results from Analysis of Existing Optical Waveguide Technology

Polymer waveguide technology

Technology based on: Technologies based on: Ridge Formation with Clad Backfill Monomer Diffusion with clad lamination Technology-- Polymerization induced Image and develop with Screen print Embossed General monomer diffusion self aqueous , etching (wet or mold Attribute development – [3] chemical or RIE) processing Representative Optical CrossLinks, Inc. Rohm&Haas/Shipley, Gemfire / Dow OptoFoil- practitioners IBM, Corning Fraunhofer Institute, IZM

Optoelectronic Substrates Project Report 20

Process, Characteristics, General Capability General Pre coated photosensitive Siloxane based Hot Embossing of process acrylate monomer &binder negative acting system commercial available description polymer on temporary carrier that processes like a polymer foil using special 1foot wide 100+ feet long. Photoresist. negative tool made by Contact photomask uv Compatible with CMOS high quality lithography exposed waveguides. and PWB manufacturing and galvanic Monomer diffusion mass and waste streams. metallization. Filling of transfer creates higher Loss @ 850nm grooves with polymer of density polymer guide. 0.025dB/cm. higher index of refraction. “Self-developed” guides are Embedded waveguides UV curing. Cladding clad with similar polymer, demonstrated with lamination with same foil interdiffused, fully exposed, minor increase in loss. as used for embossing and bake cured. [3] Initial data shows good (undercladding). Several stability @85/85 for over drying & tempering steps. 2500 hrs [2.5} Effective CTE & Robust outer layers w high Tg >200C, CTE ~ Tg 207 °C Tg --- impacts T Tg (>200C+) and low CTE 120ppm. Isothermal CTE ca. 70 ppm run out, solder <50ppm for T/mech prop. ; TGA shows no reflow, and permits IR reflow 300C 30 significant decomp up to bonded substrate sec. [3] 50 hours. Initial tests to flex link option pass solder reflow test [2.5] Field size / tool Largest photomask exposure Meter long waveguide 5’’ [3] size to date - 18x12 inches. demonstrated. Typical Not for very large Volume Typical 6 in. [3] Direct write substrate size backplanes but for production guides demonstrated, large processed 12x8. modules potential mask or mask on rotating Material shows good cylinder options for very long litho on large scale guides. PWB exposure tools. [2] Polymer Optical Bulk material, SM, and MM 0.025dB/cm @ 850nm < 0,2 dB/cm @ 850 nm material loss guides all same loss (no WG ~0.07 dBb/cm @ 980nm [3], wall scatter) at 0.08 dB/cm at Measurements made on Lover loss with high 840nm; 0.26dBcm at 980nm meter long waveguides quality embossing tools [3] [3] possible [2] System loss material / connectivity is key. Guide size, 4 to 100+ um sq. or rect. with 5-100um with contrast MM typical: 50 µm x 50 index -- range 0.003 to 0.035 index to from 0.02-0.035. µm surround. Typical wg 50x50 @-.25 NA: 0,1...0,3 tuneable [3] Typical MM WG’s 35x40um delta n [3] w NA ~.3 [3] Density / pitch/ MM guides with 4 micron 8um L/S through 50um MM typical 250 µm pitch stacking space or greater. 10:1 L/s demonstrated. 5;1 [3], min. 50 µm hyperfine pitch Typical 50- aspect ratios 200 um space. [3] Stacked demonstrated [3] for 2D arrays with 125 um vertical pitch in delivered product. [3]

Optoelectronic Substrates Project Report 21

Connectivity Technology-- Polymerization induced Image and develop Screen print Embossed General monomer diffusion self with aqueous , or mold Attribute development – [3] etching (wet chemical or RIE) processing WG to/from Film edge 45º I/O mirror Special coupling unit with: VCSEL or PD’s (metalized) (~0.4dB loss) - 45° mirror on -- single or array couple, precision within few waveguide end microns both placement to - metallization for solder balls and array run improved out [3] reflectivity [2] Stacked WG (4x12) array - 0,7 dB coupling (+/-3um) to VCSEL arrays loss for unit with butt coupling ferrule. [3] O/E Module is mechanically pluggable to the unit WG to/from OF Direct butt / permanent or Not in focus but possible single or array -- MT ferrule array [3] -loss impacted 0.5 to 1.5 dB WG to GI by overlap size match dominates loss. variation & index Ferrule based on board profiles vs. GI edge or stand alone. [3] OF WG to WG MT ferrule based arrays [3] Not in focus but possible and permanent splices [3] also direct waveguide to fiber single and arrays.[3] 90º backplane Flex off substrate link with Special coupling unit with: to daughter 5mm ROC and WG to WG - Mechanical board couple for array supports for plug connectivity. Single and in forces dual layer guide MT style - 45° mirror on array connectors.[3] waveguide end Blind mate/latchable metallize - improve housing with flex WG[1] reflectivity [2] Embed. Comp. LD (edge) and filters Not in focus but possible by in WG film (WDM)embedded in WG hot embossing [2] matrix [3] Embedded or ink jetted lenses –free space [1] Arbitrary I/O Optional single or multi- The special coupling unit is mirror location guide I/O mirror location able to locate at arbitrary within film (not an edge) [2]. location on board – depends Pre cut film to locate I/O on the design mirrors on boards vs. fiducials or solder bumps[3] and metalized option for high NA[3] Internal 90 to 45 deg. mirrors constructed.[3] Grating in /out Imaged gratings for in plane no of plane [2],

Optoelectronic Substrates Project Report 22

System Applications Optical signal routing with waveguide options for very high density up to standard of 250 um pitch or larger Technology— Light induced self Image and develop Screen print or Embossed General Attribute development –[3] with aqueous , mold etching (wet chemical or RIE) processing -point to point WG arrays for on board, flex On board and in Straight and bended links jumpers, 90˚film bend links board w/ 10mm bend waveguides, with 5mm ROC [3] radius [3] Splitters [3] - crossovers Low loss with internal Tested [2] guiding structure in crossover region [3]--- complex routing link [2] - lenses Photoimaged cascade [3] or Only at module side embedded for vias and free necessary space links [1] - mirrors In and out of plane [3] Depending on the embossing tool technology. The better way is to cut the waveguides itself in suitable angle [3]

Optical Functionality Technology— Light induced self Image and develop Screen print or Embossed General Attribute development –[3] with aqueous , mold etching (wet chemical or RIE) processing - splitters / Standard tree branch (1x16) 1x8 splitters with Possible with combiners on board or self supporting 1dB/split demonstrated embossing technology point to multi connected & packaged with [2] [2] point or reverse total excess loss <2dB at 850nm[3] or fan outs (1x 100) [3]

- distribution : Star couplers --tree branch multi- point to format [3] multi-point - WDM MM filter insertion with CWDM possible internal guide structure [2]

- switches MM bubble switch [2] TO switches possible Single mode phase change thermal demo’d with embedded Peltier control.[2]

Optoelectronic Substrates Project Report 23

System Performance / Reliability Issues Technology— Light induced self Image and develop Screen print or Embossed General Attribute development –[3] with aqueous , mold etching (wet chemical or RIE) processing System optical Coupling interfaces losses loss particularly NA/size with step profile WG to graded index profile (GI) OF (typ. 0.5 to 1.5 dB) dominates over material/guide losses until lengths 20 cm or greater

Full Link System Complete links Rx thru to Tx for 48WG arrays (4layer WG stacks 12WG per layer), 24WG arrays (2 layer stacks 12 per layer) delivered to customer site, 60 full sets of 48 array system in Beta test. All losses considered include: materials, guides, coupling VCSEL to guide to fibers to guides to PD’s, alignment, curvature (in plane imaged WG’s and out of plane bent guide films), array position included as part of system loss. Typical Tx 1.5 dB±0.5 thru to Rx 2.3dB±0.5 for full link. [3]

Other board level full links delivered with similar results and if mirror out of plane I/O an additional 0.3 dB typical for mirrors [3] Reliability / stability Robust package materials w 85/85 stability up to low effective CTE (typ. ~ 2500hrs [3] 50ppm) and high effective Tg (200C+) used for all items below -IR solder reflow Demo’d with no pitch or loss Past initial testing @ Demo’d okay at 280C changes at 300C for 1 270C [2] for 1 minute on board minute on board substrate [3] -thermal cycling Stable – 55 C to 125 C Passed 100 cycles Shock 0 – 125°C continuous cycling with from –40-125 cycling 600 cycle loss <0,03 repeatable no change in every 15 minutes [2] dBm loss over every 2 hours 1000 Cycle Loss < 0,1 cycle for months[3] dBm -time at Arrenhenius plot temperature -- extrapolation---0.1dB/cm aging lifetime loss increase at 850 nm for 85 C for 5yr. and 10x less at 1300nm [3]

Optoelectronic Substrates Project Report 24

System Performance / Reliability Issues -- continued Technology— Light induced self Image and develop Screen print or Embossed General Attribute development –[3] with aqueous , mold etching (wet chemical or RIE) processing - 85 C / 85%RH Protection if needed No protection needed Loss after achieved with metalization, [3] 50 h <0,05 dBm SiO2 coatings, packaging.[2] 300 h <0,08 dBm With no barrier protection 1000 h < 0,3 dBm stable no change in loss at 850nm until ~4 hours then increasing loss with polymer structure modification but loss reversible up to 24 hours, after 24 modification permanent; At 1300nm immediate loss increase but immediately reversible when moisture removed.

All polymers absorb moisture under these conditions thus 1300nm; 1550nm will have higher loss due to absorbed moisture if measured during these operational conditions unless barrier layers are used.

- Coupling Protected WG MT interface interface coupling 100 make/breaks protection with alcohol clean for each, abrasion and no coupling loss increase [3] solvents Hermetic Packaging to block moisture packaging from reaching solid state VCSELs, PD’s etc and interconnecting waveguides inside packages with optical guide array going thru package wall under development [2]

Other reliability issues and /or requirements to be defined ; may be application specific

Optoelectronic Substrates Project Report 25

Manufacturability / Production Cost estimates Technology— Light induced self Image and develop Screen print or Embossed General Attribute development –[3] with aqueous , mold etching (wet chemical or RIE) processing Volume Manual WG films up to 5 sq production ft per day –today [3] Reel to reel step and repeat (or cylinder roll) potential 10 to 100+ sq ft per day achievable

- machining Precise machining is critical /assembly but slowest step for throughput [3] –needs semi automation, faster cuts low precision areas, pick and place operations. Other tools [2]

Cost estimates Assumptions: 1) cost range given from low volume near term after production initiation with some fixturing &process improvements to higher vol. production with semi-automation out several years after production scale up , 2) assume reasonable hourly rates, All $ low to high volume after initial prod. manuf.

- polymer Materials required to make materials finished WG film package, ~$40 to $20 per sq ft est. all layers

- waveguide Costs ~several $100 per sq imaging and ft (batch size dependent); to processing for ~$10 per sq ft with fully clad and significant automation protected film structure

Optoelectronic Substrates Project Report 26

Manufacturability / Production Cost estimates ----continued Technology— Light induced self Image and develop Screen print or Embossed General Attribute development –[3] with aqueous , mold etching (wet chemical or RIE) processing - micro machining Depends on complexity with for connectivity, est. $500 to$1500 / sq ft. coupling, special average for reasonable structures & coupling and/or component configurations size & density, using machine vision fiducials imaged during WG exp. to guide laser machining. High precision tools where needed, low precision low cost for general cuts. Mirrors and optical surfaces achieved with precision tooling.

Assemble / Cost range based on connectorize assumptions above plus materials, processing, machining and assembly. Typ. coupling cost range: MT style conn. WG or Brd edge ~ $100 to $15 per unit with WG array. Brd to brd 90º $300 to $75 with internal WG array MT style connectivity and blind mate latch housing for MT’s etc.

- protective / Coatings for protection or metalization for metalizing mirrors or electronic circuits ~ $800 per vendor run with many components processed per run so ~$2 each to higher $ for large (fewer) components - testing Needs automation, special designs for precision test fixtures (machine shop precision limitations on fixtures so precision upgrades needed). Estimates range from $75 to $5 per tested component with multiple guide arrays and coupling interfaces to fully test critical operating attributes

Optoelectronic Substrates Project Report 27

Capital Equipment Cost -----best “guestimates” Technology— Light induced self Image and develop Screen print Embossed General Attribute development –[3] with aqueous , or mold etching (wet chemical or RIE) processing Material preparation Vendor materials preparation using standard polymer processing chem. lab hoods and equipment like lab glassware, mixers, filters, pumps, solvent removal etc. Very batch size dependent, pilot scale [3] needs $15K; larger prod. volume $50K capital equipment needs Material coating Pilot scale needs met with lab bench coating onto temporary Mylar substrates using $2K equipment [3]. Production scale coatings $1M to $5M investment with coating, drying, large roll film handling, clean rm environment—typically using coating vendors like Rexam, DuPont etc. Waveguide exposure Pilot scale low vol. and processing production needs up to 10 sq.ft. per day per shift approx. $20K [3] including clean rm, air handling, exp box, film handling, ovens. Production volume of 100 sqft per day per shift ~ $300K investment, and 1000sq.ft. /day per shift $1M to $10M investment Precision machining Pilot scale low volume production precision machining and support $400K [3]. High prod. continuous process tooling, and multi cutting stages w different lasers and tool options ~$1.5M Connectorization, Pilot low vol. manual $10K Assembly, pkging equipment [3], low production with fixtures but manual $50K, semi- automated $500K Lifetime, reliability Extended testing, multi testing chambers continuous optical monitoring $200K to $1M potential Optical testing Standard array of testing, special fixtures data collection $500K [3]; lrg vol. production semi automated $1.5M System testing Electronics and Optical full system $500K dependent on complexity

Optoelectronic Substrates Project Report 28

Appendix 3 - Copper Technology Roadmap

Consult the following link to view the roadmap: http://thor.inemi.org/webdownload/x1private/tigproj/Final_Reports/Optoelectronics/Copper_Techn ology_Roadmap.xls

Optoelectronic Substrates Project Report 29

Participating Organizations • OEMs: Alcatel, Agilent, Bell Labs/Lucent, Cisco, Cray, Intel, IBM Yorktown, IBM Zurich, Motorola, Nortel, Northrop Grumman, Sun Microsystems, Teradyne • Materials/Components Suppliers: Arlon, Bayside Materials, Nanodynamics, Dow Corning, Dupont, WL Gore, Hitachi, Infineon, MacDermid, Park Nelco, Optical Crosslinks, Polyclad, Shipley, Taconic, Tyco, 3M, US Conec • Fabricators: Cortec, Merix • EMS: Celestica, Jabil, Promex, Sanmina-SCI, Solectron • Other: BPA, CAT Inc., Cookson, NSWC Crane, Georgia Tech, JPL, Micro Fab, Silicon Pipe, U of Maryland

Individual Participants

NAME COMPANY TELEPHONE FAX EMAIL

Jack Fisher Project leader 512/930-5666 512/930-5666 [email protected] Paul Brown Alcatel [email protected] Chet Guiles Arlon 909 987-9533 [email protected] Brian Lemhoff Agilent [email protected] Doug Frytag Bayside Materials 301-570-3821 [email protected] Mary Mandich Bell Labs, Lucent 908- 582-3396 [email protected] Nick Pearne BPA 44-1306-875500 [email protected] M. Hutton BPA [email protected] Tim Estes CAT, Inc 505/797-0100 505/797-1605 [email protected] Dave Wolf CAT, Inc 952-652-9033 530-654-5268 [email protected] Peter Arrowsmith Celestica 416-448-4906 [email protected] Gunter Ladewig Celestica 416-448-5112 [email protected] Rob Suurmann Celestica 416-448-5800 X8034 [email protected] Bruce Houghton Celestica 416/448-5701 416/382-6181 [email protected] Sergio Nunes Celestica 416-448-2942 Robyn Aagesen Cisco Systems 919/392-9680 919/472-3889 [email protected] Ginni Chadha Cisco Systems 603.896.5501 [email protected] Gary Hoeppel Coretec 416/208-2148 416/208-2196 [email protected] Richard Snogren Coretec/SAS [email protected] Alan Rae Nanodynamics 508/698-7238 508/698-7201 [email protected] Adam Singer Cookson 508-698-7236 508-698-7300 Dr. Ceber Simpson Crane (NSWC Crane) 812-854-5470 [email protected] Charles Pagel Crane (NSWC Crane) 812/854-2382 812/854-1107 [email protected] Karim Tatah Cray 715-726-4678 [email protected] Stu Bush Dow Corning 989-496-4129 [email protected] Jan DeGroot Dow Corning 989-496-4764 [email protected] Subhotosh Khan Dupont 804/383-6092 [email protected] Gary Hendren Dupont [email protected] George White Georgia Tech 404/894-0514 404/894-3842 [email protected] Dale Murray WLGore 410-506-4369 410-506-4217 [email protected] Gregg Wildes WLGore 410/506-3628 410/506-3879 [email protected] Terry Fischer Hitachi 203/720-7525 203/720-7526 [email protected] Anthony Sanders Infineon [email protected] Gary Brist Intel 503/456-1246 503/456-1223 [email protected] Frank Libsch IBM Yorktown 914-945-3678 [email protected] Marc Taubenblatt IBM Yorktown 914-945-3819 [email protected] Bert Olffrein IBM Zurich [email protected] David Bergman IPC 847/790-5340 847/504-2340 [email protected] Dieter Bergman IPC 847/790-53339 [email protected] Reza Ghaffarian JPL 818/354-2059 818/393-5245 [email protected]

Optoelectronic Substrates Project Report 30

NAME COMPANY TELEPHONE FAX EMAIL Marty Rodriguez Jabil 727/803-3926 727/803-7429 [email protected] Donald J. Hayes MicroFab Tech., Inc [email protected] W. Royall Cox MicroFab Tech., Inc 972-578-8076 X18 972-423-2438 [email protected] Kurt Wachtler MicroFab Tech., Inc 972/578-8076 [email protected] Bob Lempkowski Motorola 847/538-9639 [email protected] Ron Gedney iNEMI [email protected] Dave Godlewski iNEMI [email protected] Dennis Fritz MacDermid 765-647-5766 765-647-0312 [email protected] Doug Trobough Merix 503/992-4395 [email protected] Harry Lucas Merix [email protected] John Stankus Nortel Networks 972-684-8823 [email protected] Larry Marcanti Nortel Networks 972-684-4135 [email protected] Rob Sheffield Nortel Canada 613/763-2537 613/393-2537 [email protected] Herman Kwong Nortel Networks 613-763-8576 613-765-0678 [email protected] L Gino Difilippo Nortel Networks 613-765-8593 613-765-5512 [email protected] Eric Montgomery Northrop Grumman 417-827-5470 [email protected] Dick Otte Promex [email protected] Bruce Booth Optical Cross Links 610-444-9469 [email protected] Silvio Bertling Park Nelco 480-967-5600 [email protected] Doug Leys Park Nelco 714/704-4466 [email protected] Yi Wei Park Nelco 714-738-7582 [email protected] Eric Bergum Polyclad Laminates 603/934-5226 603/934-5826 [email protected] Joe Fjelstad Silicon Pipe [email protected] Nancy Chiarotto Shipley 508/229-7644 508/229-0854 [email protected] Matthew Moynihan Shipley 508/229-7201 508/229-2473 [email protected] David Haas Sanmina-SCI Corp. 908/872-4359 [email protected] Jinsoo Kim Solectron 408/935-5890 408/956-6083 [email protected] Dave Mendez Solectron [email protected] Jennifer Nguyen Solectron [email protected] Theresa Sze Sun Microsystems 858-625-5047 858-526-9176 [email protected] John Lehman Teradyne 603 879-3334 [email protected] Bob Nurmi Taconic [email protected] Tom Sarnowski Tyco 001-516-624-8482 [email protected] M. Michele Nelson 3M 651/733-6038 651/736-8140 [email protected] Peter Sandborn U of Maryland 301-405-3167 [email protected] Matt Brown U.S. Conec [email protected] Mike Hughes U.S. Conec 828-267-6334 [email protected] Rick Clayton Consultant 613-291-6578 [email protected]

Optoelectronic Substrates Project Report 31

Bibliography from Project External Presentations by Project Team to Industry • Adam Singer at IPC APEX EXPO Conference, February 2004 • Peter Arrowsmith at IEEE High speed Workshop, Santa Fe, New Mexico, May 2004 • Peter Arrowsmith and Jack Fisher and Team at OIDA “Optical Interconnects “Thinking Inside the Box”, San Francisco, October 2004 • Adam Singer at APEX Expo Conference, February 2005 • Jack Fisher and Bruce Booth, at APEX Expo Conference, February 2006 • Jack Fisher at IEEE High speed Workshop, Santa Fe, New Mexico, May 2006

External Presentations Presented to Project Team • 03/28/02 – Matthew Moynihan, Shipley Inc., Optical Options for High Speed Interconnect in Printed Wiring Boards • 04/02/03 – Lee H. Ng Ph.D., Agilent Corp., Volume Photonics Manufacturing: But What Volume? • 09/30/02 – Theresa Sze, Sun Microsystems, Optical Interconnect Challenges in the Computer Backplane. • 07/10/03 – Eric Montgomery, Northrop Grumman, Optical / Electrical Technology Meeting.

Optoelectronic Substrates Project Report 32