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Assembly Language Programming: ARM Cortex-M3 Assembly Language Programming Assembly Language Programming ARM Cortex-M3 Vincent Mahout First published 2012 in Great Britain and the United States by ISTE Ltd and John Wiley & Sons, Inc. Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA. Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address: ISTE Ltd John Wiley & Sons, Inc. 27-37 St George’s Road 111 River Street London SW19 4EU Hoboken, NJ 07030 UK USA www.iste.co.uk www.wiley.com © ISTE Ltd 2012 The rights of Vincent Mahout to be identified as the author of this work have been asserted by him in accordance with the Copyright, Designs and Patents Act 1988. ____________________________________________________________________________________ Library of Congress Cataloging-in-Publication Data Mahout, Vincent. Assembly language programming : ARM Cortex-M3 / Vincent Mahout. p. cm. Includes bibliographical references and index. ISBN 978-1-84821-329-6 1. Embedded computer systems. 2. Microprocessors. 3. Assembler language (Computer program language) I. Title. TK7895.E42M34 2012 005.2--dc23 2011049418 British Library Cataloguing-in-Publication Data A CIP record for this book is available from the British Library ISBN: 978-1-84821-329-6 Printed and bound in Great Britain by CPI Group (UK) Ltd., Croydon, Surrey CR0 4YY Table of Contents Preface ........................................... ix Chapter 1. Overview of Cortex-M3 Architecture ................ 1 1.1.Assemblylanguageversustheassembler.................. 1 1.2.TheworldofARM............................... 2 1.2.1.Cortex-M3.................................. 3 1.2.2.TheCortex-M3coreinSTM32...................... 7 Chapter 2. The Core of Cortex-M3 ......................... 15 2.1.Modes,privilegesandstates.......................... 15 2.2.Registers..................................... 17 2.2.1.RegistersR0toR12............................ 19 2.2.2.TheR13register,alsoknownasSP................... 19 2.2.3.TheR14register,alsoknownasLR................... 20 2.2.4.TheR15orPCregister........................... 21 2.2.5.ThexPSRregister............................. 22 Chapter 3. The Proper Use of Assembly Directives ............... 25 3.1.Theconceptofthedirective.......................... 25 3.1.1.Typographicconventionsanduseofsymbols............. 26 3.2.Structureofaprogram............................. 27 3.2.1.TheAREAsections............................ 28 3.3.Asectionofcode................................ 29 3.3.1.Labels..................................... 29 3.3.2.Mnemonic.................................. 31 3.3.3.Operands................................... 32 3.3.4.Comments.................................. 34 3.3.5.Procedure................................... 35 vi Assembly Language Programming 3.4. The data section ................................. 36 3.4.1.Simplereservation............................. 36 3.4.2.Reservation with initialization ...................... 37 3.4.3.Datainitialization:thedevilisinthedetails.............. 39 3.5.Isthatall?..................................... 39 3.5.1.Memorymanagementdirectives..................... 40 3.5.2.Projectmanagementdirectives...................... 41 3.5.3.Variousandvarieddirectives....................... 44 Chapter 4. Operands of Instructions ........................ 47 4.1.Theconstantandrenaming........................... 48 4.2.Operandsforcommoninstructions...................... 49 4.2.1.Useofregisters............................... 49 4.2.2.Theimmediateoperand.......................... 53 4.3.Memoryaccessoperands:addressingmodes................ 57 4.3.1.Thepointerconcept............................ 58 4.3.2.Addressingmodes............................. 59 Chapter 5. Instruction Set ............................... 63 5.1.Readingguide.................................. 63 5.1.1.Listofpossible“condition”suffixes................... 65 5.2.Arithmeticinstructions............................. 66 5.3.Logicalandbitmanipulationinstructions.................. 70 5.4.Internaltransferinstructions.......................... 75 5.5.Testinstructions................................. 76 5.6.Branchinstructions............................... 77 5.7.Load/storeinstructions............................. 80 5.7.1.Simpletransfers............................... 80 5.7.2.Multiple transfers .............................. 82 5.7.3. Access to the system stack ........................ 84 5.8.“System”instructionsandothers....................... 85 Chapter 6. Algorithmic and Data Structures ................... 87 6.1.Flowchartversusalgorithm.......................... 87 6.2.Alternativestructures.............................. 89 6.2.1.Simple(orshortened)alternative..................... 89 6.2.2.Completealternative............................ 90 6.2.3.Specialcaseofthealternative...................... 93 6.2.4.Multiple choice ............................... 94 6.3.Iterativestructures................................ 98 6.3.1. The Repeat…Until loop .......................... 98 Table of Contents vii 6.3.2. The While…Do loop ............................ 102 6.3.3. The For… loop ............................... 105 6.4.Compound conditions.............................. 106 6.4.1.AlternativewithAND........................... 107 6.4.2.IterationwithAND............................. 108 6.4.3.AlternativewithOR............................ 109 6.4.4.IterationwithOR.............................. 110 6.5.Datastructure................................... 111 6.5.1.Tableinonedimension.......................... 111 6.5.2.Tables in multiple dimensions ...................... 112 6.5.3.Registration................................. 113 6.5.4.Non-dimensionaltable,characterstring................. 113 6.5.5.Queue..................................... 114 6.5.6.Stack..................................... 115 Chapter 7. Internal Modularity ........................... 119 7.1.Detailing the concept of procedure ...................... 119 7.1.1.Simplecall.................................. 119 7.1.2.Nestedcalls................................. 119 7.1.3.“Redwire”example............................ 121 7.2.Procedurearguments.............................. 123 7.2.1.Usefulnessofarguments.......................... 123 7.2.2.Argumentsbyvalueandbyreference.................. 123 7.2.3.Passingargumentsbygeneralregisters................. 123 7.2.4.Passingargumentsbyastack....................... 126 7.2.5.Passingargumentsbythesystemstack................. 133 7.2.6.Ontheartofmixing............................ 136 7.3.Localdata..................................... 136 7.3.1.Simplereservationoflocaldata..................... 137 7.3.2.Usingachainedlist............................. 143 Chapter 8. Managing Exceptions........................... 147 8.1.WhathappensduringReset?.......................... 148 8.2.Possibleexceptions............................... 151 8.2.1.Traps..................................... 153 8.2.2.Interrupts................................... 159 8.3.Prioritymanagement.............................. 161 8.3.1.Prioritylevelsandsublevels....................... 162 8.3.2.Thenestedmechanism........................... 166 8.4.Entryandreturninexceptionprocessing.................. 167 8.4.1.Re-routing.................................. 167 8.4.2.Return..................................... 169 viii Assembly Language Programming 8.4.3. “Tail-chaining” and “Late-arriving” ................... 169 8.4.4.OtherusefulregistersfortheNVIC................... 170 Chapter 9. From Listing to Executable: External Modularity ........ 173 9.1. External modularity ............................... 175 9.1.1.Genericexample.............................. 175 9.1.2. Assembly by pieces ............................ 178 9.1.3. Advantages of assembly by pieces.................... 178 9.1.4.Externalsymbols.............................. 179 9.1.5. IMPORT and EXPORT directives .................... 181 9.2.Theroleoftheassembler............................ 182 9.2.1.Filesproducedbytheassembler..................... 183 9.2.2. Placement counters ............................. 185 9.2.3.Firstpass:symboltable.......................... 185 9.2.4.Secondpass:translation.......................... 186 9.2.5.Relocationtable............................... 187 9.3.Theroleofthelinker.............................. 188 9.3.1.Functioningprinciple........................... 188 9.3.2.Theproductsofthelinker......................... 190 9.4.Theloaderandthedebuggingunit...................... 196 Appendices ........................................ 199 Appendix A. Instruction Set – Alphabetical List ................. 201 Appendix B. The SysTick Timer ........................... 209 Appendix C. Example of a “Bootstrap” File.................... 217 Appendix D. The GNU Assembler .......................... 227 Bibliography ....................................... 239 Index ............................................ 241 Preface To be able to plan and write this type of book, you need a good work environment. In my case, I was able to benefit from the best working conditions for this enterprise. In terms of infrastructure and material, the Institut National de Sciences Appliquées de Toulouse,
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