Compact Modeling at Infineon

MOS-AK in Munich 2018-03-13

Klaus-Willi Pieper Modeling in Central Department MDL: Modeling ü Responsible for CMOS incl. embedded flash and RF technologies ü Technology assessment (together with other departments) ü Technology target setting (together with other departments) ü Modeling (nom / variations (MonteCarlo) / corner) ü MHC = model hardware correlation ü RF-modeling ü Noise-parameter ü BEOL-extraction (metallization parasitics) ü Preparation for design flow usage

Forward Reverse

VREV=-5.16V

VREV=-8.94V

VREV=-16.40V

VREV=-24.05V

VREV=-31.63V

S D symbols: measurements lines: simulations B

Compact Models NW1 › HiSIM-HV TS-H › BSIM3/4/SOI

› In radar technology group, together with technology and RF circuit design experts › Topics: – Active devices (SiGe HBTs: HICUM, BJT) – Passive devices: inductors, transformers, transmission Lines – Crosstalk mitigation, RF design methodology

Emitter

Base Contact Base

Collector

Data sheet Electro- simulations thermal Rth, Zth simulations

Impact of VP Roll-out fabrication on chip & tolerances module Topics projects

Transfer of Model models precision to new assessment L1 – L4 compact platforms models IGBT/diode

2.8 Age of Lucky-Electron 2.6 Model 2.4 1.00E+00-1.00E+01 1.00E-01-1.00E+00 2.2 1.00E-02-1.00E-01 2 1.00E-03-1.00E-02 1.8 1.00E-04-1.00E-03 1.00E-05-1.00E-04 VDS-Stress / V 1.6 ��=(�/�↓� )↑1/� 1/��↑�/� ��[− 1.00E-06-1.00E-05 1.4 �↓� /��↓� (1/� −1/�↓�� )] ∫0↑ 1.2 �↓�� ▒�↓�↑� /�↓�↑�−1 �� 1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VGS-Stress / V

CMC workgroup Reliability Equations is looking for candidates of aging equations for MOS, LDMOS and Bipolar. Effects like Hot Carrier Injection (HCI), Bias Temperature Instability (BTI), etc.