CNP: AN FPGA-BASED PROCESSOR FOR CONVOLUTIONAL NETWORKS Clement´ Farabet1, Cyril Poulet1, Jefferson Y. Han2, Yann LeCun1 (1) Courant Institute of Mathematical Sciences, New York University, (2) Perceptive Pixel Inc. 715 Broadway, New York, NY 10003, USA 111 8th Avenue, New York, NY 10011, USA fcfarabet,
[email protected] ABSTRACT programmable, and can implement any vision system in Convolutional Networks (ConvNets) are biologically- which the bulk of the computation is spent on convolutions inspired hierarchical architectures that can be trained to per- with small-size kernels. The design is specifically geared form a variety of detection, recognition and segmentation towards Convolutional Networks [1, 2], but can be used for tasks. ConvNets have a feed-forward architecture consisting many similar architectures based on local filter banks and of multiple linear convolution filters interspersed with point- classifiers, such as HMAX [3, 4], and HoG methods [5]. wise non-linear squashing functions. This paper presents an Convolutional Networks (ConvNets) are feed-forward ar- efficient implementation of ConvNets on a low-end DSP- chitectures composed of multiple layers of convolutional fil- oriented Field Programmable Gate Array (FPGA). The im- ters, interspersed with point-wise non-linear functions [1, 2]. plementation exploits the inherent parallelism of ConvNets ConvNets are used in several commercial and experimen- and takes full advantage of multiple hardware multiply- tal applications, including video surveillance, OCR [2], accumulate units on the FPGA. The entire system uses a face/person detection [6, 7], object recognition [8], and single FPGA with an external memory module, and no ex- robot navigation [9, 10]. Because they can easily be trained tra parts.