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Design of Microwave Low-Noise Amplifiers in a Sige Bicmos Process

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Design of Microwave Low-Noise Amplifiers in a Sige Bicmos Process Design of microwave low-noise amplifiers in a SiGe BiCMOS process Martin Hansson Reg nr: LiTH-ISY-EX-3347-2003 Linköping 2003 Design of microwave low-noise amplifiers in a SiGe BiCMOS process Master Thesis Division of Electronic Devices Department of Electrical Engineering Linköping University, Sweden Martin Hansson Reg nr: LiTH-ISY-EX-3347-2003 Supervisor: Robert Malmqvist Examiner: Christer Svensson Linköping, Jan 23, 2003 Avdelning, Institution Datum Division, Department Date 2003-01-23 Institutionen för Systemteknik 581 83 LINKÖPING Språk Rapporttyp ISBN Language Report category Svenska/Swedish Licentiatavhandling ISRN LITH-ISY-EX-3347-2003 X Engelska/English X Examensarbete C-uppsats Serietitel och serienummer ISSN D-uppsats Title of series, numbering Övrig rapport ____ URL för elektronisk version http://www.ep.liu.se/exjobb/isy/2003/3347/ Titel Design av mikrovågs lågbrusförstärkare i en SiGe BiCMOS process Title Design of microwave low-noise amplifiers in a SiGe BiCMOS process Författare Martin Hansson Author Sammanfattning Abstract In this thesis, three different types of low-noise amplifiers (LNA’s) have been designed using a 0.25 mm SiGe BiCMOS process. Firstly, a single-stage amplifier has been designed with 11 dB gain and 3.7 dB noise figure at 8 GHz. Secondly, a cascode two-stage LNA with 16 dB gain and 3.8 dB noise figure at 8 GHz is also described. Finally, a cascade two-stage LNA with a wide-band RF performance (a gain larger than unity between 2-17 GHz and a noise figure below 5 dB between 1.7 GHz and 12 GHz) is presented. These SiGe BiCMOS LNA’s could for example be used in the microwave receivers modules of advanced phased array antennas, potentially making those more cost- effective and also more compact in size in the future. All LNA designs presented in this report have been implemented with circuit layouts and validated through simulations using Cadence RF Spectre. Nyckelord Keyword LNA, low-noise, amplifiers, SiGe, BiCMOS, microwave, MMIC, RFIC Abstract Abstract In this thesis, three different types of low-noise amplifiers (LNA’s) have been designed using a 0.25 µm SiGe BiCMOS process. Firstly, a single-stage ampli- fier has been designed with 11 dB gain and 3.7 dB noise figure at 8 GHz. Secondly, a cascode two-stage LNA with 16 dB gain and 3.8 dB noise figure at 8 GHz is also described. Finally, a cascade two-stage LNA with a wide-band RF performance (a gain larger than unity between 2-17 GHz and a noise figure below 5 dB between 1.7 GHz and 12 GHz) is presented. These SiGe BiCMOS LNA’s could for example be used in the microwave receivers modules of advanced phased array antennas, potentially making those more cost-effective and also more compact in size in the future. All LNA designs presented in this report have been implemented with circuit layouts and validated through simulations using Cadence RF Spectre. i Design of microwave low-noise amplifiers in a SiGe BiCMOS Process ii Acknowledgements Acknowledgements This master thesis describes work carried out in collaboration between the Department of Electrical Engineering at Linköping University (LiU) and the Department of Microwave Technology at the Swedish Defence Research Agency (FOI) in Linköping. First of all I would like to thank my supervisor Dr. Robert Malmqvist and also Prof. Aziz Ouacha, Andreas Gustavsson and Mattias Alfredsson all at FOI, for help and valuable comments on my work, and their guidance throughout this project. I would also like to sincerely thank Stefan Andersson at LiU for all the time he spent teaching me Cadence Cad Tools, and for all valuable comments concerning the topic. I would also like to thank all co-workers at FOI, for making these months of work a very interesting and fun time. I also thank my family and friends for all their support. iii Design of microwave low-noise amplifiers in a SiGe BiCMOS Process iv Table of contents Table of contents 1 Introduction .....................................................................................1 1.1 Background................................................................................1 1.2 Outline of this thesis...................................................................1 1.3 Terminology ...............................................................................2 2 RF and Microwave fundamentals ..................................................3 2.1 Scattering Parameters ...............................................................3 2.1.1 Definition .......................................................................................... 3 2.2 Matching ....................................................................................4 2.3 Noise..........................................................................................5 2.3.1 Theory ............................................................................................... 5 2.3.2 Noise in cascaded systems ................................................................ 6 2.4 Principle of emitter degeneration ...............................................7 2.5 Stability ......................................................................................8 2.6 Large Signal Behaviour..............................................................8 2.6.1 Compression point............................................................................. 9 2.6.2 Intermodulation point........................................................................ 9 3 Background ...................................................................................11 3.1 Application in mind...................................................................11 3.2 High frequency integrated circuit technologies ........................11 3.3 Problem and specification........................................................13 3.3.1 Target specification.........................................................................13 4 Previous work................................................................................15 4.1 Previously presented LNA results............................................15 4.2 Common source/emitter single-stage ......................................15 4.3 Cascoded common source/emitter single-stage......................16 4.4 Cascoded common source/emitter dual-stage.........................16 4.5 Wide band single-stage ...........................................................17 4.6 Two-stage common emitter .....................................................18 5 Process technology description..................................................19 5.1 Technology description ............................................................19 5.2 Transistor choice......................................................................20 5.3 Comments on inductors ...........................................................21 v Design of microwave low-noise amplifiers in a SiGe BiCMOS Process 5.4 Resistor choices.......................................................................22 5.5 Capacitor choices ....................................................................23 5.6 DC and RF pads ......................................................................23 6 Design and Circuit Simulation .....................................................25 6.1 Simulation issues .....................................................................25 6.2 Circuit topologies .....................................................................25 6.2.1 Single-stage CE amplifier ...............................................................25 6.2.2 Two-stage CE cascoded amplifier ..................................................30 6.2.3 Two-stage CE wide-band amplifier ................................................34 6.2.4 Wideband single stage amplifier.....................................................40 7 Layout and Simulations................................................................43 7.1 Bias and RF connections .........................................................43 7.2 Parasitic effects........................................................................44 7.3 Implemented circuits ................................................................45 7.4 Circuit layouts ..........................................................................45 7.4.1 Single-stage CE amplifier ...............................................................45 7.4.2 Two-stage CE cascoded amplifier ..................................................47 7.4.3 Two-stage CE wide-band amplifier ................................................48 7.5 Simulated results .....................................................................49 7.5.1 Single-stage CE amplifier ...............................................................49 7.5.2 Two-stage CE cascoded amplifier ..................................................52 7.5.3 Two-stage CE wide-band amplifier ................................................55 7.6 Some additional comments on inductors .................................58 8 Conclusions and future work.......................................................61 8.1 Conclusions .............................................................................61 8.2 Future work ..............................................................................62 9 References.....................................................................................63 Appendix I.............................................................................................65 Appendix II............................................................................................69
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