10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip (ReCoSoC 2015)

Program Book , 29 June – 1 July 2015 Sponsor: >> Dear participants,

Welcome to Bremen and to the International Symposium on Reconfigurable Communi- cation-Centric Systems-on-Chip.

This year marks the 10th edition of ReCoSoC Technical Sponsor: and we are thrilled to celebrate this milestone event with you! Please join me in congratu- lating both the steering committee and our research community for their outstanding efforts in pushing the research on Reconfigu- rable and Communication-Centric Systems- on-Chip. What started out as a DFG-founded workshop has now become a major interna- tionally-recognised symposium and we are delighted to welcome participants not only Partners: from Germany and France, but from all over the world.

Science is based on interaction, and the informal and dynamic philosophies of ReCoSoC have been key ingredients in each edition for boosting this scientific interaction. In this edition we have created a number of opportunities for exchanging ideas beyond the scientific schedule: the welcome recep- tion, the guided walk and the banquet dinner. The event details are listed on the following pages – check it out!

Although each of us has double the number of gray hairs – we would do it all over again. It truly was fun to work with friends on this project. Finally, our sincere thanks go to the Imprint Technical Program Committee and to the Local Organizers, for their dedication and 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015) commitment to make this symposium a suc- Editor: Kerstin Janssen cess story. Layout & Cover: Sabrina Goretzki, Universität Bremen Print: Universität Bremen We very much hope that you will enjoy this Pictures: BTZ Bremer Touristik-Zentrale conference and your stay in Bremen.

2 3 Committee Members Steering Committee

General Chair Gilles Sassatelli (LIRMM-CNRS, France) Alberto García-Ortiz Manfred Glesner (TU Darmstadt, Germany) (ITEM / IDS - , Germany) Leandro Soares Indrusiak (University of York, UK) Organization Chair Thomas Hollstein (Tallinn TU, Estonia) Daniel Gregorek (University of Bremen, Germany) Lionel Torres (LIRMM-CNRS, France) Program Chairs Michel Robert (LIRMM-CNRS, France) Eduardo de la Torre (Technical University of Madrid, Spain) Peter Zipf (Univ. Kassel, Germany) Juha Plosila (University of Turku, Finland) Michael Huebner (Univ. Bochum, Germany) Publicity Chairs Juergen Becker (ITIV, KIT, Germany) Diana Göhringer (University of Bochum, Germany) Guy Gogniat (LabStiCC - Univ Brittany, France) Ricardo Reis (UFRGS, Brazil) Local Organization Kerstin Janssen (University of Bremen, Germany)

Special Sessions Chairs

Reconfigurable Architectures for Big Data and Data Analytics Prof. Pionteck, University of Lübeck (DE) Sven Groppe, University of Lübeck (DE)

Design and Verification of Long Term Autonomous Systems Prof. Drechsler, University of Bremen (DE) Robert Wille, University of Bremen/DFKI (DE)

Energy Efficient Reconfigurable Many-Core Systems Hannu Tenhunen, KTH Royal Institute of Technology (Sweden) Zhonghai Lu, KTH Royal Institute of Technology (Sweden) Pasi Liljeberg, University of Turku (Finland) Amir-Mohammad Rahmani, University of Turku (Finland)

4 5 >> MONDAY

Technical Program Committee 08:45 09:15 Registration 09:15 09:30 Welcome message

09:30 10:30 Keynote session Pascal Benoit Loic Lagadec Koen Bertels Heiner Litz Dr. Cédric Lichtenau Lilian Bossuet Vagelis Mariatos Beyond many-cores: Commercial workload acceleration in high-end systems Vassilios Chouliaras Fernando Moraes Eduardo Delatorre Jari Nurmi 10:30 10:45 Coffee break Jean-Luc Dekeyser Luciano Ost Peeter Ellervee Sebastien Pillement 10:45 12:00 Session 1. Abdoulaye Gamatie Juha Plosila Reconfigurable and Self-Adaptive Systems Alberto Garcia-Ortiz Ricardo Reis Byron Navas, Ingo Sander and Johnny Öberg Diana Goehringer Achim Rettberg Towards Cognitive Reconfigurable Hardware: Guy Gogniat Alfredo Rosado-Muñoz Self-Aware Learning in RTR Fault-Tolerant SoCs Sergei Gontscharov Marcodomenico Santambrogio Alfonso Rodriguez, Juan Valverde, César Castañares, Daniel Gregorek Gilles Sassatelli Jorge Portilla, Eduardo de La Torre and Teresa Riesgo. Jan Haase Tiberiu Seceleanu Execution Modeling in Self-Aware FPGA-Based Jim Harkin Kostas Siozios Architectures for Efficient Resource Management Dominic Hillenbrand Marc Stöttinger Charlotte Frenkel, Jean-Didier Legat and David Bol Thomas Hollstein Dirk Stroobandt A Partial-Reconfiguration-Based Scheme to Miti- Michael Huebner Wim Vanderbauwhede gate Multiple-Bit Upsets for FPGAs in Low-Power Leandro Indrusiak Marian Verhelst Space Applications Gert Jervan Nikolaos Voros Athanasios Kakarountas Hans-Joachim Wunderlich 12:00 13:30 Lunch Chrysovalantis Kavousianos Peter Zipf 13:30 15:00 Special Session SS1. Design and Verification of Long Term Autonomous Systems Embedded Keynote: Sergio Montenegro Design to Survive Invited Talk: Rolf Drechsler, Goerschwin Fey, Rainer Koschke, Wolfgang Nebel A Vision for the Design of Long-Term Autonomous Systems Rolf Drechsler, Martin Fränzle and Robert Wille Envisioning Self-Verification of Electronic Systems

15:00 15:30 Coffee Break

6 7 Demo session

W. Büter, A. García-Ortiz , A. Ali, S. Mahmood, 15:30 16:45 Session 2. S. Arefin, V. V. ParsiSreenivas, R. B. Bergmann Taming Power and Temperature A Framework for the Emulation and Prototyping Sobhan Niknam, Arghavan Asad, Mahmood Fathy and Amir-Mohammad Rahmani of Nano-Photonic Optical Accelerators Energy Efficient 3D Hybrid Processor-Memory Architecture for the Dark Silicon Age Marcel Eckert, Dominik Meyer, Jan Haase, Bernd Klauer Elisabeth Glocker, Qingqing Chen, Asheque M. Zaidi, ASoC-Framework Aiming at Dynamic, ISA- Ulf Schlichtmann and Doris Schmitt-Landsiedel Emulation of an ASIC Power and Temperature heterogeneous Multicore-Computers Monitor System for FPGA Prototyping Lukas Gerlach, Guillermo Payá-Vayá, and Holger Wolfgang Büter, Yanqiu Huang, Daniel Gregorek Blume and Alberto Garcia-Ortiz FPGA-Based Rapid Prototyping for Exploring A Decentralised, Autonomous, and Congesti- on-Aware Thermal Monitoring Infrastructure for and Optimizing Hearing Aid Processors Photonic Network-on-Chip Khalid Latif, Roman Ursu, Charles Effiong, Leonardo 16:45 17:00 Demo preparation / Small break Zordan, Abdoulaye Gamatie, Gilles Sassatelli, Luciano Ost, Piotr Dziurzanski and Leandro Indrusiak 17:00 19:00 Demos evening Automotive Multi-Core System Design Exploration Framework in DreamCloud European project

Javier Mora, Eduardo de la Torre and Teresa Riesgo Fast evolvable systolic array for real time video processing

Guillermo Payá-Vayá, Lukas Gerlach, Rochus Nowosielski, and Holger Blume FLINT: Layout-Oriented FPGA-Based Methodo- logy for Fault Tolerant ASIC Design

Alfonso Rodriguez, Juan Valverde, Cesar Castañares, Jorge Portilla, Eduardo de la Torre and Teresa Riesgo Energy vs Speed vs Fault Tolerance Tradeoffs in an FPGA Architecture for Multiple Multithreaded Hardware Accelerators with Dynamic Adaptation

Luca Sterpone VERI-Place: analysis and mitigation of radiation effects on aerospace reconfigurable systems

8 9 >> TUESDAY

09:00 10:30 Special Session SS2. 14:50 15:15 Poster Pitch 1 Reconfigurable Architectures for Marco Antonio Zanata Alves, Paulo Santos, Big Data and Data Analytics Matthias Diener and Luigi Carro Invited Talk: Dr. Christian De Schryver Reconfigurable Vector Extensions inside the DRAM Towards Run-Time Flexible Risk Management Wolfgang Büter, Daniel Gregorek, Systems on Hybrid Platforms Alberto Garcia-Ortiz and Awais Ahmed Dennis Heinrich, Stefan Werner, Marc Stelzner, Predictable Photonic Interconnects using an Auto- Christopher Blochwitz, Thilo Pionteck and Sven Groppe nomous Channel Management and a TDMA-NoC Hybrid FPGA Approach for a B+ Tree in a Semantic Thomas Hollstein, Siavoosh Payandeh Azad, Web Database System Thilo Kogge and Behrad Niazmand Stefan Werner, Dennis Heinrich, Jannik Piper, Mixed-Criticality MPSoC Partitioning based on Sven Groppe, Rico Backasch, Christopher Blochwitz the NoCDepend Dependability Technique and Thilo Pionteck Fynn Schwiegelshohn, Lars Girke and Michael Huebner Automated Composition and Execution of FPGA-Based Traffic Sign Detection for Automotive Hardware-Accelerated Operator Graphs Camera Systems

10:30 11:00 Coffee Break 15:15 16:00 Coffee Break and Poster Session 1 11:00 12:15 Session 3. 16:00 17:15 Special Session SS3. Networks on Chip Energy Efficient Reconfigurable Martha Johanna Sepulveda, Daniel Florez, Satuajit Das Many-Core Systems and Guy Gogniat Karim M. A. Ali, Rabie Ben Atitallah, Jean-Luc Dekeyser Reconfigurable Security Architecture for disrupted and Nizar Fakhfakh protection zones in NoC−Based MPSoCs Using Hardware Parallelism for Reducing Power Yunfeng Ma and Leandro Indrusiak Consumption in Video Streaming Applications Hardware-accelerated Response Time Analysis Robin Bonamy, Sébastien Bilavarn and Fabrice Muller for Priority-Preemptive Networks-on-Chip An Energy-Aware Scheduler for Dynamically Pietro Saltarelli, Behrad Niazmand, Ranganathan Reconfigurable Multi-Core Systems Hariharan, Jaan Raik, Gert Jervan and Thomas Hollstein Parham Haririan and Alberto Garcia-Ortiz Automated Minimization of Concurrent Online A Framework for Hardware-Based DVFS Manage- Checkers for Networks-on-Chip ment in Multicore Mixed-Criticality Systems

12:15 14:00 Lunch 18:00 19:00 Stroll along the Weser 14:00 14:50 Session 4. 19:00 22:30 Banquet Evening Bioinspired systems Mehdi Modarressi, Arash Firuzan and Masoud Daneshtalab A Reconfigurable Network-on-Chip for Efficient Implementation of Neural Networks Javier Mora, Andrés Otero, Eduardo de La Torre and Teresa Riesgo Fast and Compact Evolvable Systolic Arrays on Dynamically Reconfigurable FPGAs 10 11 >> WEDNESDAY

09:00 10:15 Session 5. Social Event More secure and flexible architectures Timm Friedrich and Kurt Ackermann Banquet Evening A Flexible Co-Processing Approach for SoC-FPGAs Tuesday, 30 June 2015 based on Dynamic Partial Reconfiguration and Bitstream Relocation Methods After a long day indoors we would like to invite you Remy Druyer, Lionel Torres and Pascal Benoit to a stroll alongside the river Weser. In less than 60 A Survey on Security Features in Modern FPGAs minutes we will arrive relaxed and hungry to enjoy a Osvaldo Navarro hearty BBQ, cold drinks and further conversations Configurable Cache Tuning with a Victim Cache at the Restaurant Jürgenshof. For those who prefer more time in the hotel: public transportation is an 10:15 10:45 Poster Pitch 2 option: take tram 3 direction Weserwehr, tram-stop: Stefan Gehrer and Georg Sigl Stader Str./Hamburger Str., or take a taxi. Please Using the Reconfigurability of Modern FPGAs for contact the conference-organizers for directions. In Highly Efficient PUF-Based Key Generation the unlikely case of rain, there will be no walk and Luca Sterpone, Boyang Du, Lorenzo Venditti and David transportation will be organized. Merodio Codinachs On the Design of Highly Reliable System-on-Chip For the way back into town a bus is waiting for us at with Dynamic Reconfigurable FPGAs 10:30 pm. Please do not miss it! Zahra Shirmohammadi and Seyed Ghassem Miremadi S2AP:An Efficient Numerical-based Crosstalk Avoi- We hope you will enjoy a mild summer‘s night festivity. dance Code For Reliable Data Transfer of NoCs Amalin Prince and Vineeth Kartha A Framework for Remote and Adaptive Partial Reconfiguration of SoC Based Data Acquisition Systems Under Linux

10:45 11:30 Coffee Break and Poster Session 2

11:30 12:30 Panel discussion The next 10 years of ReCoSoC

12:30 12:45 Closing session

12:45 14:00 Lunch snack

14:00 14:45 Xilinx talk High level synthesis and invitation to the Xilinx workshop

12 13 Discover Bremen

Sunday night

A casual place to finish the day is the Restaurant “Wohnküche”, just a few steps away (follow the river Weser direction Weser-Tower/tall building in the west) if you are staying at the Motel One.

Monday night

We do have a few suggestions how to make the most of your time in Bremen after the Congress:

Guided Tour (limited to 25 people) Join our guided city walk and explore Bremen´s special attractions. Find out about Bremen, its buil- dings, history and people. Meeting point is 7 pm outside the conference hall, at the stairs. The tour lasts approx. 60 minutes and ends at the , a perfect spot to enjoy dinner.

Or discover Bremen by yourself: Böttcherstreet and -Quarter are must-sees when in Bremen. If you fancy just a short walk, looking for narrow roads, old buildings and nice souvenirs, this is what you should go for.

Always a good choice: Schlachte, the Weser Esplanade, is where Bremeners go to relax and treat themselves to an after-work drink. Why not join them?

No matter what you decide to do: we suggest to check out the menu at Camarillo or if you prefer Southern German food: Paulaner‘s.

Please be aware that no tables have been reserved. Monday nights should be quiet enough for everybody to find a table.

14 15 Access to the Wireless Internet

We provide WiFi for you, being guest of the ReCo- SoC. No additional software needs to be added to your notebook, just follow a few simple steps:

1. Connect to WIFI with SSID “ITEM”.

2. Securitytyp: „WPA2-Personal/PSK“ and key: „item2015“

3. Open ports are http: port 80 and https: port 443

The building we are in today was build in 1538, the chamber of commerce is using it since 1849. We do appologize for any inconvenience regarding the inter- net speed and comfort, the ancient building takes its toll and is only slowly adapting to our modern times.

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ß ei H e ße r Kirchweg D G a ßba g Rewe a tr o eßa s s s tr 18 tf R r a 19 e au st ß P ld n rt e e s se e t t i ll Werderseeufer e ra ne e r ß G G -W e e g weg e aß e Ella i tr w ss s ch - k e ir ße S rc ß K a B tr eßa a tr a Yo tr s u ße ß rt r S g ch n a e e u t tr e hs e r ge ß c m w B ne w -S a abßo u e h t ah g r k ß rc t er a t n a i o H t S e i r K r y - t s R Br s H re n aß r t e r e e u -F t d kne s i eg c v rt e n n aw ta e aß a g w B Ann g k ll e e s e tr N e ös e u M s w c l - G s ge h w r G u h u s d i c Grundschule n ei d ir g e d i u K sg n r a w e f e l am Buntentorsteinweg u t C ge r t ß e d ß W ße o a in a tr ße ra str G t b e n -S a s g r ie tr n e e g s ld s n H aw b r in V e a L L f e a Lo d m r o Netto n n h d e a ä e r T Penny g e W n a h N e b w e a ß e d W a r e e - r g ß in t g g h e ts s ra Gartenstadt h cir ß s t t a a i ra s rs-Straß u le e ß n h e s d tr g K ß e h Süd e e e -S e Ja F r i s w ra - S r h h t h tr F c c s ci aß ri ir ck r n K e in e i Ti e H e H t- ß ß s ra T a t h r u s e t g lig o S u il d - o s A W r- b S r to e r L m l- er - r k S a ßa e c t K ma ra tr m ß g gs e Rosenpfad H e e lili ß Da ab nw ra m en e W st A ah g el r u e ank g e se w r le B k r D lz F h u A c e eg c a ic o w n m h h t S t rk d e S e g i e ß i n D e B t e mm ls ra t a w l t b o a s F e s e m r ö B n r D Ganztagsgrundschule ie n n s m m e r a K r t A s o u e a m t m r i l ge e k n t n c an der e l e k t g w o s w B 6 ge s e t n e e w V r w e Karl-Lerbs-Straße w i rs w a r n ge ße g h D ie e e irc re ili K D L At a glance

Monday 08:45 09:15 Registration 09:15 10:30 Keynote Session 10:30 10:45 Coffee break 10:45 12:00 Session 1 12:00 13:30 Lunch 13:30 15:00 Special Session 1 15:00 15:30 Coffee break 15:30 16:45 Session 2 16:45 17:00 Small break 17:00 19:00 Demos evening 19:00 Guided city walk

Tuesday 09:00 10:30 Special Session 2 10:30 11:00 Coffee break 11:00 12:15 Session 3 12:15 14:00 Lunch 14:00 14:50 Session 4 14:50 15:15 Poster Pitch 15:15 16:00 Coffee break and Poster Session 1 16:00 17:15 Special Session 3 18:00 19:00 Stroll along the Weser 19:00 22:30 Banquet Evening

Wednesday 09:00 10:15 Session 5 10:15 10:45 Poster Pitch 2 10:45 11:30 Coffee break and Poster Session 2 11:30 12:30 Panel discussion 12:30 12:45 Closing session 12:45 14:00 Lunch snack 14:00 14:45 Xilinx talk