DOCSLIB.ORG

Intel Pentium III Processor

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Intel Pentium III Processor Intel® Pentium® III Processor – Low Power/440BX AGPset Design Guide December 2002 Order Number: 273532-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Intel® Pentium® III Processor – Low Power/440BX AGPset, 82443BX Host Bridge/Controller, and 82371EB PCI-to-ISA/IDE Xcelerated Controller may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. AlertVIEW, AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Connect, CT Media, Dialogic, DM3, EtherExpress, ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Create & Share, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, Intel XScale, IPLink, Itanium, LANDesk, LanRover, MCS, MMX, MMX logo, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, RemoteExpress, Shiva, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside., The Journey Inside, TokenExpress, Trillium, VoiceBrick, Vtune, and Xircom are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © Intel Corporation, 2002 2 Design Guide Contents Contents 1.0 Introduction .............................................................................................................................11 1.1 Key Terms ..........................................................................................................................11 1.2 Overview.............................................................................................................................11 1.3 Related Documents ............................................................................................................13 2.0 Design Features .....................................................................................................................15 2.1 Intel® Pentium® III Processor – Low Power .......................................................................15 2.2 Intel® 440BX AGPset..........................................................................................................15 2.2.1 System Bus Interface.............................................................................................16 2.2.2 DRAM Interface .....................................................................................................16 2.2.3 Accelerated Graphics Port Interface......................................................................16 2.2.4 PCI Interface..........................................................................................................16 2.2.5 System Clocking ....................................................................................................16 2.3 PCI ISA IDE Xcelerator (PIIX4E) ........................................................................................17 3.0 System Bus Guidelines.......................................................................................................19 3.1 Definitions ...........................................................................................................................19 3.2 Recommended Low Power GTL+ Design Guideline ..........................................................22 3.2.1 Components ..........................................................................................................22 3.2.2 Initial Timing Analysis ............................................................................................22 3.2.3 Determine General Layout, Routing and Topology................................................24 3.2.4 Estimate Component to Component Spacing for Low Power GTL+ Signals .................................................................................25 3.3 Simulation ...........................................................................................................................26 3.3.1 Overview................................................................................................................26 3.3.2 Extract Interconnect Information............................................................................26 3.3.3 Run Simulations.....................................................................................................26 3.4 Summary of System Design Guidelines .............................................................................27 3.5 Timing Diagram for Processor Side Bus.............................................................................28 4.0 Memory Guidelines...............................................................................................................29 4.1 100 MHz SDRAM Interface Overview ................................................................................29 4.1.1 SDRAM Signal Description....................................................................................30 4.1.2 SDRAM Signal Connectivity ..................................................................................31 4.1.3 Pin Groups.............................................................................................................31 4.1.4 Single Set DRAM Interface....................................................................................32 4.2 General SDRAM Layout Guidelines ...................................................................................32 4.2.1 SO-DIMM Connection to SDRAM..........................................................................32 4.3 Trace Lengths for Three or Two SO-DIMM Designs ..........................................................34 4.3.1 MD[63:0] Signals ...................................................................................................34 4.3.2 DQMA[7:0] Signals ................................................................................................35 4.3.3 Chip Select Signals - CSA[5:0] ..............................................................................36 4.3.4 Clock Enable Signals - CKE[5:0] ...........................................................................36 4.3.5 Command Signals - MAB[13:0]x, WEA#, SRASA#, and SCASA ..........................37 4.4 SODIMM DRAM Organization ............................................................................................38 4.4.1 SDRAM System Examples ....................................................................................39 4.5 SO-DIMM Placement Options ............................................................................................40 Design Guide 3 Contents 5.0 Clocking Guidelines ............................................................................................................. 43 5.1 Clocking System Overview ................................................................................................. 43 5.2 Clock Synthesizer Pinout and Specifications...................................................................... 44 5.3 Timing Guidelines............................................................................................................... 45 5.4 Host Clock Layout Guidelines............................................................................................. 46 5.5 SDRAM Clock Layout Guidelines....................................................................................... 47 5.5.1 General Clocking Guidelines ................................................................................. 47 5.5.2 SDRAM Clock Layout Guidelines .......................................................................... 48 5.5.3 DCLKWR Layout Guidelines ................................................................................. 50 5.6 PCI/AGP Clock Layout Guidelines ....................................................................................
Load more

Recommended publications
  • Design and Implementation of Pentium-M Based Floswitch for Intracluster Communication Veerappa Chikkagoudar, Dr
    Design and Implementation of Pentium-M Based Floswitch for Intracluster Communication Veerappa chikkagoudar, Dr. U. N. Sinha, Prof. B. L. Desai. [email protected], [email protected], [email protected] Department of Electronics and Communication B. V. Bhoomaraddi college of Engg. And Tech. Hubli-580031 Abstract: aero dynamical problems, [1].Since 1986, six Flosolver MK6 is a Parallel processing system, generations of Flosolver machine have evolved based on distributed memory concept and built namely Flosolver MK-1, MK-2, MK-3, MK-4, MK-5 around Pentium-III processors, which acts as and MK-6. processing elements (PEs). Communication Flosolver MK-6 is the latest of the parallel between processing elements is very important, computer based on 128 Pentium III processors which is done through hardware switch called (which act as processing elements, PEs) in 64 dual Floswitch. Floswitch supports both message processor boards each with 1GB RAM and 80 GB passing as well as message processing. Message HDD. It is essentially a distributed memory system. processing is a unique feature of Floswitch. A group of four Dual processor boards with a Floswitch and an optical module is a natural cluster. In existing MK-6 system, communication 16 such clusters form the system. Processing between PEs is done through the Intel 486-based elements (PEs) communicate through Floswitch (a Floswitch, which operates at 32MHz and has 32- communication switch) using PCI-DPM interface bit wide data path. The data transfer rate and card. Clusters communicate through Optical module. floating point computation of existing switch need to be increased.
    [Show full text]
  • Inside Intel® Core™ Microarchitecture Setting New Standards for Energy-Efficient Performance
    White Paper Inside Intel® Core™ Microarchitecture Setting New Standards for Energy-Efficient Performance Ofri Wechsler Intel Fellow, Mobility Group Director, Mobility Microprocessor Architecture Intel Corporation White Paper Inside Intel®Core™ Microarchitecture Introduction Introduction 2 The Intel® Core™ microarchitecture is a new foundation for Intel®Core™ Microarchitecture Design Goals 3 Intel® architecture-based desktop, mobile, and mainstream server multi-core processors. This state-of-the-art multi-core optimized Delivering Energy-Efficient Performance 4 and power-efficient microarchitecture is designed to deliver Intel®Core™ Microarchitecture Innovations 5 increased performance and performance-per-watt—thus increasing Intel® Wide Dynamic Execution 6 overall energy efficiency. This new microarchitecture extends the energy efficient philosophy first delivered in Intel's mobile Intel® Intelligent Power Capability 8 microarchitecture found in the Intel® Pentium® M processor, and Intel® Advanced Smart Cache 8 greatly enhances it with many new and leading edge microar- Intel® Smart Memory Access 9 chitectural innovations as well as existing Intel NetBurst® microarchitecture features. What’s more, it incorporates many Intel® Advanced Digital Media Boost 10 new and significant innovations designed to optimize the Intel®Core™ Microarchitecture and Software 11 power, performance, and scalability of multi-core processors. Summary 12 The Intel Core microarchitecture shows Intel’s continued Learn More 12 innovation by delivering both greater energy efficiency Author Biographies 12 and compute capability required for the new workloads and usage models now making their way across computing. With its higher performance and low power, the new Intel Core microarchitecture will be the basis for many new solutions and form factors. In the home, these include higher performing, ultra-quiet, sleek and low-power computer designs, and new advances in more sophisticated, user-friendly entertainment systems.
    [Show full text]
  • IBM Thinkpad Notebooks 1992 to 2001 - Withdrawn January 2001 - Version 214 IBM Thinkpad 240 - Withdrawn
    IBM PC Institute IBM Personal Systems Reference IBM ThinkPad Notebooks 1992 to 2001 - withdrawn January 2001 - Version 214 IBM ThinkPad 240 - withdrawn IBM ThinkPad Processor Intel Mobile Celeron 300, 366, or 400MHz1 / 66MHz system bus Processor features No upgrade / processor on Ball Grid Array (H-PBGA) L2 cache 128KB / onboard (full speed) / synchronous pipelined burst / ECC / write-back Diskette drive External 3.5" 1.44MB / connects to left side with FDD port / includes case and cable CD-ROM Option: External CD-ROM / via Portable Drive Bay and 24X-10X5 CD-ROM UltraslimBay Drive DVD-ROM Option: External DVD-ROM / via Portable Drive Bay and DVD-ROM UltraslimBay Drive Type-model ✂ 2609-21U ✂ 2609-31U ✂ 2609-41U Processor Celeron 300MHz Celeron 366MHz Celeron 400MHz Disk - size / ms 6.4GB4 / 13ms read / Ultra DMA/33 or PIO Mode 4 12.0GB / 12ms read / ATA-66 or PIO4 Preload (see side) Windows 987 Windows 987 SE Windows 987 SE Avail / withdrawn date June 1999 / February 2000 November 1999 / February 2000 February 2000 / February 2001 Display - size and type 10.4" TFT color (264.16mm) / Active Matrix Display - technology SVGA / 800x600 / 15ms refresh (typical) / 50 to 110 nits 16.7 million simultaneous colors / 250 to 1 contrast (typical) Graphics - controller NeoMagic MagicMedia128XD (NM2160C) / 128-bit accelerator / DDC2B / 2MB / SGRAM (embedded) / color space conversion Graphics - features Simultaneous LCD and CRT26 / 180 degree tilt / no multiple-monitor support / ext SVGA to 1024x768 with 65,536 colors Memory - std / max 64MB / 192MB33
    [Show full text]
  • The Microarchitecture of the Pentium 4 Processor
    The Microarchitecture of the Pentium 4 Processor Glenn Hinton, Desktop Platforms Group, Intel Corp. Dave Sager, Desktop Platforms Group, Intel Corp. Mike Upton, Desktop Platforms Group, Intel Corp. Darrell Boggs, Desktop Platforms Group, Intel Corp. Doug Carmean, Desktop Platforms Group, Intel Corp. Alan Kyker, Desktop Platforms Group, Intel Corp. Patrice Roussel, Desktop Platforms Group, Intel Corp. Index words: Pentium® 4 processor, NetBurst™ microarchitecture, Trace Cache, double-pumped ALU, deep pipelining provides an in-depth examination of the features and ABSTRACT functions of the Intel NetBurst microarchitecture. This paper describes the Intel® NetBurst™ ® The Pentium 4 processor is designed to deliver microarchitecture of Intel’s new flagship Pentium 4 performance across applications where end users can truly processor. This microarchitecture is the basis of a new appreciate and experience its performance. For example, family of processors from Intel starting with the Pentium it allows a much better user experience in areas such as 4 processor. The Pentium 4 processor provides a Internet audio and streaming video, image processing, substantial performance gain for many key application video content creation, speech recognition, 3D areas where the end user can truly appreciate the applications and games, multi-media, and multi-tasking difference. user environments. The Pentium 4 processor enables real- In this paper we describe the main features and functions time MPEG2 video encoding and near real-time MPEG4 of the NetBurst microarchitecture. We present the front- encoding, allowing efficient video editing and video end of the machine, including its new form of instruction conferencing. It delivers world-class performance on 3D cache called the Execution Trace Cache.
    [Show full text]
  • P2b User's Manual
    R P2B Pentium® II Motherboard USER’S MANUAL USER'S NOTICE No part of this manual, including the products and software described in it, may be repro- duced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means, except documentation kept by the purchaser for backup purposes, without the express written permission of ASUSTeK COMPUTER INC. (“ASUS”). ASUS PROVIDES THIS MANUAL “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OR CONDITIONS OF MERCHANTABILITY OR FITNESS FOR A PAR- TICULAR PURPOSE. IN NO EVENT SHALL ASUS, ITS DIRECTORS, OFFICERS, EMPLOYEES OR AGENTS BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDEN- TAL, OR CONSEQUENTIAL DAMAGES (INCLUDING DAMAGES FOR LOSS OF PROFITS, LOSS OF BUSINESS, LOSS OF USE OR DATA, INTERRUPTION OF BUSI- NESS AND THE LIKE), EVEN IF ASUS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES ARISING FROM ANY DEFECT OR ERROR IN THIS MANUAL OR PRODUCT. Product warranty or service will not be extended if: (1) the product is repaired, modified or altered, unless such repair, modification of alteration is authorized in writing by ASUS; or (2) the serial number of the product is defaced or missing. Products and corporate names appearing in this manual may or may not be registered trade- marks or copyrights of their respective companies, and are used only for identification or explanation and to the owners’ benefit, without intent to infringe. • Intel, LANDesk, and Pentium are registered trademarks of Intel Corporation. • IBM and OS/2 are registered trademarks of International Business Machines.
    [Show full text]
  • Versa 2700 Series Service and Reference Guide
    SOLD BY laptopia2005 DO NOT RESELL!! PROPRIETARY NOTICE AND LIABILITY DISCLAIMER The information disclosed in this document, including all designs and related materials, is the valuable property of NEC Computer Systems Division, Packard Bell NEC, Inc. (NECCSD, PBNEC) and/or its licensors. NECCSD and/or its licensors, as appropriate, reserve all pat- ent, copyright and other proprietary rights to this document, including all design, manufactur- ing, reproduction, use, and sales rights thereto, except to the extent said rights are expressly granted to others. The NECCSD product(s) discussed in this document are warranted in accordance with the terms of the Warranty Statement accompanying each product. However, actual performance of each such product is dependent upon factors such as system configuration, customer data, and operator control. Since implementation by customers of each product may vary, the suitability of specific product configurations and applications must be determined by the customer and is not warranted by NECCSD. To allow for design and specification improvements, the information in this document is subject to change at any time, without notice. Reproduction of this document or portions thereof without prior written approval of NECCSD is prohibited. NEC is a registered trademark, Versa is a U.S. registered trademark, VersaGlide, and PortBar are trademarks, and UltraCare is a U.S. registered service mark of NEC Corporation, used under license. FaxFlash is a service mark of NEC Computer Systems Division (NECCSD), Packard Bell NEC, Inc. All other product, brand, or trade names used in this publication are the property of their respective owners. Second Printing — November 1997 Copyright 1997 NEC Computer Systems Division, Packard Bell NEC, Inc.
    [Show full text]
  • Intel Xeon Processor Can Be Identified by the Following Values
    Intel® Xeon® Processor Specification Update December 2006 Notice: The Intel® Xeon® processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update. Document Number: 249678-056 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND/OR USE OF INTEL PRODUCTS, INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://developer.intel.com/design/litcentr. Intel®, the Intel® logo, Pentium®, Pentium® III Xeon™, Celeron, Intel® NetBurst™ and Intel® Xeon™ are trademarks or registered trademarks of Intel® Corporation or its subsidiaries in the United States and other countries.
    [Show full text]
  • IBM Thinkpad I Series Notebooks 1998 to 2002 - Withdrawn
    IBM PC Institute IBM Personal Systems Reference IBM ThinkPad i Series Notebooks 1998 to 2002 - withdrawn April 2002 - Version 237 IBM ThinkPad i Series 1721 - withdrawn IBM ThinkPad i Series 1721 Processor Intel Mobile Pentium II 300MHz1 / 66MHz system bus All-in-one design means Processor features No upgrade / processor, L2 cache, and MTXC (North Bridge) on Intel Mobile Module the disk, diskette drive, and L2 cache 512KB / sync pipelined burst / ECC / half speed DVD are all within the Diskette drive Internal 3.5" 1.44MB / removable from UltraBay FX / on right side / integrated with DVD covers of the notebook External FDD port None since diskette internal DVD 2X5 DVD-ROM / ATAPI / bootable / removable from UltraBay FX / on right side / integrated with diskette drive CD-ROM None supported (the DVD-ROM can use CD discs) Type - model 2627-721 Color depth UPC code 0-87944-47527-9 LCD External Monitor 4 8 Disk 5.4GB / 13ms read / 14ms write / S.M.A.R.T. / supports two internal disks Resolution TFT 60Hz 75Hz 85Hz Disk controller EIDE / PCI 2.1 / disk can be removed to upgrade by customer Avail / withdrawn date January 1999 / April 2002 640x480 16M 16M 16M 16M 800x600 16M 16M 16M 16M Display - size and type 14.1" TFT color / Active Matrix 1024x768 16M 16M 16M 16M Display - technology XGA / 640x480 or 800x600 or 1024x768 / 30ms / 120 nits 1280x1024 -- 256 -- -- 16.7 million simultaneous colors / 100 to 1 contrast ratio ratio Graphics - controller NeoMagic MagicMedia256AV (NM2200) / PCI 2.1 / 128-bit engine, 256-bit memory interface / DDC2B
    [Show full text]
  • 3. Das LPC-Interface 3.1
    PCTEC14 Seite 1 3. Das LPC-Interface 3.1. Grundlagen 3.1.1. Einsatzgebiet LPC = Low Pin Count Interface Specification (= “Interface mit geringer Anschlußzahl”). Das LPC-Interface ist ein synchroner Zeitmultiplex-Bus, an den vorzugsweise PC-typische “Standard- und Klein-Peripherie” angeschlossen werden soll. Das betrifft Floppy-Disk-Controller, Tastatur-Controller, Realzeituhr, Schnittstellen-Controller, Audio-Hardware, Systemverwaltungseinrichtungen usw. sowie ROM-Speicheranordnungen (für POST, BIOS, Systemverwaltung usw.). LPC ist ein Interface zwischen Schaltkreisen auf jeweils einer einzigen Leiterplatte (vorzugsweise: auf einem PC-Motherboard); Steckplätze (Slots) sind nicht vorgesehen. LPC soll den bisher als Schaltkreis-Interface verwendeten ISA- bzw. X-Bus ablösen (Abbildungen 3.1 bis 3.3). Die LPC-Spezifikation wurde von Intel entwickelt und 1997 erstmals veröffentlicht (sie ist im Internet zugänglich). Die Entwicklungsziele: # etwas Moderneres als den ISA- oder X-Bus, # beträchtliche Verringerung der Leitungs- und Anschlußzahlen (Kostensenkung), # funktionelle Abwärtskompatibilität zum ISA- bzw. X-Bus (LPC soll dieselben Zugriffe ausführen können: Speicherzugriffe, E-A-Zugriffe, DMA-Betrieb, Busmasterbetrieb, Unterstützung von Wartezuständen, Interruptsignalisierung), # Unterstützung des gesamten linearen Speicheradreßraums (4 GBytes), # Unterstützung von Sonderfunktionen und -betriebsarten (Stromsparsteuerung, Systemverwaltung), # synchrone Arbeitsweise, # Datenraten und Latenzzeiten in derselben Größenordnung wie beim ISA- bzw. X-Bus (LPC muß nicht “schneller” sein; eine Datenrate von 1...2 MBytes/s genügt vollkommen), # Unterstützung weiterer (moderner) Bussysteme (z. B. USB) ist nicht erforderlich (an ein LPC-Interface werden grundsätzlich keine USB-Controller o. dergl. angeschlossen). Abbildung 3.1 Herkömmliches Motherboard mit X-Bus (nach: Intel) Erklärung: Die in der Abbildung dargestellten Speicher- und E-A-Schaltkreise werden herkömmlicherweise direkt an den ISA- Bus oder an den X-Bus angeschlossen.
    [Show full text]
  • Pentium® III Processor Implementation Tradeoffs
    PentiumÒ III Processor Implementation Tradeoffs Jagannath Keshava and Vladimir Pentkovski: Microprocessor Products Group, Intel Corp. sense that the same sequence of operations can be ABSTRACT applied concurrently to multiple data elements. The This paper discusses the implementation tradeoffs of the Internet SSE allows us to express this parallelism explicitly, PentiumÒ III processor. The Pentium III processor but the hardware needs to be able to translate the implements a new extension of the IA-32 instruction set parallelism into higher performance. The P6 superscalar called the Internet Streaming Single-Instruction, Multiple- out-of-order microarchitecture is capable of utilizing Data (SIMD) Extensions (Internet SSE). The processor is explicit as well as extracted implicit parallelism. However, based on the PentiumÒ Pro processor microarchitecture. hardware that supports higher computation throughput improves the performance of these algorithms. The The initial development goals for the Pentium III processor development of such hardware and increasing its were to balance performance, cost, and frequency. utilization were key tasks in the development of the Descriptions of some of the key aspects of the SIMD Pentium III processor. Second, in order to feed the parallel Floating Point (FP) architecture and of the memory computations with data, the system needs to supply high streaming architecture are given. The utilization and memory bandwidth and hide memory latency. effectiveness of these architectures in decoupling memory accesses from computation, in the context of balancing the The implementation section of this paper contains details 3D pipe, are discussed. Implementation choices in some of some of the techniques we used to provide enhanced of the key areas are described.
    [Show full text]
  • Pentium III Processor Active Thermal Management Techniques
    Pentium® III Processor Active Thermal Management Techniques Application Note August 2000 Order Number: 273405-001 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Pentium® III processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placin g your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel's website at http://www.intel.com. Copyright © Intel Corporation, 2000 *Third-party brands and names are the property of their respective owners.
    [Show full text]
  • Dell Optiplex GX1 Small-Form-Factor System User's Guide
    Contents: Dell OptiPlex GX1 Small-Form-Factor System User's Guide Dell™ OptiPlex™ GX1 Small-Form-Factor System User's Guide Introduction Setup and Operation Using the System Setup Program Installing Upgrades Troubleshooting Specifications NOTE: You can obtain the latest version of this document from the Dell Web support site at http://support.dell.com. Model DCP Notes, Notices, and Cautions Throughout this guide, there may be blocks of text printed in bold type or in italic type. These blocks are notes, notices, and cautions, and they are used as follows: NOTE: A NOTE indicates important information that helps you make better use of your system. NOTICE: A NOTICE indicates either potential damage to hardware or loss of data and tells you how to avoid the problem. CAUTION: A CAUTION indicates a potentially hazardous situation which, if not avoided, may result in minor or moderate injury. Information in this document is subject to change without notice. © 1999–2000 Dell Computer Corporation. All rights reserved. Reproduction in any manner whatsoever without the written permission of Dell Computer Corporation is strictly forbidden. Trademarks used in this text: Dell, OptiPlex, Dimension, Inspiron, Latitude, DellWare, Dell OpenManage, and the DELL logo are trademarks of Dell Computer Corporation; Intel, Pentium, and LANDesk are registered trademarks and MMX is a trademark of Intel Corporation; Microsoft, MS-DOS, Windows, Windows NT, and DirectX are registered trademarks and Windows for Workgroups is a trademark of Microsoft Corporation; IBM and OS/2 are registered trademarks of International Business Machines Corporation; 3Com is a registered trademark of 3Com Corporation; VESA is a registered trademark of Video Electronics Standards Association.
    [Show full text]