SOLUTION GROWTH OF POLYCRYSTALLINE SILICON THIN FILMS ON GLASS SUBSTRATES FOR LOW-COST PHOTOVOLTAIC CELL APPLICATION
by
ZHENGRONG SHI, B.Sc, M.Sc
A thesis submitted to the University of New South Wales in fulfilment of the requirements for the degree of Doctor of Philosophy
February, 1992 UNIVEFTTY Or N.S.W. 2 2 JUL 1393
LIBRARIES To My Wife: Wei ACKNOWLEDGEMENT
I am indebted to Professor Martin A Green, my research supervisor, who has given me his invaluable academic guidance, financial assistance and encouragement during my thesis work.
Special thanks are given to Dr. Trevor L Young who has helped me to set up the experimental facility and to improve the fluency of the text, and Benjamin Chan who has helped to characterize the silicon thin film and the silicon thin film solar cells, and also Michael Taouk who has helped with some of the thin film silicon solar cell fabrication.
I also acknowledge the contribution of past and present members of the Centre for Photovoltaic Devices and Systems, particularly, Dr. Jurek Kurianski, Dr Stuart Wenham, Dr. Mark Gross, Dr. Soo Hong Lee, Steve Healy, Mike Willison, Ted Szpitalak, Mark Silver, John Willison, Shiqun Cai, Jenny Hansen, and the Electrical Engineering and Mechanical Engineering workshop staffs.
This work was supported by the Energy Research and Development Corporation of Australia and the New South Wales Department of Minerals and Energy. The Centre for Photovoltaic Devices and Systems is Supported by the Commonwealth Special Research Centre Scheme. ABSTRACT
The purpose of this thesis is to find an appropriate technique for depositing polycrystalline silicon thin film on glass substrates for low cost photovoltaic cell application. Solution growth has been chosen for such polycrystalline silicon deposition on glass substrates. Liquid phase epitaxial layers on both (111) and (100) oriented silicon wafers have been grown from A1 and Au based alloy solutions, in particular, Al/Ga, Al/Sn, Al/Zn, Au/Bi, Au/Pb, and Au/Sn. These alloys have higher silicon solubility below 600°C than solvents previously used. The crystal quality and electronic properties of the grown silicon thin films were characterized by a variety of methods such as microscopy, chemical etching and spreading resistance measurements. The aim of these experiments was to search for an appropriate solution for solution growth of silicon on dissimilar substrates. Graphoepitaxially grown (111) oriented silicon crystals have been demonstrated on patterned Si02 substrates. This technique can possibly be used to obtain oriented silicon thin films on glass substrates due to the similarity between Si02 and glass. Polycrystalline silicon thin films have been successfully deposited on glass substrates by various methods. The common feature of these methods was that a silicon rich surface, either amorphous or crystalline, had been created before silicon deposition. The silicon rich surface had two functions in silicon thin film growth on glass, namely, a) improving wettability between the solution and the glass; b) acting as a seeding layer for subsequent silicon thin film growth. Using the solution growth technique, thin film photovoltaic devices have been fabricated on various substrates, including single crystalline silicon, polycrystalline silicon, and glass. A computer modelling program, PC-ID, has been used to predict the performance of thin film silicon solar cells and to estimate the quality of silicon films by matching cell parameters with experimental cell output. Open circuit voltage exceeding 600 mV has been achieved from cells grown on single crystalline silicon substrates. CONTENT
Chapter One: Introduction
1.1 Silicon Solar Cells 1 1.2 Cost of Silicon Solar Cells 3 1.3 Thin Film Silicon Solar Cells 6 1.4 Current Status of Polycrystalline Thin Film Silicon Solar Cells 11 1.5 Technologies for Silicon Deposition on Dissimilar Substrates
1.5.1 Vapour Deposition 12 1.5.2 Recrystallization 15 1.5.3 Graphoepitaxy 16 1.5.4 Solution Growth of Silicon 16 1.6 Solution Growth as a Method for Si Deposition on Dissimilar Substrates 18 1.7 Purpose of the Thesis 21 1.8 References 22
Chapter Two: Mechanisms of Crystallization from Solution
2.1 Introduction 34 2.2 Supersaturation 34 2.3 Wetting 37 2.4 Nucleation 2.4.1 Homogeneous Nucleation 39 2.4.2 Heterogeneous Nucleation 40 2.4.3 Nucleation by Cavitation 44 2.5 Crystal Growth 45 2.6 Liquid Phase Epitaxy (LPE) 48
2.6.1 Phase Equilibria 49 2.6.2 LPE Growth Techniques 50 2.6.3 Segregation 54 2.7 Computer Simulation of Silicon LPE 56
2.8 References 65
Chapter Three: Liquid Phase Epitaxy of Silicon
3.1 Introduction 71 3.2 Solvent Selection 71 3.3 Growth Facilities 73 3.4 Sample Preparation 75 3.5 Alloy Solution Preparation 76 3.6 Experimental Procedure 77 3.7 Characterization of Thin Films 3.7.1 Surface Morphologies of Thin Films 79 3.7.2 Doping Properties of Silicon Epitaxial Layers 87 3.7.3 Quality Analysis of Silicon Thin Films 1. Chemical Etching 89 2. Composition Analysis 94 3.8 Applicability of the Solutions for Silicon Growth on Dissimilar Substrates 97
3.9 References 98 Chapter Four: Graphoepitaxy of Silicon
4.1 Introduction 104 4.2 Background Review 104 4.3 Mechanisms of Graphoepitaxy 106
4.4 Preparation of Relief Patterns on SiC>2 Substrates 108 4.5 Experimental 112
4.6 Random Nucleation of Silicon on SiC>2 Substrates 113
4.7 Silicon Crystals on Patterned SiC>2 Substrates 115 4.8 Analysis and Discussion 116 4.9 References 123
Chapter Five: Polycrystalline Silicon Thin Films on Glass Substrates
5.1 Introduction 127 5.2 Substrate Selection 128 5.3 Glass Properties 133 5.4 Experimental 134 5.5 Deposition of Polycrystalline Silicon Thin Film on Glass Substrates 5.5.1 Silicon Particles Seeding 137 5.5.2 Bare Glass Substrates 140 5.5.3 Amorphous Silicon Coated Glass Substrates 146 5.5.4 Rheotaxy on Glass Substrates 150 5.5.5 Growth Kinetics and Properties of Silicon Thin Films 153 5.5.6 Surface Quality Improvement 162 5.6 References 171
Chapter Six: Thin Film Silicon Photovoltaic Devices
6.1 Introduction 176 6.2 PC-ID Modelling of Thin Film Silicon Solar Cells 177 6.3 Silicon Thin Film Solar Cells on Crystalline Silicon
Substrates 6.3.1 P-N Junction Growth 185 6.3.2 Device Fabrication 186 6.3.3 I-V Characteristics of Solar Cells 186 6.3.4 EBIC Characterization of Thin Film Silicon Solar
Cells 193 6.4 Polycrystalline Thin Film Silicon Solar Cells on Glass Substrates 197 6.5 References 200
Chapter Seven: Conclusion and Future Directions
7.1 Introduction 201 7.2 Summary and Discussion 201 7.3 Future Prospects 203
7.4 References 205
Appendix I: Numerical Modelling of Solution Growth
1. Numerical Method 206 2. Boundary Condition 207 3. Growth Rate 207 4. References 208 5. Program Listing 211 CHAPTER ONE
INTRODUCTION
1.1 Silicon Solar Cells
A solar cell is a semiconductor device that converts the energy of sunlight into electrical energy. Basically, a solar cell consists of an appropriately doped semiconductor having either p-type or n-type conductivity in which an internal electrical field is created by forming a region of the opposite conductivity type (p-n junction). The formation of a p-n junction can be achieved in several ways, such as by diffusion, ion-implantation, or epitaxial growth. Metals such as titanium and aluminium are deposited onto the front and back surface of the semiconductor to form electrical contacts. When sunlight shines on the cell's surface, the energy is absorbed by the semiconductor, thus creating electron-hole pairs in the bulk of the cell. These carriers are collected and separated by the internal electrical field and distributed to an external load.
The first solar cell was discovered by Becquerel in 1839. The potential for large-scale use of photovoltaics as a power source was recognized upon the development of diffused-junction silicon solar cells by Chapin, Fuller and Pearson[l] at Bell Telephone Laboratories in the 1950's. Since then many reserachers have sought to improve the photovoltaic conversion efficiency of these cells. By the early of 1960's, an efficiency of 15% was achieved and cell design had reached a stage which was to remain relatively stable for a decade.
1 With the advent of the "energy crisis" in the 1970's, much more attention has been paid to the development of solar cells to meet the requirements of large scale terrestrial power supply systems. By the early 1980’s, there had been rapid improvements in silicon solar cell design. These have raised cell performance to a level much closer to the theoretical limit. Moreover, as this progress has been made, it has become increasingly clear that there remains considerable scope for further improvement.
Silicon has been the most widely used photovoltaic material to date. It is the second most abundant element in the earth's crust and is the most extensively characterized and best understood semiconductor due to its dominant role in the IC (integrated circuits) industry. Silicon also has the advantage of low toxicity over other semiconductors such as GaAs and CdS. Thermally-grown silicon dioxide very effectively passivates interfaces and so reduces surface recombination losses. Silicon is an indirect band-gap semiconductor. Its band-gap (l.leV) is somewhat below the optimum value of 1.4eV for semiconductors matched to the solar spectrum. A theoretical conversion efficiency limit of about 29% has been predicted [2-5]. In practice, conversion efficiencies of silicon solar cells of up to 24% have been achieved to date [6]. This is very close to the highest efficiency of GaAs solar cells, which has been considered as the best photovoltaic material from the energy band-gap point of view. There are several technical innovations responsible for this rapid improvement. The most important one has been the increased attention paid to obtaining low surface recombination currents, both at the electrical contacts to the cell and away from them. Other
2 important developments have included improvements in cell processing to maintain the high starting minority carrier lifetimes of the wafers and the introduction of effective light trapping schemes[7].
There still remains more scope for further enhancement of silicon solar cell performance. Further improvement can be achieved possibly by using approaches such as non-randomizing light trapping schemes and silicon-on-silicon tandem cell designs [4]. Another approach that could result in improved cell performance is to take advantage of sub-band-gap absorption processes. Examples of such processes are absorption via defect levels and absorption due to an effective band-gap reduction by heavy doping or alloying[4]. These approaches are likely to increase the cell short circuit current but decrease the open circuit voltage by increasing the saturation current density. However, the development of light trapping schemes will maximise the current increase for a given voltage decrease.
1.2 Cost of Silicon Solar Cells
Currently, production of most silicon solar cells is based on fabrication of the photovoltaic device in a single crystalline silicon wafer. The preparation of the silicon wafer involves crystal pulling and wafer cutting, which are still very expensive processes. The thickness of silicon wafers is usually in the range of 200 pm to 500 pm in order to mechanically support themself. The sawing of a silicon wafer wastes about the same amount of the materials used for a silicon wafer. Depending on the efficiency of the cell, 1MW installed PV power requires an area of 8000 to 10,000 m2 of silicon. At today s
3 production level of about 20MW/year, 160,000 to 200,000 m2 are needed, consuming 160 to 200 metric tons of silicon wafer, or 320 to 400 tons of silicon, if kerf loss for slicing is considered[8]. Therefore, the price of silicon wafers determines the final cost of silicon cells.
In the attempt to reduce the cost of silicon used in solar cells, numerous technologies have been developed for directly growing silicon ribbon materials[8,9,10] or crystalline silicon sheet on ceramic substrates(8,12,14]. The main advantage of these techniques is the low material consumption compared with wafers from single crystal or cast ingots, because the cutting process, with a loss of about 50% of the material, is avoided.
The principles of sheet growth can be classified as[8]: 1) growth on silicon seeds; and 2) growth on foreign substrates.
Two techniques are usually used for silicon ribbon growth from silicon seeds. One is to grow silicon ribbon in a way similar to the Czochralski growth technique, i.e., growth direction opposite to pulling direction[8]. Another is to use a wedge-shaped extended solid-liquid interface, the vectors of growth and pulling direction forming an angle of almost 90° [10].
Crystallization of silicon onto a substrate has been the subject of several developments. In a few cases ceramics such as mullite have been used as a substrate (the abandoned SOC process! 14]), however, carbon remains the preferred material. For many years, Photo watt, France studied the RAD process[8] using graphite foil as substrate,
4 Table 1.1 Techniques currently under development and the main features of silicon grown by these techniques[8]
Name Company Method Product Crystal Structure Output Efficiency Problems [cm2/min) Cast Ribbon Hoxan Growth from melt shaping Ribbons 100 mm wide Columnar grains of some 1 200 <10
_ _ 2
Japan by a flat C-cavity mm 1 asnoqSupssAV Q Growth from melt shaping Ribbons 50 mm wide Monocrystalline (twin) 10 <17 Ugh skill needed
VSfl by two Si-dentrites £ •p I f | SI & co O 3 <15
Octagonal tubes800 mm EFG Mobil Solar USA Growth from melt shaping 160 Carbon, SIC, ^ « -o o B g § w i
by C-die circumference stress <10 RAFT Wacker Germany Growth from melt on re Square sheets 50x50 mm2 folumnar grainsof appr. 1mm2 20000 Dislocation usable ramps and 100x100 mm2 dislocations 107/cm2 density, ramp 5 reuse, grain size
RGS Bayer Growth from melt on re Ribbons 100 mm wide Columnar grains of appro. 1 0009 Not rep. Grain size, Germany usable substrate mm2 dislocations 10^/cm2 defects Spin cast Hoxan Spinning melt Unto flat C- Square sheets 100x100 Columnar grains of <1 cm2 400 <12 Oxygen, dendrite 2 Japan cavitles mm structure SSP FTiG-lSE Zone melting of powder Ribbons 100 mm wide Large elongated grains of some 20 <13 Bowing, width, Germany layer by optical heating mi2, dislocations lO^-lO^/cm2 growth rate n S-Web Siemens Growth from melt on a C- Ribbons 100 mm wide Columnar grainsof some mm , 2000 <12 Flattness, Germany net dislocations 10^-10^/cm2 impurities TSE Academy Sci. Growth from melt on a Ribbons USSR graphite foil through a feeder for reference CZ Different sources Growth from melt Rods up to 200 mm Monocrystalline 200 <18 Slicing diameter coated from both sides by silicon from the melt. By burning away the graphite, two sheets of silicon are obtained. However, the cost of the substrate material is fairly high (e.g. about 10 US$/m2 in the case of the S-Web net[8]) due to the high quality that is needed, such as low reactivity with the silicon melt and high purity. The foil casting techniques such as RAFT[8] and RGS[12] are based on lowering the substrate cost by using a re-usable mould. Graphite is again the preferred material, and some surface coating can be beneficial to the separation of the foils.
Table 1.1 lists the techniques that are currently under development and the main features of silicon sheets grown by these techniques [8]. The chief drawback to sheet and ribbon processes is the high processing temperature that makes necessary special facilities and operator skills! 10,12,14]. High temperature processing also makes it easier for impurities to be incorporated into silicon and spoils the quality of silicon sheets! 11,13]. Since sheet and ribbon processes are based on melting and reciystallizing silicon by heating it up to its melting point and cooling down the melt, temperature control is very crucial for the processing. No ideal sheet growth method, encompassing crystal perfection, flat smooth surfaces, high purity, easy control and high throughput, seems to have been attained yet, although all of these characteristics have been achieved singularly. Some of these techniques are still under development. Whether they cam be commercially viable in competition with alternative solar cell technologies is not apparent.
1.3 Thin Film Silicon Solar Cells
6 Although the sheet and ribbon growth techniques can avoid the wafer sawing process and hence save about 50% silicon, the thickness of the wafers produced by these techniques is still about 300 pm due to the requirement of mechanical strength. Therefore, the thin film approach to solar cell design has become the better choice to reduce cell cost and so meet the requirements of large scale commercial application of photovoltaics[15,16,19,20]. A large amount of silicon can be saved and the sawing operations can be eliminated in thin film silicon solar cell processing. Basically a silicon layer, either p-type or n-type, with 5-50 pm thickness, deposited on a low cost substrate, acts as an absorber or the bulk of a solar cell. The collecting layer can be formed by diffusing an opposite dopant type or by depositing another inversely doped layer on top of the first layer. The substrate provides mechanical support for the thin film layer and ideally has a good thermal expansion match with silicon[21-24]. The metal contacts of a thin film solar cell can be designed in several ways. If the substrate is a conductor, it can act as a back contact of the cell. Otherwise, if the substrate is an insulator, metal slots can be made on the substrate surface before silicon deposition[14]. Alternatively, both contacts can be made on the exposed silicon surface and the cell illuminated from the substrate side if the substrate is a transparent material such as glass[25].
The investigation of thin film solar cells has been carried out with a wide range of semiconductor materials and deposition techniques [15]. Cells forming the focus of these investigations can be classified into three categories: 1) compound semiconductor thin film
7 solar cells, 2) amorphous silicon thin film solar cells, 3) polycrystalline silicon thin film solar cells.
Technologies which have been reasonably well investigated for compound semiconductor thin film solar cells are cadmium sulphide, copper indium diselenide and cadmium telluride. These materials, together with amorphous silicon, are usually deposited by vapour phase deposition. These materials, compared to silicon, have problems as thin film solar cell materials for large scale terrestrial application, such as resource availability, low efficiency capability and toxicity[15]. Amorphous silicon presently has severe stability problems. Outdoor testing of amorphous solar modules has shown massive degradation of up to 50% over a period of a few months! 17,18].
The development of a thin film crystalline or polycrystalline silicon solar cell overcomes the above mentioned drawbacks of amorphous silicon solar cells and offers potential performance advantages over even single crystalline wafer solar cells! 19,20,25].
As the cell thickness decreases, the absorption of light will decrease. Therefore, current generation in a thin film silicon solar cell would be sacrificed relative to a wafer based conventional silicon solar cell. However, the reduction of current generation can be compensated by incorporating a light trapping scheme into the thin film cell designI7]. Light trapping, a recently developed process in which the weakly absorbed, long wavelength light that enters the silicon is prevented from escaping by total internal reflection or by reflection off the metallized surfaces, has made it possible to use thin silicon cells
8 without sacrificing too much current generation. By making the surface of a solar cell rough, it is possible to increase the effective path length of weakly absorbed light by up to 50 times. Therefore, the light has a much increased chance of being absorbed.
As the cell is thinned, the minority carrier collection efficiency will be increased if the rear surface passivation is of good quality. A rule of thumb is that the carrier collection efficiency can be above 98% when the diffusion length is greater than twice the cell thickness[5]. In contrast, the minority carrier collection in a thicker conventional silicon solar cell is limited by the minority carrier diffusion length, which is usually shorter than the wafer thickness (200-500 pm), Therefore, the minority carriers generated more than a diffusion length from the junction will not be collected.
The open circuit voltage of a solar cell will increase as a wafer is thinned as long as both surfaces are well passivated. This is due to the fact the recombination in a thin film solar cell is reduced substantially due to the reduced volume of the base layer[4,5,26]. Recombination at grain boundaries in polycrystalline silicon will also be suppressed when the wafer is thinned because the area of grain boundaries declines. The variations of open circuit voltage and short circuit current are opposite as the cell thickness changes. There is an optimum film thickness at which the highest power output can be achieved, whose value depends on the quality of the silicon, of the surface passivation and of the light trapping scheme used. Figure 1.1 plots the limiting photovoltaic conversion efficiency versus silicon cell thickness.
9 2 28
10 100 1000 Wafer Thickness (p.m)
Fig 1.1 The limiting efficiency of silicon solar cells under AMI.5 global, 100MW/cm2 illumination at 298 K[5]
10 The performance of thin film silicon solar cells will depend much less on the quality of the silicon material than conventional bulk silicon solar cells. As long as the diffusion length is more than the absorber thickness, a high collection efficiency is possible. Therefore, the potential efficiency of a thin film solar cell is higher than that of a thick cell for the range of crystal quality likely to be used in commercial production.
1.4 Current Status of Polycrystalline Thin Film Silicon Solar Cells
Since the 1970's, the development of polyciystalline thin film silicon solar cells has been increasingly investigated. Various techniques have been used to deposit large grain polyciystalline silicon thin films on low cost substrates, such as CVD (chemical vapour deposition), physical vapour deposition, plasma spraying, recrystallization, solution growth and direct melt pulling onto a substrate. Large area (30 to 50 cm2) thin film solar cells with efficiency of about 9% have been fabricated using silicon films deposited on recrystallized metallurgical-grade silicon (MG-Si) substrates by CVD processes[27]. Photovoltaic conversion efficiency of about 10% has been obtained for thin film silicon cells using films formed by direct melt pulling onto ceramic substrates! 14]. Barnett and co workers [20,28,29] have been working on low cost crystalline thin film silicon solar cells for many years. The specific technique they are using is to deposit a thin silicon layer on a rigid ceramic substrate. Details of their processing are listed in Table 1.2. Phosphorus gettering and hydrogen passivation have been used to improve their silicon solar cell performance. Conversion efficiencies of 10.9% and 15.7% have been Table 1.2 Silicon-Film™ Wafer and Solar Cell Process Steps[28]
Wafer Formation Solar Cell Formation
1) Compound Material 9) Etch and Clean
2) Form Substrate 10) Diffuse, Strip, Plasma Etch
3) Fire Substrate 11) Screen Print
4) Apply Metallurgical Barrier 12) Screen Print, Fire Front Contacts
5) Sinter 13) Anti-reflection Coating
6) Apply Active Layer 14) Burnish Contacts
7) Grow Silicon Film™ 15) Test
8) Scribe and Break reported respectively for a 100 cm^, commercial size cell and a 1 cm2, laboratory size cell[28]. Many other innovative deposition processes have been developed in an effort to grow large area, good quality silicon thin films suitable for photovoltaic devices[15].
1.5 Technologies for silicon deposition on dissimilar substrates
To deposit silicon on dissimilar substrates, various technologies have been investigated.
1.5.1 Vapour Deposition
Chemical vapour deposition of silicon is a well established technology. It gives flexibility in controlling the dopant concentration and distribution in the silicon film, and p-n junctions and high-low
12 junctions can be produced readily by varying the composition of the reaction mixture[30-32]. T.L.Chu[23] investigated the deposition of crystalline silicon on steel, graphite and metallurgical silicon substrates by CVD technology. The best efficiency he achieved is 1.5% due to the limited grain size growth by CVD[23].
Physical vapour phase deposition for photovoltaic applications has also been investigated. Vacuum evaporation of silicon on quartz substrates[33], silicon substrates[34], aluminium substrates[21], and steel and glass substrates [35] has resulted in films of insufficient quality for solar cells, primarily due to the small grain size (about 1 micron) and contamination during deposition.
In order to enhance the grain size of the crystals grown, the CVDOLL process (chemical vapour deposition on liquid layers) has been used to deposit crystalline silicon on graphite substrates[36-38]. Crystals with grain size exceeding 100 pm have been achieved. The formation of large grains is evidently associated with the presence of a liquid film that influences the nucleation and growth of silicon. It was assumed that the presence of liquid tin (or, alternatively, liquid aluminium) both reduces the density of the silicon nuclei, and feeds the growing crystals from a solution of silicon in the solvent.
Vapour deposition of silicon on Au (or Al) coated dissimilar substrates has been investigated [39]. Au and Al are metals which can dissolve silicon at relatively low temperature and have relatively high silicon solubility at the eutectic points. The eutectic temperature of Au/Si is about 363°C and that of Al/Si is 577°C. Figure 1.2
13 Weight Percent Silicon
Fig 1.2 The phase diagram of Au-Si alloy[48]
14 demonstrates the mechanism of crystal growth during deposition. The substrate coated with gold film is initially held at temperature Tlf As soon as silicon atoms are deposited by the evaporation from the source silicon, a liquid Au/Si alloy film of composition A is formed on the surface of the substrate. During subsequent deposition of silicon, the composition of the liquid alloy changes to the silicon rich side until all the solid gold is consumed and composition B is reached, with a higher silicon composition. With further increase of silicon content in the alloy, supersaturation may occur. After supersaturation occurs, silicon crystals begin to nucleate and subsequently grow larger.
1.5.2 Recrystallization
Many techniques have been proposed to reciystallize poly- ciystalline or amorphous silicon on amorphous insulator such as quartz and thermally-grown Si02 on silicon substrates, by using strip heaters, lamps, electron beams, and laser beams[40-42]. Device quality layers have been achieved on patterned SiC>2 or silica substrates by thermal recrystallization. Large grain silicon films were obtained by Argon laser recrystallization of amorphous silicon films deposited on low melting temperature glass substrates [43]. The grain size of crystals grown during reciystallization depends on the temperature and impurities in the film. To get crystals with grain size larger than 100 pm, the recrystallization temperatures need to be very close to the silicon melting point (1400°C). W. Scins et alia observed that the presence of aluminium or boron in silicon films increases the grain size obtained from the recrystallization process [44]. Although recrystallization can produce larger crystals, the high processing
15 temperature limits the choice of the substrate and can lead to contamination of the thin film. A high processing temperature also increases the energy consumption.
1.5.3 Graphoepitaxy
Graphoepitaxy is an " artificial epitaxy" which is based on forcing crystal particles to settle out in a directed manner on a relief micro- pattern corresponding to the symmetry and external shape of the precipitating crystals[40,41]. Graphoepitaxy of silicon films has been achieved by using silicon-gold supersaturated solutions [45-46], recrystallization [40,41,47], and vapour deposition methods on
patterned quartz substrates and thermally-grown Si02 on silicon substrates.
1.5.4 Solution Growth of Silicon
The precipitation of solid material from liquid solution is a classical method for growing crystals. Such precipitation occurs because of the decreasing solubility of a solute in a solvent expected when the temperature is lowered or the composition of a saturated solution is varied. The crystals that form during such precipitation will have a natural growth habit. However, when a substrate for seeding the growth is provided, the solute material can be crystallized instead with a specific crystallographic orientation predetermined by the substrate orientation. Such growth is usually called "liquid phase epitaxy" (LPE). This technique has been widely used for commercial
16 production of III-V compound semiconductors such as GaAs infared light-emitting diodes, and GaAs and AlGaAs laser diodes[49].
Growth of bulk silicon from liquid metals such as gallium, tin and indium was reported in the 1950's[50-52]. The influence of solvents and impurities on the habit and morphology of semiconductor crystals was investigated by J.W. Faust in 1968[53 ].
LPE of silicon from a variety of metal solutions has been investigated since the 1970's. Good quality epitaxial films of silicon have been obtained from solutions of Sn, In, Al, Ga, Bi[54-66], and alloy solutions such as Al/Ga, Au/Bi at growth temperatures down to 390°C[67-691. The experiments have been conducted in various growth vessels such as slider boats[68,69], dipping boats[54-60,64,65], tipping boats and centrifugal systems[61-63]. These have demonstrated the feasibility of growing silicon structures consisting of very thin planar layers with a wide range of doping levels. Liquid phase epitaxial growth of silicon from tin solution has been investigated systematically because tin is an isoelectronic impurity whose incorporation into silicon epitaxial layers is not expected to introduce either shallow doping levels or deep recombination levels. The investigations were associated with growth kinetics, dopant segregation and surface morphology[54-60].
The quality of LPE silicon films was shown to be superior to that of films prepared by other methods. It was reported that LPE silicon layers have a very low density of defects or are "essentially defect-free" compared with silicon films grown by other methods[70]. A high
17 minority carrier lifetime was observed from silicon LPE films[58]. An open circuit voltage of 663 mV was reported for a solar cell made on a silicon film deposited by liquid phase epitaxy [26],
Solution growth on non-silicon substrates has been carried out recently. Deposition of silicon on quartz and stainless steel from tin solution has been investigated by Barnett and co-workers[71,72]. A photovoltaic energy conversion efficiency of 15.7% has been reported for cells using silicon films deposited from tin solution onto thermally matched ceramic substrates at a temperature of about 900°C[73]. M. Deguchi et alia[74] have investigated solution growth of polycrystalline silicon films on metallurgical grade silicon substrates. IR (infrared) lamp annealing was applied to enlarge the grain size of the seeding layer deposited by CVD to more than 100 pm prior to the solution growth. Following this treatment, 20-30 pm thick continuous polyciystalline silicon films were successfully grown on top of the seeding layer. Deposition of silicon on a silicon dioxide layer thermally grown on a single crystalline silicon wafer by seeding through windows opened by photolithography has been successfully achieved by many researchers [75,76].
1.6 Solution growth for silicon deposition on dissimilar substrates
In the last section, a variety of silicon deposition techniques for IC and photovoltaic applications have been reviewed. Table 1.3 summarized the techniques and the features of the silicon grown by them.
18 Table a> P o o
1.3:
Comparison
of
Techniques
and
0D O
haracteristics C CO CO
C/3 2 a ►— C a>
of
Si
Thin 35S
Films
Grown by These by o era Techniques
19 It is clear from Table 1.3 that good quality large crystals can be grown from metal solutions or vapour deposition on metal coated substrates.
In general, solution growth offers several advantages over other methods:
1) Low growth temperature is possible. The deposition temperature depends on silicon solubility in the solution. The higher the silicon solubility, the lower the growth temperature can be. To deposit silicon on dissimilar substrates, low growth temperatures are preferred, because this decreases stress arising in the final film from thermal expansion mismatch and enlarges the choice of substrate material onto which the film can be deposited. Low growth temperature also lowers contamination levels within the film since segregation coefficients of most impurities decrease as temperature drops.
2) Low background doping level and high minority carrier lifetime are possible. Since the segregation coefficient of most impurities is less than one, impurities remain in the solution rather than being incorporated in the silicon lattice. The final concentration of the impurities in the film depends on the solid solubility of the impurity in silicon.
3) Large grain size crystals can be grown by the solution growth method. In case of physical vapour deposition, the grain size is limited due to high nucleation density and low mobility of atoms on the substrate surface. Solution growth overcomes these drawbacks, The
20 nucleation density depends on the supersaturation of solute in the solution and the surface energy of the substrate. The higher the supersaturation and the lower the surface energy, the higher the nucleation density is. By controlling cooling of the solution, the supersaturation degree can be controlled. Since atoms are more mobile in liquid medium than in solid medium, the solute atoms can move easily along the liquid (solution) - solid (substrate) interface and find the optimum attachment sites.
1.7 Purpose of the Thesis
The purpose of this thesis is to investigate the deposition of polyciystalline silicon thin films on inexpensive substrates such as glass for application in low cost photovoltaic cells. The main areas of activity described in this thesis are as follows:
1. Selection of the solvent for solution growth of silicon on dissimilar substrates;
2. Investigation of single crystalline silicon crystal growth on patterned thermally-grown SiC>2 layer on silicon substrates. This is to explore techniques for deposition of single crystalline silicon thin film on glass or SiC>2 coated glass substrates;
3. Investigation of solution growth of large grain, continuous polyciystalline silicon thin films on borosilicate glass substrates;
4. Fabrication of silicon thin film photovoltaic devices.
21 The thesis is composed of seven chapters. Chapter Two describes the mechanism of crystallization. Chapter Three describes liquid phase epitaxial growth of silicon from various solutions at low temperatures. Chapter Four demonstrates graphoepitaxy of silicon on thermally-grown SiC>2 on silicon substrates. Chapter Five investigates polycrystalline silicon thin film deposition on glass substrates. Chapter Six illustrates photovoltaic device fabrication on silicon thin films. Chapter Seven summarises results and discusses the future considerations.
1.8 References:
1. D. M. Chapin, C. S. Fuller, and G. L. Pearson, "A New Silicon p-n Junction Photocell for Converting Solar Radiation into Electrical Power", Journal ofAppl.ied Physics, Vol. 25 (1954) p. 676
2. M. Wolf, "Updating the Limit of Efficiency of Silicon Solar Cells" IEEE Trans. Electronic Devices, Vol. ED-27,4 (aprill980) pp. 751-760
3. S. C. Jain, R. Mertens and R. Van Overstraeten, "High Efficiency Approaches", Proceedings of 16th IEEE Photovoltaic Specialists Conference (1982) pp. 333-339
4. Martin A Green, "High Efficiency Silicon Solar Cells",Trans. Tech. Publications, Switzerland, 1987
22 5 A. W. Blakers, "High Efficiency Crystalline Silicon Solar Cells", Advances in Solid State Physics, Vol. 30, (1990) pp. 403
6. A. Wang, J. Zhao and Martin A. Green, "24% Efficient Silicon Solar Cells", Appllied physics Letters, Vol. 57, No. 6 (1990) pp. 602-604
7. P. Campbell and Martin A. Green, "Light Trapping Properties of Pyramidally Textured Surfaces", Journal of Applied Physics, Vol. 62, No. 1, (July 1987) p. 243
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9. M. Suzuki, I. Hide, T. Yokoyama, T. Matsuyama, Y. Hatanaka and Y. Maeda, "Growth of Polycrystalline Silicon Sheet by Hoxan Cast Ribbon Process", Journal of Crystal Growth, Vol. 104 (1990) pp. 102-125
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33 CHAPTER TWO
MECHANISMS OF CRYSTALLIZATION FROM SOLUTION
2.1 Introduction
In this chapter, the nucleation and growth of crystals and the principles of liquid phase epitaxy(LPE) are described briefly. Crystal growth on a substrate is comprised of the following four steps [1,2]:
1) achievement of supersaturation or supercooling; 2) wetting; 3) formation of crystal nuclei; 4) growth of the crystals.
2.2 Supersaturation
A liquid solution is defined as a saturated solution if the solute and the solvent are at equlibrium state. Depending on the concentration of the solute, a solution may be unsaturated, saturated, or supersaturated. A solution whose concentration is higher than that of a saturated solution is said to be supersaturated. Both unsaturated and saturated solutions are stable and can be stored indefinitely. In contrast, supersaturated solutions are generally unstable.
The degree of supersaturation of a solution can be expressed in three ways, namely: absolute supersaturation, a; relative
34 supersaturation, b; or the coefficient of supersaturation, g. These quantities are defined by
a=c-c0 b=(c-c0)/c0=a/c0 g=c/c0=b+l=a/c0+l
where c is the concentration of the dissolved solute at a given condition and c0 is its equilibrium concentration.
The deposition of a solid crystalline phase from a liquid solution can often occur if some degree of supersaturation has first been achieved in the system. The attainment of the supersaturated state is essential for crystallization to occur and the degree of supersaturation, or deviation from the equilibrium saturated condition, is the prime factor controlling the deposition process. Supersaturation of a solution may be achieved by several methods [1,2].
The first method uses the temperature dependence of the solubility. Usually the solubility of a solute increases with rising temperature. By cooling a saturated solution, a supersaturated solution can be obtained.
The second method is to remove the solvent at a constant temperature, such as by evaporation. The gradual loss of the solvent by evaporation increases the concentration of the solute and this results in supersaturation.
35 The third method of obtaining supersaturation involves introducing into a solution some substance which reduces the solubility of the solute. Such a substance may be another solvent or some compound which acts as an additional (soluble) component of the solution. The addition of a second solvent reduces the solubility of the solute in the resultant mixture, compared with its solubility in the primary solvent. An example of this method is that introducing a certain amount of tin into a Au/Sn alloy solution, which has already been saturated with silicon at a given temperature, will make the Au/Sn solution supersaturated with silicon[3].
The fourth method is based on the use of chemical equilibrium between substances. When a new compound is formed by a chemical reaction and the concentration of this compound is higher than its solubility in a given solution, such a solution becomes supersaturated with respect to the new compound. As an example of this method, introducing a piece of quartz (SiC^) into a solution of Mg/Sn/Si will supersaturate the Mg/Sn solution with silicon. This is because Mg in the solution reacts with quartz to break silicon-oxygen bonds. Therefore, silicon atoms come into the solution and make the Mg/Sn solution supersaturated with silicon[4].
The fifth method is to create a locally supersaturated region in a solution. This condition has been achieved by various techniques, e.g., for LPEE (Liquid Phase Electro-Epitaxy) the supersaturated region is created near the interface of the semiconductor and the metal solution by the Peltier effect and electro-migration[5-7].
36 2.3 Wetting
Wetting relates to the degree to which a liquid spreads on the surface of a solid [8]. Assuming that the surface of a solid is perfectly uniform (a condition which never actually holds), then, if a drop of pure liquid is placed on a horizontal surface, it will spread out to certain extent, perhaps indefinitely. Alternatively, it may spread only to a limited area and come to rest so that the liquid-vapour interface at the edge of the drop everywhere meets the surface at a definite angle called the angle of contact.
Quantitatively, the contact angle, 0, is determined by Young's equation[9]
COS0= (ysv-ysi) /Yiv where ysv, yiv, ysj are alternatively the surface energies between solid- vapour; liquid-vapour; and solid-liquid. It is fairly obvious that the more nearly this angle approaches zero the more nearly will the liquid spread completely over the surface. For complete wetting or spreading, the contact angle must be zero.
The wettability of a solid by a solution is mainly controlled by two factors which are the surface tension of the solvent and the energy of the solid surface [10]. The surface tension of the solvent is an inherent property of the solvent. Increased temperature usually decreases the surface tension of the solvent and improves the wettability of a solvent on a solid. The second factor which affects
37 wetting is the surface energy of the solid being wet, which is related to the surface condition of the solid such as surface morphology and cleanliness. The lower the surface energy is, the better the wettability which can be achieved on a solid surface, e.g., sandblasted glass surface usually has better wettability than flat glass due to its lower surface energy. Surface contaminants usually lower the wettability between a solid and a liquid. In case of LPE of silicon, surface contaminants and oxide are detrimental to wetting of a solvent on a silicon substrate. Although surface contaminants, such as grease, dirty particles, and Si02 can be removed by proper chemical washing during the sample preparation stage, surface oxides can still form during the start-up and equilibration time in the furnace prior to substrate contact with the growth solution. Removal of the surface oxide from the substrate before starting crystal growth is a crucial stage for complete wetting and continuous thin film growth. Insitu meltback has been used to obtain an oxide free surface for the subsequent growth of a silicon epitaxial layer. Flowing hydrogen has usually been used as a growth ambient because H2 can remove residual 02 in the growth tube by forming water vapour with it[ll,12]. Some special metals such as A1 and Mg, which have a higher affinity for oxygen than silicon, have been added to the solution to improve wetting by reducing SiC>2 on the surface of the substrate [10].
2.4 Nucleation
The formation of a new phase occurs when a system is in a nonequilibrium state and when the departure from equilibrium is
38 sufficient for the appearance of such a phase. The formation of a new phase should obviously tend to bring the system to an equilibrium state, i.e., to decrease the total free energy of the system.
The nucleation of crystals in a solution can occur when the solution is in a sufficiently supercooled state. Nucleation can be divided into the following categories: homogeneous nucleation, heterogeneous nucleation, and nucleation by cavitation[13].
2.4.1 Homogeneous Nucleation
Homogeneous nucleation is a process which occurs in a "perfectly clean" supercooled solution without influence from any impurity particles or the walls of the container. The initiation of nuclei is via a process of aggregation and separation of atomic or molecular clusters in the solution[1,2]. As the solution cools further, the atomic and molecular aggregates reach a certain size at which they become stable in the solution. The largest cluster which may exist before spontaneous crystallization is usually referred as the critical cluster. For homogeneous nucleation of a spherical cluster of radius r, the total free energy change of the system is [14,15] AF=-4/3jcr3AF1)+47cr2o (2.1) where AFV is the volume free energy change due to the appearance of solid phase, and a is the surface tension which relates to the formation of a boundary between phases. For a given undercooling AT, the volume free energy change is given by[1,2]
AF1)=LAT/Te (2.2)
39 where L is the latent heat of fusion, and TE is the equilibrium temperature between the solid and liquid. Differentiating equation 2.1 to find the extremity of AF, the radius of the critical nucleus, r*, can be expressed as
r*=(2oTE)/ (LAT) (2.3)
Figure 2.1 plots the free energy of the system versus the radius of nucleus clusters! 1]. The sign of AF depends on the ratio of the surface free energy change, AFS and the volume free energy change, AFV, which, in turn, depend on the dimensions of spherical cluster of the solid. There is a critical value of spherical radius r* at which the free energy change of a system reaches its maximum value. The clusters of the solid whose size are smaller than the critical radius (r
The size of the critical nucleus is also found to be dependent on temperature. Since the volume free energy, AFV decreases as temperature TE increases (equation 2.2), the free energy change of the system AF (AF = AFS - AFJ and the radius of the critical nucleus increases (equation 2.3) as temperature TE rises. These relationships are shown in Fig. 2.2.
2.4.2 Heterogeneous Nucleation
In heterogeneous nucleation, the nuclei are catalyzed by foreign solid particles or substrates. The introducing of foreign solid particles lowers the nucleation barrier. Therefore the nucleation in the
40 +ve
Size of Nucleus, r
Fig.2.1 Free energy diagram for nucleation explaining the existence of a "critical nucleus"[1]
41 AF (Ti)
Size of Nucleus, r
Fig. 2.2 Effect of temperature on the size and free energy of formation of a critical nucleus (T1 42 presence of solid particles or solid surface is easier and the degree of supersaturation needed for nucleation is lower than that required for homogeneous nucleation. The change in the free energy necessary for the formation of a new phase in heterogeneous systems (AF') is smaller than that in homogeneous solutions (AF). This relation can be formulated as, AF'= <|)=(2+cos6)(1-cos0)2/4 (2.10) For the case of complete non-affinity between the crystalline solid and the substrate (corresponding to that of complete non-wetting in the solid-liquid system), 0=180°. Then AFC'=AFC, and the over-all free energy of nucleation is the same as that required for homogeneous or spontaneous nucleation. For the case of partial affinity (or partial wetting) between the crystalline deposit and the solid substrate, O<0<18O° ,and AFC' The mechanism of catalysis of the growth of nuclei by impurities is different in different situations. If impurity particles 43 have a structure similar to the crystal being grown, the precipitation takes place directly on the surface of the impurity[2]. Amorphous colloidal particles stimulate the formation of crystallization centres by absorbing molecules or ions of the solute [2]. Two mechanisms of heterogeneous nucleation have been identified: the orienting effect of the crystal lattice of the impurity and the effect associated with the presence of cracks and channels of nearly molecular dimensions on the substrate surface. In the former case, a growing nucleus is oriented in a definite manner with respect to the substrate. If cavities are present on the surface, they are filled by very small particles which would normally be unstable on a flat surface. Therefore, heterogeneous nucleation starts from these particles [2]. This phenomenon has been analyzed by Turnbull for different types of cavity! 16]. 2.4.3 Nucleation by Cavitation It has long been recognized that nucleation of a crystal in a undercooled liquid can be induced by cavitation [13]. The cavities are small voids in the liquid which open in negative pressure regions. The negative pressures can be produced either mechanically! 17-19] or ultrasonically[20]. In either case, the negative pressure is transient. When the cavities expand and collapse, high local pressures result. These pressures, which have been estimated at 105 atomsphere, change the melting temperature of the solution! 13,21]. The change in melting temperature produces sufficient undercooling to initiate nucleation. As the cavities expand, the liquid can also evaporate from the surface. This supercools the solution and causes nucleation! 13]. 44 Most forms of mechanical disturbance nucleate by creating cavities which collapse to produce nuclei! 13,21]. Nucleation caused by scratching is a well known phenomenon in crystal growth. For example, water (H20) supercooled to temperatures below about -1°C can be crystallized (ice) by scratching a broken glass rod on a surface of glass or metal which is submersed in the water[21]. Scratching might produce nucleation of the crystal in one of two ways: either by providing fresh surface where heterogeneous nucleation can occur, or by the mechanical disturbance due to the moving rod. Experiments have been done which indicate that cavitation can readily be caused by the motion of a glass rod in an undercooled liquid[21]. These observations suggest that nucleation by scratching really occurs via the mechanism of cavitation. Similar phenomena have been observed in this thesis work. Crystalline silicon has grown on thermally-grown SiC>2 on silicon substrates along straight lines which are believed to be scratches caused by the motion of the graphite slider. Details are included in later chapters. 2.5 Crystal Growth As soon as stable nuclei, i.e., particles larger than the critical size, have been formed in a supersaturated or supercooled system, they begin to grow into crystals of visible size. When individual crystals meet neighbouring crystals, they start to coalesce and form a continuous layer on the substrate. The growth kinetics and growth rate at this stage are mainly determined by one of the following growth modes: 1) surface kinetically controlled growth; or 2) solute 45 diffusion controlled growth. Which mode dominates the growth depends on the transportation of the solute in the solution, which is related to the cooling rate of the solution, diffusivity of the solute, and the thickness of the solution[22]. Surface kinetics relate to the mobility of absorbed atoms at the solid-liquid surface and their incorporation into the crystal. Absorbed atoms with sufficient mobility will migrate across the substrate surface to find an attachment site of minimum energy. The site with minimum energy will be one with the most points of attachment corresponding to the largest number of dangling bonds. Therefore, the kinks, vacancies and dislocations at the surface will be the most energetically favourable attachment site for the atoms! 1]. Figure 2.3 shows kinks and steps on a surface. Growth atoms are most easily incorporated into the crystal at a kink since the kink site is the position of highest binding energy which is the most likely point of attachment of a growth unit; the kink moves along the step and the face is eventually completed. The incorporation rate of the growth atoms into the crystal lattice determines the final growth rate of the crystal in the surface kinetically controlled growth mode. However, the growth rate is generally controlled by solute diffusion in the solution. The diffusion of the solute in the solution, or solute concentration gradient in the solution, is the driving force for the solute atoms entering the growth interface. The diffusion rate of the solute depends on supersaturation of the solution, which is related to the cooling rate of the solution, diffusivity of the solute in the solution 46 Fig. 2.3 Model of a growing crystal surface showing attachment sites: A) flat surface, B) steps, C) kinks, D) surface absorbed growth units, E) edge vacancies and F) surface vacancies[l] 47 and the thickness of the solution. In the diffusion controlled growth mode, the diffusion of the solute to the interface is slow compared to the incorporation of growth atoms into the crystal lattice. Therefore, there are no excess solute atoms accumulating at the liquid-solid interface. Hence, the diffusion rate of the solute in the solution determines the final growth rate of the crystal. The diffusion of the solute in the solution also influences the quality and morphology of the crystal[23,24]. Usually the slower the cooling rate, the better the crystal quality is. As the cooling rate increases, the growth rate also increases. When the cooling rate increases to a certain value, constitutional supercooling will be involved in the crystal growth which gives rough surfaces and inclusions in the crystal[25,26]. At very high cooling rates, however, the growth of the crystal becomes kinetically controlled. As a result, constitutional supercooling no longer has an influence on the crystal quality[23]. 2.6 Liquid Phase Epitaxy The concept of "epitaxy" was first presented by Royer in 1928[27]. The term "epitaxy" can be defined as the deposition of a layer on a substrate which has the same or similar lattice structure to the deposited film. The crystalline structure of the deposited layer is a continuation of the substrate's structure. Liquid Phase Epitaxy (LPE) is a special case of crystal growth from solution, i.e., a crystalline layer is deposited from a solution onto a crystalline substrate. This technique was first used to grow GaAs epitaxial layers from Ga solution by Nelson in 1961 [28]. 48 The epitaxy can be classified into homo-epitaxy and hetero epitaxy [29,30]. For homo-epitaxy, the crystal structures of the grown layer and substrate have the same crystallographic space group and the lattice parameters of the layer and substrate are closely matched. Usually when the lattice mismatch, e, is less than 10'3, epitaxial growth will occur. For e>10'3, there is an increasing tendency towards the generation of misfit dislocations or strained layers, and an increasing difficulty in nucleating epitaxial layer growth[31]. Hetero-epitaxy is a relatively new concept (originating in the 1960’s) where the substrate and epitaxial layer have different crystallographic structure. However, at least one lattice dimension of the substrate should be similar to that of the epitaxial deposit. A typical example of hetero-epitaxy is the deposition of single crystalline silicon (face centered cubic, a=0.54 nm) on a sapphire substrate (rhombohedral, a=0.48 nm, c=1.299 nm)[29,30]. 2.6.1 Phase Equilibria The basis of liquid phase epitaxy is the control of the liquid- solid phase equilibrium. The principles involved may be understood by reference to Fig.2.4 which shows the phase diagram for the binary system Al-Si. The upper curve represents the so called "liquidus". A point on this curve, e.g., A, represents a stable mixture of Si and A1 with composition ratio XA at temperature TA. The solubility of silicon in A1 increases as temperature rises as shown in the figure. Assuming the Al/Si solution initially is homogenised at temperature TB (TB>TA) 49 with silicon concentration XB, the solution will become supersaturated when the solution is cooled from TB to TA. The excess amount of silicon in the solution will be (XB-XA). If the cooling process is carried out with a silicon seed or substrate present in the solution, then epitaxial deposition of silicon will occur on the silicon substrate. 2.6.2 LPE Growth Techniques The basis of LPE growth is the production of supersaturation in the liquid phase, such that crystallization of the solute occurs on the substrate. This supersaturation can generally be created in similar ways to those dicussed in Section 2.2. However, there are usually two techniques used in LPE growth of semiconductor materials, i.e., steady-state growth and transient growth[31]. Steady-state growth relies on a solute gradient between a source and substrate wafer to provide the driving force for growth. The solute gradient can be created in several ways, e.g., by creating a temperature gradient in the solution with the source wafer region hotter than the substrate wafer region. This technique has been used to grow GaAs[33] and GaP[34,35] from Ga solution, and silicon from Al[36] and In[37] solution. The most widely used method for LPE is a transient growth technique where the supersaturation is achieved by ramp cooling down the solution. This technique can be subdivided into four different growth modes: equilibrium cooling growth; supercooled growth; step-cooled growth and two-phase solution growth[31]. 50 Weight Percent Silicon 1300- 1100- 900- 700- 500- Atomic Percent Silicon Fig. 2.4 The phase diagram of Al-Si alloy[32] 51 and LPE Fig. Temperature (T) two 2.5 growth, phase Temperature supercooled LPE Two Equilibrium growth[26] Phase against Time(t) LPE Cooling time Cooling Supercooling 52 growth, profiles step-cooled Stepcooling for equlibrium-cooled LPE growth Figure 2.5 plots a schematic drawing of the temperatures as a function of time for the four different growth modes. It is assumed that the substrate and the growth solution do not differ in temperature. At the beginning of each run, with the substrate and solution not in contact, the system is heated to a temperature higher than the liquidus (Tj) that corresponds to the initial composition of the solution, and then cooled. For each technique, an arrow indicates the time and temperature at which the substrate and solution are placed in contact. For equilibrium cooled growth the temperature of the solution is lowered at a rate R (°C/min) from the liquidus temperature Tj over a growth temperature range ATg whilst in contact with the substrate. In supercooled growth, the temperature of the growth solution is lowered AT below the liquidus temperature. The substrate and solution are then brought into contact while the solution is cooled at a rate R (°C/min) over a range ATg. For step-cooled growth the solution is held at a temperature AT below the liquidus temperature and then brought into contact with the substrate and held at constant temperature during the growth cycle. Two-phase solution growth is a variation of equilibrium cooled growth where solid material is present in the solution through-out the growth cycle, due either to the addition of excess solute material or to having cooled the solution so far below the liquidus TJ31]. 53 The growth technique chosen depends on the material parameters which are of importance for the particular application. The chief features which are affected by the choice of growth technique are epitaxial layer thickness control, uniformity and reproducibility of composition, and surface topography. 2.6.3 Segregation In crystallization from a melt, there are various impurities contained in the melt, including both intentional and unintentional impurities. These impurities are incorporated into the crystal during crystal growth. The impurity concentration of the solid phase, in general, differs from that of the liquid phase due to a segregation phenomenon. In the limit of vanishingly slow growth, the ratio of the solubility of impurity A in the solid phase [CA]S to that in the liquid phase [CA]L remains constant over a certain concentration range [38- 40]. This ratio is referred to as the equilibrium segregation or distribution coefficient, kQ, and is defined as Ko=[Ca]s/[Ca]l The segregation coefficient defined above actually represents the ratio of the difference in thermodynamic potential due to the interaction and entropy of mixing of the impurity with the host material in the solid and liquid phase [40]. If the impurity solubility in the liquid phase is always higher than that in the solid phase, i.e., KqCI, the 54 impurities tend to accumulate in the melt rather than being incorporated into the solid lattice. The equilibrium segregation coefficient can be obtained by calculation from the binary phase diagram under the assumption that the solidification rate can be approximated as zero, that is, an equilibrium phase transition occurs. In the case of higher solidification rate, however, impurity atoms with KqCI are rejected by the advancing solid at a greater rate than they can diffuse into the bulk of the melt. The rejected impurity atoms begin to accumulate in the melt layer near the growth interface and diffuse in the direction of the bulk of the melt. An impurity concentration gradient thus develops ahead of the advancing crystal. A schematic profile of this situation is represented in Fig. 2.6. The thickness of the diffusion boundary layer 6 is defined as the distance from X=0 (crystal surface) to the intersection of the tangent line on the [C]L (impurity concentration in the melt) curve with the extrapolated horizontal plateau of [C]L. Consequently, taking into account the thickness 8, the solidification rate Gs and the diffusion coefficient D of the impurity in the liquid phase, an effective segregation coefficient Keff can be defined at any moment if stirring and convection currents in the liquid keep [C]L virtually uniform[40]: Kefi-IV [Ko+( 1 -KJexpf-Gsd/D)] Table 2.1 lists the equilibrium segregation coefficient and diffusivity of some impurities in silicon. The only example of K^l is oxygen which has an equilibrium segregation coefficient of 1.25 in silicon. 55 2.7 Computer Simulation of Liquid Phase Epitaxy of Silicon Computer simulations of the epitaxial growth of GaAs from solution in Ga and of liquid phase epitaxial growth of III-V ternary alloys have already been reported [40-43]. Simulations of the growth may be useful in predicting the compositional variations and the thickness of solid grown as functions of the different parameters of growth. Numerical methods have been used in this thesis to simulate liquid phase epitaxial growth of silicon from Ga solution. The basic model considers purely diffusive transport of the solute with boundary conditions of bulk diffusion only. Using numerical methods, the one-dimensional diffusion equation is solved relative to the moving interface as origin d C(x,t)/3T=D 3C(x,t)/3x+ R3C(x,t)/3x where C(x,t) is solute concentration at point x in the solution at temperature T, D is the diffusion coefficient of the solute in the solution and R is the interface velocity. Details of the numerical procedure have been listed in Appendix 1. The actual program is very simple. Functions are generated to describe the equilibrium concentration as a function of temperature and the temperature of the melt as a function of time. The function 56 describing silicon solubility in Ga solution within the temperature range from 779°C to 469°C is formulated as follow[44]: XSiL= 65.98e-78"-5K/T The equilibrium temperature is fed in as data and determines the initial concentration C0 in each segment. The starting temperature is fixed at some temperature Ts above TE and the corresponding equilibrium concentration Cj calculated. The diffusion equation is now used to calculate the new profile of concentration after an interval x and, from the interface gradient, the amount etched or grown is calculated. This is repeated for successive increments of time, the new Cj being calculated according to the melt temperature and the phase diagram. At the other solution boundary, the bulk diffusion boundary condition is applied. A typical figure used for the diffusion coefficient is 5 x 10'5 cm2s-1* The solute gradient in Ga has been calculated by changing several growth parameters, such as growth temperature, cooling rate, and melt thickness. The relations between the solute gradient and these parameters have been established. Figure 2.7 shows typical concentration profiles at a cooling rate of l°C/min. where the initial saturation of the solution is at 600°C. After the solution is brought into contact with the silicon wafer, the temperature is raised 15°C to meltback the substrate before cooling down the solution. Figure 2.8 shows the concentration profiles at various cooling rates. The concentration gradient is increased as cooling rate is increased. This is due to the fact that the driving force for silicon atoms diffusing to 57 the growth interface increases as supercooling is increased. Figures 2.9 and 2.10 plot the change of concentration gradient and thin film thickness corresponding to different melt thickness. Thicker melt gives a smaller solute concentration gradient and thinner film growth. Since the diffusivity of silicon is fixed in the solution, the solute travels a longer distance to reach the growth surface in a thicker melt. During this journey, it has a large probability of being nucleated homogeneously in the solution before reaching the growth interface, if the solution is largely undercooled. 58 solid-liquid Fig. Solute Concentration 2.6 Schematic interface[33] concentration Distance Diffusion Boundary Layer 59 Liquid distribution of solute near the Table 2.1 Equilibrium Coefficient, Maximum Solid Solubility, and Diffusion Constant of Impurity Elements in Silicon[33] Element Group Equilibrium Maximum Diffusion-constant Segregation solid Coefficient solubility D0(cm2/sec) Q(ev) (atoms/cm3) H la - - 9.4xl0-3 0.48 Li la 1x10-2 6.5xl019 2.5x10-3 0.66 Cu lb 4xl04 1.5xl018 4.7x10-3 0.43 Ag lb lxlO6 2.0xl017 2.0x10-3 1.60 Au lb 2.5x10-5 1.2xl017 2.4x10-4 (I) 0.39 2.75x10-3(S) 2.04 Zn lib 1x10-5 6xl016 1x10-1 1.40 B mb 8X101 lxlO21 9.1x10-2 3.36 A1 mb 2xl0-3 5xl020 1.385 3.39 Ga mb 8x10-3 4xl019 3.74x10-1 3.41 In mb 4xl04 4xl017 7.85x10-1 3.63 Ti IVa 2x10-6 - 2.0x10-5 1.50 C IVb 7xl0-2 3.3xl017 3.3x10-1 2.92 Ge rvb 3.3x101 b 1.535x103 4.65 Sn IVb 1.6x10-2 5xl019 3.2x10 4.25 N Va 7x10-4 5xl015 8.7x10-1 3.29 P Va 3.5x10"! 1.3x1021 3.85 3.66 As Va 3x10"1 1.8x1021 3.8x10-1 3.58 Sb Va 2.3x10-2 7xlOi9 2.14x10-1 3.65 Bi Va 7x10-4 8xl0l7 1.08 3.85 Cr Via 1.1x10-5 - 1x10-2 1.00 O VIb 1.25 2.7x1016 1.3x10-1 2.53 S Vlb lxlO'5 3x1016 9.2x10-1 2.20 Mn Vila 4.5x10-5 3x1016 1.42x10-1 1.30 Fe VIII 8x10-6 3x1016 1.3x10-3 0.68 Co VIII 8x10-6 2.3x1016 9.2x10-4 2.8 Ni VIII 3x10-5 8xlOi7 2x10-5 0.47 60 Pig. cooling Concentration of S ilic o nA to m s(zl0E20/cm*cm*cm) 2.7 5 rate Concentration Interface 0 of l°C/min. Thickness 1 gradient 2 61 of of silicon edge the Melt 3 of in Ga the solution (mm) melt 4 with (mm) -> a 5 4E + 0 +-> pH 0) s 4> X3 20o 0«* a o ° < o0 o° 02 S o •H -*-» CO * (4-1 O O o* £1 BO O rH 3 £ aJ ■M d 0) o d o O 3E+0 Interface Edge of the Melt Thickness of the Melt (mm) Pig. 2.8 The variation of silicon concentration gradient with cooling rate in Ga solution with initial temperature at 600°C after 50°C cooling 62 Concentration of S ilic o nA to m sin th e M elt (X E 20 atoms/cm*cm*cm) thickness Fig. 50°C 2.9 cooling The interf in variation Ga Thickness ace solution of silicon with of initial the 63 concentration Melt melt temperature 2.5 (mm) thickness edge gradient mm of of 615°C with the after melt melt thickness Fig. G ro w thT h ic k n e s(jim s ) 2.10 The — — — variation in o — — Melt Melt Melt of Thickness Thickness Thickness Growth epitaxial 64 Time layer 5 2.5 10 mm mm® (minute) thickness mm with melt 2.7 References: 1. J. W. Mullin, "Crystallization", London, Butterworths, 1972 2. Evgenii V. Khamskii, "Crystallization from Solutions", Translated from Russian by Albin Tybulewicz, Editor: Soviet Physics and Semiconductors, 1969 3. Private Communication with Prof. Martin A Green and Dr. Stuart Wenham. 4. Private Communication with Dr. Trevor L. Young 5. L. Jastrzebski, J. Lagowski, H. C. Gatos and A. F. Witt, "Liquid Phase Electroepitaxy: Growth Kinetics", Journal of Applied Physics, Vol. 49, No. 12, (1978) pp. 5909-5919 6. J. Lagowski, L. Jastrzebski and H. C. Gatos, "Liquid Phase Electroepitaxy: Dopant Segregation", Journal of Applied Physics, Vol. 51, No. 1, (1986) pp. 29-43 7. T. Bryskiewicz, "Liquid Phase Electroepitaxy of Semiconductor Compounds", Progress in Crystal Growth and Characterisation, Vol. 12, (1986) pp. 29-43 8. Ram Kossowsky, "Surface Modification Engineering, Vol. 1: Fundamental Aspects", CRC press, 1989 65 9. Arthur W. Adamson, "Physical Chemistry of Surfaces", 4th edition, New York: John Wiley & Sons, Inc., 1982 10. John Zolper, "The Solution Growth of Gallium Arsenide on Silicon and Its Application to Gallium Arsenide Solar Cells", Ph.D Thesis, University of Delaware, 1987 11. B. Jayant Baliga, "Kinetics of the Epitaxial Growth of Silicon from a Tin Melt", Journal of Electrochemical Society: Solid-State Science & Technology, Vol. 124, No. 10 (1977) pp. 1627-1631 12. B. E. Sumner and R. T. Foley, "Liquid Phase Epitaxial Growth of Gallium Doped Si", Journal of Electrochemical Society: Solid-State Science and Technology, Vol. 125, No. 11 (1978) pp. 1817 13. Kenneth A. Jackson, "Nucleation from the Melt", Industrial and Engineering Chemistry, Vol. 57, No. 12 (1965) pp. 29-32 14. D. Turnbull, D. Fisher and R. L. Cormia, Journal of Chemical Physics, Vol. 34, p. 820 (1961) 15. D. R. Uhlmann and B. Chalmer, Industrial and Engineering Chemistry, Vol. 57 No. 9, (1965) p. 18 16. N. H. Fletcher, "Nucleation by Crystalline Particles", The Journal of Chemical Physics, Vol. 30, 941 (1959) pp. 237-240 66 17. E. V. Khamskii, "Crystallization from Solutions", Consultants Bureau, New York, 1969 18. S. W. Young, "Mechanical Stimulus to Crystallization in Supercooled Liquids", Journal of Chemical Society of America, Vol. 33 (1911) p. 148 19. R. S. Tipson, "Crystallization and Recrystallization", Techniques of Organic Chemistry, Vol. 3, ed. A. Weissberger (1959), New York, Inter Science 20. A. P. Kapustin, "The Effects of Ultrasound on the Kinetics of Crystallization", Consultant Bureau, New York, 1963 21. J. D. Hont and K. A. Jackson, "Nucleation of Solid in an Undercooled Liquid by Cavitation", Journal of Applied Physics, Vol. 37, No. 1 (1966) pp. 254-257 22. I. Crossley and M. B. Small, "Computer Simulations of Liquid Phase Epitaxy of GaAs in Ga Solution", Journal of Crystal Growth, Vol. 11 (1971) pp. 157-165 23. B. Jayant Baliga, "Morphology of Silicon Epitaxial Layers Grown by Undercooling of a saturated Tin Melt", Journal of Crystal Growth, Vol. 4 (1977) pp. 199-204 67 24. B. Jayant Baliga, " Isothermal Silicon Liquid Phase Epitaxy from Supersaturated Tin", Journal of Electrochemical Society: Solid-State Science and Technology, Vol. 125, No. 4, (1978) pp. 598-600 25. Henry T. Minden, "Constitutional Supercooling in GaAs Liquid Phase Epitaxy", Journal of Crystal Growth, Vol. 6 (1970) pp. 228-236 26. R. H. Saul and D. D. Roccasecca, "Surface Morphology of Liquid Phase Epitaxial Layers", Journal of Applied Physics, Vol. 44, No. 5, (1973) pp. 1983-1988 27. L. Royer, Bull. Soc. Fr. Miner., Vol. 51 (1928) p. 7 28. H. Nelson, RCA Review, Vol. 24 (1963) p. 603 29. G. W. Cullen, "The Preparation and Properties of Chemically Vapour Deposited Silicon on Sapphire and Spinel", Journal Crystal Growth, Vol. 9 (1971) pp. 107-125 30. Arnold Mille and Harold M. Manasevit, "Single Crystal Silicon Epitaxy on Foreign Substrate", Journal of Vacuum Science and Technology, Vol. 3, No. 2, pp. 68-78 31. J. J. Hsieh, "Handbook on Semiconductor", 1980, Chapter 6, pp. 415-497 32. Binary Alloy Phase Diagrams, Vol. 1, American Society for Metals, 1986 68 33. B. L. Mattes and R. K. Route, "A Temperature Gradient Cell for Liquid Phase Epitaxial Growth of GaAs", Journal Crystal Growth, Vol. 16 (1972) p. 219 34. S. I. Long, J. M. Bliiantyne and L. F. Eastman, "Steady State LPE Growth of GaAs", Journal Crystal Growth, Vol. 26 (1974) p. 13 35. H. Meinders, "A Alternative Method for Liquid Phase Epitaxy", Journal of Crystal Growth, Vol. 70 (1984) p. 420 36. V. N. Losvosky and G. S. Konstantinova, "Growth from High Temperature Solutions Effected by Chemical Potential Gradients", Journal of Crystal Growth, Vol. 52 (1981) p. 327 37. Walter Scott and R. J. Hager, "Solution Growth of Indium Doped Silicon", Journal of Electronic Materials, Vol. 85 (1979) p. 581 38. C. D. Thurmond and M. Kowalchik, "Germanium and Silicon Liquidus Curves", The Bell System Technical Journal, (1960) pp. 169- 204 39. C. D. Thurmond and M. Kowalchik, "Solid Solubility of Impurities in Ge and Si", Ibid, pp. 211-233 40. Fumio Shimuro, Semiconductor Silicon Crystal Technology, San Diego, Academic Press, 1989 69 41. I. Crossley and M. B. Small, "The Application of Numerical Methods to Simulate the Liquid Phase Epitaxial Growth of Gai_xAlxAs from an Unstirred Solution", Journal of Crystal Growth, Vol. 15 (1972) pp. 268-274 42. I. Crossley and M. B. Small, "Computer Simulation of Liquid Phase Epitaxy of GaAs in Ga Solution", Journal of Crystal Growth, Vol. 11 (1971) pp. 157-165 43. Hachiro Ijuin and Shun-ichi Gonda, "Computer Simulations of Liquid Phase Epitaxy of III-V Ternary Alloys" Journal of Crystal Growth, Vol. 33 (1976) pp. 215-222 44. R. Linnebach and E. Bauser, "Low Temperature Liquid Phase Epitaxy of Silicon ", Journal of Crystal Growth, Vol. 57 (1982) pp. 43- 47 70 CHAPTER THREE LigUID PHASE EPITAXY OF SILICON 3.1 Introduction In this chapter, the experimental investigation of the liquid phase epitaxy of silicon from various solutions is described. The aim of this work was to find appropriate solvents for the solution growth of Si on dissimilar substrates. The substrates were (100) and (111) oriented single crystalline silicon wafers. The doping level in heavily doped p-type thin films grown from A1 based solutions, and lightly doped n-type thin films grown from Au based solutions were determined by spreading resistance measurements. The crystal quality and electronic properties of silicon thin films were characterised by a variety of methods, including microscopy, chemical etching, photoluminescence, NAA (Neutron Activation Analysis) and PIXE (Proton Induced X-ray Emission). 3.2 Solvent Selection The selection of an appropriate solvent is a prerequisite for liquid phase epitaxial growth. The solutions which can be used for liquid phase epitaxial growth of silicon should preferably have the following properties: 1) Low melting temperature is preferred, so that growth might be achieved at low temperatures. Low processing temperature can 71 reduce thermal expansion mismatch between silicon and dissimilar substrates, reduce contamination from the substrate, reduce incorporation of impurities into the film due to decreased segregation coefficients, and also increase flexibility of substrate choice; 2) no formation of silicide; 3) sufficiently high solute solubility[1,2]; 4) low vapour pressure at growth temperatures; 5) low toxicity[3]. Various metallic solvents such as Ga, Al, Sn, In, Bi, Pb and Sb have been used for liquid phase epitaxial growth of silicon. Relatively high temperatures were used due to either high melting points of the metals or low silicon solubility at low temperatures[4-9]. Since most pure metals have very low silicon solubility at temperatures below 600°C, alloy solutions have been investigated [10-13]. Increased low temperature silicon solubility can be achieved when a metal described as Type I is alloyed with a metal of a second class described as Type II[ 11]. Type I metals such as Au and Al have relatively high melting temperatures, relatively low eutectic temperatures with silicon and high silicon solubility at the eutectic points. The Type II metals, e.g., Sn, Ga, Zn, Bi, In, Hg, and Sb, have relatively low melting point and very low silicon solubility at temperatures in the vicinity of the melting point. When binary alloys of Type I and Type II metals are formed, the pseudo-binary eutectic occurs at a 72 temperature and silicon content intermediate between those associated with the pure metals. This strategy allows silicon LPE growth at temperatures below the eutectic temperatures of Type I metals from solution with a reasonable silicon solubility(l-2%). Liquid phase epitaxy of silicon described in this chapter used alloy solutions of Al/Ga, Al/Sn, Al/Zn, Au/Bi, Au/Pb and Au/Sn. Measurements of silicon solubility in these alloys have been reported elsewhere! 11]. 3.3 Growth Facilities A standard horizontal slider boat first described by Nelson[14] was used as the growth vessel. The slider apparatus serves as a substrate holder and solution container. Advantages of the slider apparatus over other techniques such as dipping, are as follows! 15]: 1) the substrate wafer can be easily brought into and out of contact with the solution; 2) several solutions can be used in sequence; 3) growth is restricted to one side of the wafer; 4) substrate-solution contact is from the bottom of the solution where there is no oxide or other contaminants floating because these tend to float on the surface of the solution; 5) excess solution can be wiped off the wafer by the sliding action of the boat; 73 Metallic Solution Container with Two Solution Wells Solution Well ■MR ■m a wmm Hi Slider Direction Growth Wafer Base Source Wafer Slider Fig. 3.1 Sliding boat apparatus with arrangement for pre saturation with silicon 74 6) thermal equilibration and temperature profiling are greatly facilitated. The slider boat, consisting of a base, a slider and a metallic solution container with two solution wells, is made of high purity graphite material. Graphite has very good chemical and mechanical stability up to very high processing temperatures. Figure 3.1 shows a sketch of a graphite slider boat. The wiping ability of the sliding action of the boat depends on the smoothness of the surface of the silicon epitaxial layer and the clearance between the slider and the solution container of the boat. The graphite boat fits into a quartz tube which is installed in a diffusion furnace. The furnace was profiled to obtain a 20 cm long zone in the centre with temperature variations within + 0.5°C. A rotary pump is connected to one end of the quartz tube. The another end of the quartz tube is sealed by a stainless steel end cap with N2 and push rod inlets drilled through it. A thermocouple (S type) was inserted into the graphite boat close to the growth substrate to measure the temperature precisely during crystal growth. 3.4 Sample Preparation Single crystal wafers with (111) and (100) orientations were used to demonstrate liquid phase epitaxial growth of silicon. The silicon wafers with (111) orientation were sliced from CZ ingots with one side polished and (100) silicon wafers were prepared by the FZ growth method. The thicknesses of silicon wafers were from 280 pm 75 to 360 Jim and the resistivities (for both p-type and n-type ) were from 0.01 Gem to 1 £2-cm. The (100) oriented wafers with resistivities about lOOGcm (either p-type or n-type) were used as source wafers because (100) oriented Si wafers have a faster dissolving rate in the solutions. The source and substrate wafers were cleaned with RCA standard solutions [16]. The RCA#1 solution, typically 5-1-1 to 7-2-1 parts by volume of H20-H202-NH40H was designed to remove organic contaminants. The RCA 2 solution with proportion 5-1-1 to 8-2-1 by volume of H20-H202-HC1 was used to remove alkali and transition metals on the sample surface. After the two cleaning steps above, the source and substrate wafers were dipped in dilute HF solution to remove oxide from the wafer surface before loading them in the boat. 3.5 Alloy Solution Preparation The alloys were prepared from metals of the following purities: Au, 4N; Bi, Pb, Ga, Sn, and Zn, 5N; and Al, 6N. The elements were weighed with a precision of 10"4 grams. For Au based alloys, Au, Bi, and Pb were cleaned in a solution of aqua-regia for 10 minutes, then rinsed in DI water for 30 minutes, later rinsed in alcohol and finally dried by N2 gas. In the case of Al based alloys, Al, Sn, Ga, and Zn were cleaned with dilute HC1 for 10 minutes, then rinsed with DI water for 30 minutes, and finally alcohol rinsed and N2 dried. 76 The alloys were made in a vacuum ambient. Before heating the metals, the furnace was pumped down to a pressure of 10"4 torr, then the furnace was ramped up slowly from room temperature to the working temperature. The Au based alloys were heated for 4 hours and A1 based alloys were heated for 2 hours to ensure homogeneity of the alloys. 3.6.Experimental procedure The cleaned source wafer, substrate wafer, and alloy elements were set in the graphite boat and the boat was positioned in the centre of the furnace tube. The end of the quartz tube was sealed with an end cap. The furnace was evacuated by a rotary pump down to a pressure of 10"4 torr to remove oxygen and to test sealing integrity. Then the furnace was ramped up from room temperature to the working temperature over a period of 60 minutes. The alloy solutions were baked for several hours before being saturated with silicon. Saturation started by moving the source wafer under the solution. It usually took 45-60 minutes to saturate the solution with silicon. When the solution was brought into contact with the substrate wafer, insitu meltback was used to ensure an oxide free surface for subsequent nucleation. The meltback used was usually between 5°C to 20°C above the baking temperature for 60 minutes, depending on the silicon solubility in the solution. The growth temperature range from 580°C to 350°C was used for alloy solvents. For LPE of silicon from Sn solution (doped either with A1 or Sb), the growth temperature ranged from 800°C to 500°C. The cooling rates 77 Fig. silicon Temperatiore (T) 3.2 Homogenized The temperature Heating Source Contact Alloy UP Substrate Time(t) program 78 Meltback Contact RampCooling for liquid phase epitaxy of used in the experiments were from 0.25°C to 0.5°C/min. Figure 3.2 plots the temperature program for the whole experimental process. 3.7 Characterization of Thin Films The thin films were analyzed for several different features, such as surface morphology, doping properties and internal quality. Optical microscopy, Nomarski microscopy, scanning electron microscopy, Dektak II surface profiling, hot probe conductivity typing, and four point probe and spreading resistance measurements have been used to characterize the surface morphology, doping type, and doping concentrations of the films. Chemical etching has been used to investigate the internal quality of the thin films. Photoluminescence, NAA and PIXE have also been used to detect impurities in the thin films. 3.7.1 Surface Morphologies of Thin Films The surface quality of thin films depends on the solvent, the substrate, and the wettability between the solvent and substrate[17,18]. Good wetting is crucial for uniform meltback of the substrate, high density nucleation and early impingement of individual crystals. These factors can influence the quality and surface smoothness of the epitaxial layers. Surface contaminants and oxide are detrimental to the wetting of the silicon substrate by the solution. Removal of the surface oxide from the silicon substrate before starting crystal growth is a crucial step for subsequent complete wetting and continuous thin film growth. A1 based solutions 79 have good wettability on silicon substrates. Because A1 has a higher affinity for oxygen than does silicon! 17], a SiC>2 layer on the substrate surface is removed by chemical reaction. In the case of Au based solutions, a good vacuum or the presence of an oxygen reducing agent such as pure hydrogen flowing through the growth chamber is necessary to keep the substrate surface free of oxide before contact is made with the growth solution. Figures 3.3 and 3.4 illustrate the morphologies of two silicon epitaxial films grown on (111) oriented silicon wafers from the same solution (Sn:10wt%Al) at the same growth conditions but with different wetting conditions. In Fig.3.3, although the growth has reached 30 pm thickness locally, the layer is still not continuous due to poor wetting. In contrast to this, a continuous and smooth thin film ( Fig. 3.4) was obtained with a layer thickness of only 2 pm when wetting was improved, in this case by pumping down the growth chamber to lower than 10-4 torr to ensure an oxide free substrate surface before contacting with the solution. The surface morphologies of thin films on (111) silicon wafers grown from Al/Sn, Al/Ga, Al/Zn, Au/Bi, Au/Sn solutions were similar to that shown in Fig. 3.4. The rippled surface is attributed to a slight misorientation of the nominally (111) oriented substrate [6,19]. For the silicon thin films grown on (100) oriented substrates, the growth habit is quite different from that of films grown on (111) oriented Si substrates. It was much easier to obtain a continuous and good quality silicon epitaxial layer on (111) oriented silicon substrates. The (100) oriented crystals are pyramidal and have faster vertical growth rates. Therefore, a much higher nucleation density is 80 Pig. 3.3 Optical micro-graph of a discontinuous silicon epitaxial film on (111) Si substrate from Al/Sn alloy solution 81 100 \xm Pig. 3.4 No mars ki image of silicon epitaxial film grown on (111) Si substrate from Al/Sn alloy solution 82 Fig. 3.5 Optical micro-graph of silicon epitaxial film on (100) Si substrate 83 Fig. 3.6 Nomarski image of a smooth silicon epitaxial layer on (100) Si substrate 84 Fig. 3.7 SEM image of silicon epitaxial layer on (111) Si substrate from Au/Pb solution 85 needed to get continuous Si thin films on (100) oriented Si substrates than on (111). Figure 3.5 shows a continuous Si thin film (10 pm average thickness) on (100) oriented Si substrate, but with a very rough surface. This sample was grown from A1 doped Sn solution at a growth temperature of 750°C. The bright stripes in the picture are due to the different reflectance along the impinging boundaries of individual crystals. This surface structure indicates that initial nucleation density was still not high enough due to poor wettability between substrate and solution, which causes later impingement of individual crystals with uneven growth rates. As the solution continued to cool, the growth of predominant crystals became saturated and fill-in growth increased. Finally when the film is grown thick enough, the thin film becomes very smooth as depicted in Fig. 3.6. In the case of films grown from Au/Pb solutions on (111) silicon substrates, there are two kinds of growth appearing on the surface. The first type corresponds to the long, thick crystals of Fig.3.7. The second type corresponds to the regions between these large crystals. A possible mechanism for this growth is as follows. From the ternary phase diagram of the Au/Pb/Si system[20], there exists two immiscible liquid phases engendered by the corresponding gap in the binary Pb/Si system[21]. If the solubility of Si in these two liquids is different, the epitaxial growth must occur by monotectic reaction where the meltback and growth rates for the two liquid phases are different. Similar phenomena have been observed in LPE layers of silicon grown from Pb/Sn solution[22]. Dektak II scanning of a (111) Si substrate after a 15°C meltback using Au/Pb alloy showed that 86 there are high densities of deep pits distributed on the surface with depth of about 4 pm. These deep pits are believed to be caused by the liquid phase with higher Si solubility. The large crystals subsequently grew in these areas. The smaller crystals in between the big crystals were believed to have grown from the liquid phase with lower Si solubility. The comparison of the doping concentration of the big crystals with that of the small crystals is presented in Table 3.1. The doping concentration in the small crystals is lower than that in the big crystals. This supports the view that these regions have grown from different solutions and that growth from Au/Pb alloys involves two immiscible liquid phases. 3.7.2 Doping Properties of Silicon Epitaxial Layers The silicon thin films grown from A1 based solutions were determined to be doped p-type by hot probe[37] diagnosis. Spreading resistance measurements[38] show high doping concentrations of these films as listed in Table 3.1. The incorporation of A1 and Ga is probably the source of heavy p-type doping because the segregation coefficients of A1 and Ga are relatively high, 0.002 and 0.008 respectively at temperatures of about 1000°C[1]. These heavily A1 or Ga doped layers are not suitable for the bulk region of a Si solar cell, but they can be used as a top junction layer[4,23] or as a back surface field layer (a heavily doped layer next to the metal contact) [24,25]. 87 Table 1: Growth Conditions and Characteristics of Si Epitaxial Layers o o o o o to to Ol to 00 o o o ►-* o o 03 o o 88 The silicon layers grown from Au based solutions were shown to have n-type conductivity with moderate doping concentration. Although the doping was much lower than that of films grown from A1 based alloys, it was higher than expected. The solid solubility of Au in Si is lower than 10 /cm at the growth temperatures! 1], and Pb and Sn are isoelectronic elements which should not introduce shallow donor or acceptor levels[6]. The positive identification of the n-type dopant has not yet been made. Bismuth is a candidate for the thin film grown from Au/Bi solution because Bi is a group V element and so is a donor impurity in silicon. Au is another possible source since it gives a donor level in silicon[26]. Other possible sources may be trace quantities of the more common n-type dopants ( As, P ) in the source wafer or boat materials as detected by NAA. A fourth possibility is oxygen thermal donors which are compounds of silicon with oxygen such as Si04. The thermal donors form rapidly in the 400°C to 500°C temperature range[27,28], with a rate proportional to the oxygen content to the fourth power. The thin film growth temperatures used for Au based solvents range from 450°C to 380°C, which corresponds to the oxygen donor forming temperatures. 3.7.3 Quality Analysis of Silicon Thin Films 1. Chemical Etching The quality of silicon epitaxial layers deposited via vapour deposition has been widely investigated. Stacking faults were found 89 to be a common feature in single crystal layers of silicon deposited on silicon substrates. Most stacking faults were found to originate at the interface between the substrate and the epitaxial layer, and were reported to be caused by various properties of the substrate surface such as oxide residue, surface damage, and a variety of contaminants [29,33]. Stacking faults are usually not visible on the as-grown surface with an optical microscope. They can be detected, however, by etching the grown surface with suitable chemical etchants because the stacking fault planes exhibit faster etch rates than the bulk crystal. The intersections of the stacking fault planes with the grown surface are revealed as grooves. Many chemical etchants, such as CP4 etch, Dash etch, and Sirtl etch, serve this purpose. Sirtl etch[35] was used to reveal crystal defects in silicon liquid phase epitaxial layers. The samples used for etching are p-type and n-type (111) silicon layers grown from doped Sn solutions at growth temperature of 800°C. On etching the as-grown surface, most of the stacking faults were exposed in the form of equilateral triangles. In some cases, the etch figures were incomplete triangles, single lines parallel to a side of the triangles, or complicated geometrical configurations. The preferential etching took place along the side of the triangle while the inside of the triangle etched at the same rate as the outside surface. Figure 3.8 shows a typical triangle etching figure which is quite similar to the etch figures of (111) orientation silicon epitaxial layers deposited by vapour deposition[34]. On prolonged etching, the size of the centre of the triangle became smaller, until the 90 triangular shape became a point when the depth of etching was the same as the thickness of the epitaxial layer. On repeated etching, the figures remained constant in number until all the layer was dissolved away, when they subsequently disappeared also. From this fact, it seems reasonable to conclude that the imperfections were introduced when growth of the layer started. The density of etch pits was found higher near macro-defect areas, such as mechanically damaged areas or pin-holed areas. Figure 3.9 shows an etching pattern near an area damaged by the action of the slider. The etch pit density is much higher near the scratch line than it is in the surrounding area. This is due to the mechanically damaged area providing more nuleation sites for formation of crystal defects and stacking faults. The etch pit density was higher for n-type layers than it was for p-type layers. The etch pit density for n-type layers was about 105/cm2 and that for p-type layers was about 104/cm2. The causes of faulting were reported as being due to impurities on the substrate surface, such as insufficiently cleaned substrate, surface oxide, or solvent residue on the substrate surface[29,33]. These impurities could increase the fault concentration in the grown material. The p-type layers were grown from solutions containing A1 which is capable of removing oxide from the substrate surface. Therefore, an oxide free surface was ensured before subsequent silicon film growth. In contrast, the growth of n-type layers was obtained from Sb doped Sn solutions. In the present experiments, the condition of the substrate surface is mainly determined by the vacuum system. A "gap" was possibly formed in the interface of the substrate and the grown film. The 91 Fig. 3.8 Optical micro-graph of silicon epitaxial layer on (111) Si after Sirtl etch 92 Fig. 3.9 Optical microscopic image of silicon epitaxial layer on (111) silicon near a scratching line after Sirtl etch 93 m 200 Jim existence of the "gap" would initiate the growth of crystal defects and stacking faults. 2. Composition Analysis Photoluminescence analysis of A1 and Ga doped p-type layers showed the presence of A1 and Ga in the silicon films The presence of Bi in the layers grown from Au/Bi solution was also confirmed by PL measurement[36]. NAA and PIXE measurements detected Au and As in the Si layers grown from Au based solutions, but much of it seems to originate from inclusions in the layer. Arsenic was present in quantities sufficient to account for the doping concentration of the samples[36]. The presence of precipitates of Au related solution in silicon epitaxial layers was confirmed by isotropic chemical etching and electron microscopic analysis. Figure 3.10 shows a backscattering SEM image of a chemically etched silicon epitaxial layer grown from Au/Bi solution. The bright spots represent elements heavier them silicon. EDX scanning of these spots detected they were precipitates of Au, Bi and Si as illustrated in Fig. 3.11. The introduction of solution precipitates is believed to be caused by poor initial nucleation, which, in turn, is due to surface oxides and contaminants on the silicon substrate. If such film was to be processed into a cell at a higher temperature than that at which the film was grown. Au from the precipitates would diffuse through the silicon film. Since Au can introduce a deep level recombination centre in silicon, high concentrations of Au will significantly reduce the 94 Fig. 3.10 Backscattering SEM image of chemically etched silicon epitaxial layer grown from Au/Bi alloy solution 95 V§ * ~PpVi i ? * Live’ 100 s Preset•" 100 s Rema i ni ng 0 s 1 f* „ - * c— ~*F 1 : , Cr Ck L .j/ ? <&'■'* Dtdd i- : 1 i I M : i! / C K 5, c . L - -JA ••:• . r: .; : fy ■X— i 1 ~^y ■ : ; yll 5. HbO k eU 'C y ip$= 4 k; eh 2 c’S' “\ v. Hem i * Fig. 3.11 EDX analysis of the metal precipitates shown in Fig.3.10. Peaks at 1.74KeV, 2.12 KeV and 2.42KeV correspond to the line of silicon, M** line of gold and La line of bismuth respectively 96 minority carrier lifetime and lower the performance of thin film silicon photovoltaic devices. 3.8 Applicability of the Solutions for Silicon Growth on Dissimilar Substrates The purpose of performing silicon liquid phase epitaxy experiments from various alloy solutions was to find an appropriate solvent for depositing Si on dissimilar substrates at low temperatures. Both A1 and Au based solutions have the advantage of being suitable for silicon liquid phase epitaxial growth at temperatures below 600°C. The silicon thin films grown from A1 based solutions were usually quite smooth and there was usually no "carry-over" of metal residue covering the surface of the thin film. If there was carry-over on the thin film surface due to imperfect slider action, the carry-over was removed quite easily in aqua-regia solution and left no contaminants. The quality of silicon thin films grown from Au based solutions was found to be poorer than that of thin films grown from A1 based solutions in the current experiments. A carry-over was often left on the surface of the silicon epitaxial layer. When the temperature was lowered to room temperature at the conclusion of the experiment, the carry-over formed mixtures of compounds on the silicon surface, e.g Au2Bi+Si+Bi for Au containing 60wt% Bi solution and Au2Pb+Si+AuPb2 for Au contaning 60wt% Pb solution[20,21]. Although the carry-over could be removed by aqua-regia, the exposed silicon surface after removing the carry-over looked quite different 97 from areas where no carry-over had been present. This area of silicon exhibited a very low resistivity (<0.001 Qcm), which is not suitable for solar cell application. The composition of the film remaining after removal of the carry-over has not been determined and require further investigation. It could be silicon grown abnormally when the solution cools down from the growth terminating temperature to room temperature. A carry-over free surface is necessary for the films grown from Au based solutions if the films are to be useful for semiconductor device fabrication. The carry-over usually depends on the surface smoothness of the grown film and the sliding action of the boat. Usually, mirror-smooth thin films don't retain carry-over on the surface. In the case of silicon growth on dissimilar substrates, the surface of the thin film is expected to be rough due to its polycrystalline structure. If these films are grown from Au based solutions, the carry-over will cover the whole surface of the thin film and contaminate the surface quality. Therefore, Au based alloys are not suitable for solution growth of silicon on dissimilar substrates using the normal slider boat arrangement. A1 based solutions, especially Al/Sn alloy solutions, were chosen for further investigation of polycrystalline silicon thin film growth on dissimilar substrates. 3.9 References: 1. C. D. Thurmond and M. Kowalchik, "Germanium and Silicon Liquidus Curves", Bell Sys. Tech. J., Vol. 39, (1960) p. 169 98 2. B. Legendre, C. Soulean, C. C. Hancheng and N. Rodier, J. Chem. Res., Vol. 5, (1978) p. 168 3. N. I. Sax and R. J. Lewis, "Hazardous Chemicals Desk Reference", Van Nostrand Reinhold Company, New York, 1987 5. Kentaro Ito and Kunio Kojima, "Solution-Grown Silicon Solar Cells" in Proc. 1st Photovoltaic Science and Engineering Conference in Japan, 1979 printed in Japanese Journal of Applied Physics, Vol. 19 Supplement 19-2 (1980) pp. 37-41 6. B. Jayant Baliga, "Silicon Liquid Phase Epitaxy - A Review", Journal of Electrochemical Society: Solid-State Science and Technology, Vol. 133, 1 (1986) pp. 5C-14C 7. Walter Scott and R. J. Hager, "Solution Growth of Indium Doped Silicon", Journal of Electronic Materials, Vol. 85 (1979) p. 581 8. D. Kass and M. Warth, "Silicon and VLSI Technology", Physica, Vol. 129B (1985) pp. 161-165 9. M. G. Mauk, "Thin Film Solar Cells with Optical Confinement and Their Fabrication by Solution Growth", Ph. D. Thesis, University of Delaware, Dec. 1986 10. B. Girault, F. Cherrier and A. Joullie, "Liquid Phase Epitaxy of Silicon at Very Low Temperatures", Journal of Crystal Growth, Vol. 37 (1977) pp. 169-177 99 11. Soo Hong Lee and Martin A. Green, Journal of Electronic Materials, Vol. 20, No. 8 (1991) pp. 635-641 12. Soo Hong Lee, Stephen A. Healy, Trevor L. Young and Martin A. Green, 'Very Low Temperature Liquid Phase Epitaxial Growth of Si", Materials Letters, Vol. 9 (1990) pp. 53-56 13. Zhengrong Shi, Trevor L. Young and Martin A. Green, "Low Temperature Liquid Phase Epitaxy of Silicon", Materials Letters (to be Published, 1991) 14. Nelson, "Depositing Successive Epitaxial Semiconductor Layers from the Liquid Phase", US Patent, No. 3565702 (1971) 15. James B. Mcnneely, Robert B. Hall and Allen M. Barnett, 'Thin- Film Silicon Crystal Growth on Low Cost Substrate", Journal of Crystal Growth, Vol. 70(1984), pp. 420-426 16. W. Kern and D. A. Puotinen, " Cleaning Solutions Based on Hydrogen Peroxide for Use in Semiconductor Technology", RCA Review, (June 1970) p.187 17. John Zolper, "The Solution Growth of Gallium Arsenide on Silicon and Its application to Gallium Arsenide Solar Cells", Ph. D. Thesis, University of Delaware, 1987 100 18. E. Bauser, "Microscopic Growth Mechanisms of Semiconductors: Experiments and Models", Journal of Crystal Growth, Vol. 69 (1984) pp. 561-580 19. B. Jayant Baliga, "Morphology of Silicon Epitaxial Layers Grown by Undercooling of a Saturated Tin Melt", Journal of Crystal Growth, Vol. 41(1977) pp. 199-204 20. P.Legendre and C. Hancheng. Bull. Soc. Chim. Fr.(1989) p.53 21. 11. M. Hansen and K. Anderko, "Constitution of Binary Alloys", McGraw-Hill, New York, 1958 22. H. J. Kim, "Liquid Phase Epitaxial Growth of Silicon in Selected Areas", Journal of Electrochemical Society: Solid-State Science and Technology, Vol. 119, No. 10 (1977) pp. 1394-1398 23. Kentaro Ito and Tatsuo Nakazawa, "Silicon Solar Cells Made by Liquid Phase Epitaxy", Proc. 3rd Photovoltaic Science and Engineering Conference in Japan, 1982 reprinted in Japanese Journal Appied Physics, Vol. 21 Supplement 21-2 (1982) pp. 125-129 24. J. Mandelkom and J. H. Lamneck: "A New Electric Field Effect in Silicon Solar Cells", Journal of Applied Physics, Vol. 44, (1973) pp. 4785-4787 25. M. P. Gollewiski and C. R. Baraona, "Low-High Junction Theory Applied to Solar Cells", Conf. Record, 10th IEEE Photovoltaic Specialists Conf., Palo Alto, (1973) pp. 40-49 101 26. Sheng-Lyang Jang and Gijs Bosnian, "Experimental Evidence for a Second-Donor Level of Gold in Silicon", Journal of Applied Physics, Vol. 65, No. 12 (June 1989) pp.4809-4814 27. W. Kaiser and H. L. Frisch, "Mechanism of the Formation of Donor States in Heat-TYeated Silicon", Physical Review, Vol. 112, No. 5 (Dec. 1958) pp. 1546-1554 28. A. Ourmazd and W. Schroter, "Oxygen-Related Thermal Donors in Silicon: A New Structural and Kinetic Model", Journal of Applied Physics, Vol. 56, No. 6 (1984) pp. 1670-1681 29. C. W. Pearce and R. G. McMahon, "Role of Metallic Contamination in the Formation of "Saucer" Pits Defects in Epitaxial Silicon", Journal of Vacuum Science and Technology, Vol. 14, No. 1 (1977) pp. 40-43 30. D. Pomerantz, "A Cause and Cure of Stacking Faults in Silicon Epitaxial Layer", Journal of Applied Physics, Vol. 38, No. 13 (1967) pp. 5020-5026 31. T. L. Chu and J. R. Gavaler, "Stacking Faults in Vapour Grown Silicon", Journal of the Electrochemical Society, Vol. 110, No. 5 (1963) pp. 388-393 32. Hideki Tsuya, Kohetsu Tanno, and Fumio Shimura, "Reduction of Saucer Pit Microdefects in Epitaxial Silicon Wafer by Intrinsic Gettering", Applied Physics Letters, Vol. 36, No. 8, (1980) pp. 658-660 102 33. B. A. Joyce, "The Growth and Structure of Semiconductor Thin Films", Rep. Prog. Phys., Vol. 37 (1974) pp. 363-420 34. K. O. Batsford and D. J. D. Thomas, "Defects in Vapour-Grown Silicon Layers", Solid-State Electronics, Vol. 5 (1962) pp. 353-360 35. E. Sirtl and A. Adler, Z. Metalkd, Vol. 52, (1961) pp. 529 36. B. Chan, Private Communication 37. "Standard Test Methods for Conductivity Type of Extrinsic Semiconductor Materials", ASTM: F 42-77 (1987) pp. 46-52 38. Solecon Laboratory Incorporated, California, U.S.A. 103 CHAPTER FOUR GRAPHOEPITAXY OF SILICON 4.1 Introduction This chapter describes the graphoepitaxy of silicon on patterned thermally-grown SiC>2 layers on silicon substrates. If good quality oriented silicon thin films can be deposited on patterned SiC>2 substrates, the same technique could be used to produce oriented silicon thin films on glass substrates due to the similarity of SiC>2 and glass. Relief patterns were created by photolithography in SiC>2 layers grown on silicon substrates. Growth experiments were performed from Al/Sn alloy solutions at temperatures down to 400°C. X-ray diffraction and SEM images showed that the graphoepitaxially grown crystals have (111) preferred orientation. The minimisation of the free energy of nucleation at the perpendicular face meeting at interior comers was proposed to explain the graphoepitaxial orientation observed in this work. 4.2 Background Review At the present time, there is considerable interest in developing techniques for producing Si films on insulating substrates such as SiC>2. These layers have advantages for three dimensional integrated circuits and other substrate isolated high speed microelectronic devices [1,6]. The acronym SOI (silicon on insulator) has come to be accepted for this field of research. The most mature of all SOI 104 technologies is silicon on sapphire (SOS) [2-4]. The lifetime and mobilities of carrier in silicon layers on sapphire, however, are lower than those in bulk single crystal silicon because of a high density of defects at the silicon-sapphire interface which propagate into the grown layer[2], Silicon grown over Si02 would be a preferred alternative for good quality device fabrication on an insulator because of the proven high quality of the interface between silicon and SiC>2[5] and the lower substrate cost compared with SOS. One of the approaches to obtain SOI films on Si02 is epitaxial lateral overgrowth by CVD, LPE or other techniques[7,8]. The silicon films are seeded through openings in the Si02 mask. If no nucleation of silicon on the Si02 surface takes place, the silicon grows vertically to the mask level and then laterally over the Si02 mask. Growth can be stopped at any stage, giving silicon islands defined by the oxide windows or partially formed over Si02, or can be continued until growth fronts seeded from different windows meet, forming a continuous film of silicon. Another approach to creating orientated, single crystal silicon films on insulating substrates is the graphoepitaxial growth of silicon by recrystallization or solution growth on a patterned insulating substrate [9-14]. Graphoepitaxy, the phenomenon of crystallographic orientation on an amorphous substrate patterned with a surface relief grating was first demonstrated in experiments on the precipitation of KC1 from aqueous solution! 18]. Orientated KC1 crystallites were obtained by deposition on a fused silica substrate that had been etched to form a grating with a square wave profile 105 cross section, which mimics the natural crystalline habit of KC1. Graphoepitaxy of metals on patterned amorphous substrates has also been investigated! 15-17]. By using fused quartz substrates patterned with square wave cross section grooves, graphoepitaxy was achieved[10,11] for continuous silicon films crystallized by a process yielding (100) texture [i.e., (100) planes tended to be parallel to the substrate surface]. In addition, other investigators have reported orientation of Si and Ge crystals on surface relief patterns in Si02 substrates [10,11]. 4.3 Mechanisms of Graphoepitaxy[9] A variety of mechanisms can produce orientation, or induce reorientation, relatively to an artificial pattern. These can be divided into two broad categories: a) those that depend on orienting microcrystals that are mobile within the medium of crystallisation [19]; and b) those that operate on material in which crystalline grains cannot move as rigid bodies relatively to the substrate. For category (a), orientation depends on the development of faceted morphologies in the mobile crystallites which either attach to relief structures [19] or acquire orientation through capillary forces[9]. Orientation in films with immobile crystalline grains, on the other hand, occurs either at nucleation, or through some type of internal reorientation during crystal growth, or through preferential growth of a particular orientation. Most Si and Ge graphoepitaxially oriented films are formed through category (b)[9]. The graphoepitaxially oriented films based on the category (b) mechanism were grown basically via the following two approaches: 106 1) deposition of material onto a patterned surface with orientation occurring at nucleation; 2) deposition of material onto a patterned surface with reorientation occurring during film growth. For approach (1), nucleation is probably initiated at the top edge comer or bottom interior comers in the grooves where free energy of nucleation is minimised. Radii of curvature of relief structures are very small (~5 nm), very close to the size of critical nuclei. In approach (2), the reorientation of crystals proceeds during crystal growth. This process can be achieved through[9]: a) reorientation as growth proceeds from nuclei; b) reorientation at coalescence; or c) preferential growth of those grains that are oriented relative to an artificial pattern. These mechanisms explain the success of the periodic regrowth technique [20]. By alternatively changing the temperature above and below the equilibrium value in a periodic manner during the early stage of growth, poorly aligned and defective regions of a film should be preferentially removed during etch back. This results in preferential growth of good quality, large crystals. Another example of approach (2) is the growth of graphoepitaxial films of Si and Ge on patterned amorphous substrates via laser and strip heater reciystallization] 11,12,21]. Material is initially deposited in an amorphous or fine-grain polycrystalline form over an artificial surface pattern (or the pattern is 107 put in, or on top of, the deposited material) and, in a second step, the material is partially melted such that grains aligned with respect to the pattern are preferentially retained. The melted Si subsequently grows on the solid seeds in the groove to form a continuous graphoepitaxial film. Similar results can be achieved by solid-state recrystallization and the solution growth method. 4.4 Preparation of Relief Patterns on Si02 Substrates A theoretical model of the graphoepitaxy process [11,18] predicts that methods that yield uniform films on smooth amorphous substrates should yield uniformly oriented films if such film formation is carried out over an appropriate surface relief structure in the amorphous substrate. For example, if a film formation method yields a (100) texture (i.e., (100) planes of grains are parallel to the substrate surface but with orientation random in the surface plane) on a smooth amorphous substrate, such as depicted in Fig. 4.1(a), then the same method should yield a uniformly oriented film on the structures depicted in Figs. 4.1(b) and (c) provided the spatial period of the grating is small compared to the normal grain size. Polycrystalline films that exhibit (111) texture on a smooth amorphous substrate would require relief structures such as depicted in Figs. 4.2(b), (c) and (d), in order to be oriented uniformly. An important conclusion from the theoretical model is that film formation methods that closely approach equilibrium are preferred for graphoepitaxy! 11,18]. 108 Fig. 4.1 Schematic illustration of: a) grains of polycrystalline film that exihabits (100) texture on a smooth amorphous substrate; b) uniform (100) orientation obtained when (100) textured film is formed on a square-wave structure; c) uniform (110) orientation obtained when the (100) textured film is formed on a 90° "saw tooth” structure[11]. 109 (110) RTTT> . 109.: Fig 4.2 Schematic illustration of: a) grains of a polycrystalline film that exhibits a (111) texture on a smooth amorphous substrate; b) uniform (100) orientation obtained when the (111) textured film is formed on a 70.5° ’’saw tooth” structure; c) uniform (110) orientation obtained when the (111) textured film is formed on a 109.5° "saw tooth” structure; d) uniform (111) orientation obtained when the (111) textured film is formed on a relief grating with facets intersecting at 109.5° and 70.5°[11]. no 7 |Lim 3 jam Fig. 4.3 Schematic drawing of the cross-section of the micro grooves formed on SiC>2 substrate ill With current technology it is easier to fabricate square-wave cross sections than other cross-sections depicted in Figs. 4.1 and 4.2. Square-wave (Fig. 4.1(b)) micro-grooves were created on SiC>2 substrates by photolithography. Clean (100) oriented silicon wafers were initially oxidised in a diffusion furnace to grow a SiC>2 layer about 400 nm thick. Positive photoresist was spun onto the SiC>2 substrate for a subsequent masking process. A mask with period of 10 pm (3 pm transparent and 7 pm opaque) was used to pattern the SiC>2 surface. The exposed samples were developed using photoresist developer and a pattern etched into the SiC>2 layer to a depth of 100 t nm in a buffered HF solution. A schematic drawing of the cross section of the relief pattern is depicted in Fig. 4.3. 4.5 Experimental The growth of silicon on the patterned SiC>2 layers was carried out from Sn/Al solution. The growth facility used is the same as that for liquid phase epitaxial growth of silicon as described in Chapter 3. The solution (Sn:10wt%Al) was initially baked for two hours at a temperature of 550°C and then saturated with silicon. For solution growth of silicon on unpattemed Si02 substrates, when the solution was brought into contact with the substrate, the solution was kept at a temperature of 550°C for 20 minutes before being ramped down. In the case of silicon growth on patterned Si02 substrates, the temperature of the solution was raised 15°C ("meltback") after the solution was brought into contact with the substrate. This "meltback" was actually reduction of oxide on the sample surface by A1 contained in the solution and thus tended to improve the wettability between 112 the solution and substrate. Since the substrate is a thin SiC>2 layer on a wafer, a very short contact time and a slight "meltback" should be used before the solution is ramped down. Otherwise, the the reduction of the oxide will damage relief patterns on the Si02 surface or even etch through the Si02 layer. The temperature was then ramped down 80°C with a cooling rate of 0.25°C/min.. 4.6 Random Nucleation of Silicon on Si02 Substrates Solution growth of silicon was initially explored on smooth, unpattemed Si02 substrates. There was no crystal growth on most of the surface area except in localised areas. Crystals in these areas usually grew along a straight line with a high nucleation density as illustrated in Fig. 4.4. The crystals seem to originate from a single line and extend out laterally. These crystals were believed to be initiated by cavitation nucleation as described in Chapter 2. When the substrate (in the slider) was moved into contact with the solution, there was a rapid relative movement between the solution and substrate. There was some mechanical damage to the substrate surface during this procedure due possibly to hard impurity particles in the solution or an excessively tight sliding action. Instant damage of the substrate surface created a cavity in the solution. As the cavities expanded and collapsed, locally high transient pressure largely undercooled the liquid and caused nucleation[22]. If the scratches caused by the slider action have anisotropic surface energy suitable for graphoepitaxial growth, oriented crystal 113 Fig. 4.4 Nucleation pattern of crystallites along a scratching line 114 growth could occur along them. However, If scratching damage cuts through the SiC>2 layer, the underlying silicon will seed the growth. This phenomenon has been observed in some experiments. 4.7 Silicon Crystals on Patterned Si02 Substrates On patterned Si02 substrates, there was a high density of silicon growth islands with the largest crystal having an area of 3 mm2. Two kinds of crystal morphologies appeared on the substrate surface. Most grown crystals had a hexagonal morphology as shown in Fig. 4.5 with a faceted plane parallel to the substrate surface, which is the typical shape of (111) oriented crystals. The second type of crystals had a pyramid shaped morphology. These crystals are believed to be grown on areas where the SiC>2 surface layer was damaged and the underlying silicon seeded the crystal growth. This is because the substrate was a thermally grown SiC>2 (400 nm) layer on a (100) oriented silicon wafer. The X-ray diffraction of the crystals showed two strong peaks in the diffraction profile (Fig. 4.6). One of the peaks corresponds to the (100) orientation. This is believed to be diffraction primarily due to the crystal structure underneath the Si02 surface layer. The grown pyramidally shaped crystals also contribute to the (100) peak in the X-ray diffraction profile. Another peak corresponding to (111) oriented crystals is believed to be from crystals grown by the effect of the patterned Si02 substrates. For graphoepitaxially oriented crystals, each crystallite can be characterized by two angles[23]: 0, which is the deviation of the <111> direction from the substrate normal, and <}), which is the 115 deviation of the <111> direction from the grating axis. Over reasonable areas, the value of 0 and <}) have a distribution about some mean value. The half-width at half-maximum (HWHM) of the 0 distribution is called the "tip angle" and the HWHM of the (J) distribution is called the "spread angle". The tip angle for silicon graphoepitaxially oriented films on Si02 was measured by X-ray diffractometer. The diffraction angle corresponding to the (111) peak was found and then the position of the detector was fixed. By rotating the specimen within a small range of angles, any grains off (111) orientation will be picked up by the detector. Figure 4.7 shows the grain distribution of a graphoepitaxially grown silicon film. The tip angle for this film is less than 2° as depicted in Fig. 4.7. 4.8 Discussion Graphoepitaxy depends on a precisely defined surface relief structure. The original idea was that a surface relief structure appropriate for the surface energy anisotropy of the deposit/substrate system under consideration would significantly reduce the energy of a particular crystallographic orientation[17,18]. Thus, films with an axial texture on a flat substrate might be deposited with only small angle grain boundaries on a substrate with an appropriate relief structure. The barriers to achieving this equilibrium configuration are usually formidable. It was proposed that the interior comer radii of the square wave relief patterns produced on the substrate surface (5 nm) might be less than, or very close to, the critical radius for nucleation in some crystal growth systems. Minimisation of interfacial energy appears to be responsible for the graphoepitaxial 116 Pig. 4.5 SEM image of (111) oriented crystallites on patterned Si02 substrate 117 r----—------fi P0LV4 s?.' 0.02Q0 tn: 5.00 CuKal +2 ! (111) (IOC . i I ——------1——______t______i______i______i______. ______., .. /r yL .______< 27.500 x : 2theta y : 15484. Linear 77.500> Fig. 4.6 X-ray diffraction of graphoepitaxially orientated crystals 118 (Ill) Fig. 4.7 Grain distribution of graphoepitaxially oriented silicon crystals determined by X-ray diffractometer 119 alignment observed in liquid crystals and has been incorporated into models to explain the graphoepitaxial recrystallization of silicon films [12], The results and observations reported here suggest that the silicon crystals are not oriented during crystal growth or oriented through mobile faceted micro-crystals which are aligned by relief structures during the growth. This is due to the fact that if the oriented crystals are formed by the mobile micro-crystals, the part of the relief structures which receive the micro-crystals should be larger than the microcrystalline size[9]. In contrast to this, the silicon crystals were believed to be oriented at the nucleation stage. The size of micro-grooves used in this experiment is about 4 pm wide and 100 nm deep. This size is much larger than critical size of nuclei. Consequently the oriented crystal growth was not due to the anisotropic surface energy of the deposit/substrate system. This is because, in the case of oriented material with immobile grains, the spatial period of the artificial pattern should, generally, be smaller than the size of grains which would naturally develop on the substrate [9]. The determination of the exact mechanism of the graphoepitaxially oriented silicon crystal growth observed still needs more characterization and understanding. However, at least it can be inferred that the patterned SiC>2 substrates do influence the orientation of silicon crystals grown on them. The pronounced faceting of the silicon islands and their hexagonal growth morphology 120 are the decisive characteristics demonstrating graphoepitaxial alignment. Examination of deposits at early stage of the growth revealed that most of the smaller islands were located at interior comers of the relief structure. These crystals may initially be nucleated and oriented at the comers, or the islands may nucleate at the comers in some other orientations, then reoriented graphoepitaxially at a latter stage. These islands grow larger to fill the grooves and overgrow the steps to coalesce with other crystals. Figure 4.8 illustrates the coalescence of two crystals from neighbouring grooves. A similar nucleation mechanism has been reported for the graphoepitaxy of electrodeposited tin[17]. In that case, the role of the relief structure is principally to laterally confine the growth islands. The adhesion of the islands to the substrate must be weak enough to allow lateral motion of the islands away from surface steps before overgrowing these steps. Otherwise the island may overgrow the relief structure without reordering azimuthally[ 17]. The purpose of this work was to explore graphoepitaxy and the properties of graphoepitaxially oriented silicon crystals on patterned Si02 substrates. If continuous graphoepitaxially orientated silicon thin film can be obtained on patterned Si02 substrates, the same technique could be used to produce oriented Si thin films on glass substrates due to the similarity of SiC>2 and glass, or onto SiC>2 coated glass. 121 Fig. 4.8 Impinging growth of graphoepitaxial silicon crystals 122 4.9 References: 1. See papers presented during 161st Electrochem. Soc. Meeting, Montreal, Canada, May 1982, Session on Growth of Single Crystals on Amorphous substrates Electrochem. Soc. Extended Abstracts 82-1 (1982) pp. 229-263 2. G. W. Cullen, "The Preparation and Properties of Chemically Vapour Deposited Silicon on Sapphire and Spinel", Journal of Crystals Growth, Vol. 9 (1971) p.107 3. J. E. A. Maurits, "Problems and Solutions in the Preparation of SOS Wafers", Solid State Technology, Vol. 20 (Apr. 1977) p. 81 4. A. Miller and H. M. Manasevit, "Single Crystal Silicon Epitaxy on Foreign Substrates", Journal of Vacuum Science and Technology, Vol. 3, No.2, p.68 5. S. M. SZE, VLSI Technology, McGraw-Hill Book Company, 1988 6. M. Tamura and M. Miyao, "Laser Recrystallized SOI and Its Application for Device Fabrication", Japan Annual Reviews in Electronics, Computers and Telecommunications, Vol. 13, Semiconductor Technologies [ed.: J. Nishizawa] 7. Eiji Fujii and Kohji Senda, "Lateral Seeding of Silicon on Insulator by Using an Elliptically-Shaped Laser Beam", Japanese Journal of Applied Physics, Vol. 26, No. 7 (1987) p. 1190 123 8. L. Jastrzebski, "SOI by CVD: Epitaxial Lateral Overgrowth (ELO) Process-Review", Journal of Crystal Growth, Vol. 63 (1983) pp. 493- 526 9. Henry I. Smith, "Silicon-on-Insulator by Graphoepitaxy and Zone melting Recrystallization of Patterned Films", Journal of Crystal Growth, Vol. 63 (1983) pp. 527-546 10. M. W. Geis, D. C. Flanders and Henry I. Smith, "Crystallographic Orientation of Silicon on an Amorphous Substrate Using an Artificial Surface-Relief Grating and Laser Crystallisation", Applied Physisc Letters, Vol. 35, No.l (1979) pp. 71-74 11. M. W. Geis, D. C. Flanders and Henry I. Smith, "Grapho-epitaxy of Silicon on Fused Silica Using Surface Micropattems and Laser Crystallisation", Journal Vacuum Science Technology, Vol. 16, No. 6 (Nov. 1979) pp. 1640-1643 12. Henry I. Smith and C. V. Thompson, "The Mechanism of Orientation in Si Graphoepitaxy by Laser or Strip Heater Recrystallization", Journal of Electrochemical Society: Solid-State Science and Technology, Vol. 130, No. 10 (Oct. 1983) pp. 2050-2053 13. Hidefumi Mori, "2-D Grating Graphoepitaxy of Silicon Films from Silicon-Gold Supersaturated Solution", Japanese Journal of Applied Physics, Vol. 20, No. 12 (Dec. 1981) pp. L905-L908 124 14. V. I. Klykov, "Diataxial Growth of Silicon and Germanium", Journal of Crystal Growth, Vol. 52 (1981) pp. 687-691 15. R. Anton, H. Poppa and D. C. Flanders, "The Effect of Grooves in Amorphous Substrates on the Orientation of Metal Deposits", Journal of Crystal Growth, Vol. 56 (1982) pp. 433-448 16. L. S. Darken and D. H. Lowndes, "Graphoepitaxy of Electrodeposited Tin", Applied Physics Letters, Vol. 40, No. 11 (June 1982) pp. 954-956 17. L. S. Darken, "Mechanism for the Graphoepitaxy of Electrodeposited Tin", Journal of Electrochemical Society, Vol. 130, No. 6 (1983) pp. 1174-1282 18. D. C. Flanders, Ph. D thesis, M. I. T. 1978, Reprinted as M. I. T. Lincoln Laboratory Technical Report 533, Dec. 1978 19. E. I. Givargizov, N. N. Sheftal and V. I. Klykov, "Current Topics in Material Science", Vol. 10, Ed.: E. Kaldis, North-Holland, Amsterdam, 1982, Chapter 1, pp. 1-53 20. K. A. Jackson and C. E. Miller, "Periodic Regrowth During Crystal Growth", Journal of Crystal Growth, Vol. 42 (1977) pp. 364-369 21. M. W. Geis, B-Y, Tsaur and D. C. Flanders, "Graphoepitaxy of Germanium on Gratings with Square-Wave and Sawtooth Profile", Applied Physics Letters, Vol. 41, No. 6 (Sept. 1982) pp. 526-529 125 22. J. D. Hont and K. A. Jackson, "Nucleation of Solid in an Undercooled Liquid by Cavitation”, Journal Applied Physics, Vol. 37, No. 1 (1966) pp. 254-257 23. M. W. Geis, D. A. Antoniadis, D. J. Silversmith, R. W. Mountain, and Henry I. Smith, "Silicon Graphoepitaxy Using a Strip-Heater Oven”, Applied Physics Letters, Vol. 37, No. 5 (sept. 1980) pp. 454- 456 126 CHAPTER FIVE POLYCRYSTALLINE SILICON ON GLASS SUBSTRATES 5.1 Introduction Many attempts have been made to deposit polycrystalline silicon thin films on foreign substrates for use in low cost solar cells. CVD[l-5] and vapour deposition[6] have been used to deposit silicon on metals, graphite, glass and metallurgical grade silicon substrates. Although these techniques have the advantages of relatively low deposition temperature, easy control of doping and fast growth rates, the quality of the thin films is not sufficiently good for solar cell fabrication due to limited grain size and film contamination. Recrystallization of amorphous or polyciystalline silicon layers on foreign substrates can enhance the grain size of silicon layers[7-9]. However, to get large grain growth (>100 pm), reciystallization needs to occur at temperatures near the silicon melting point. High processing temperatures encourage impurity incorporation into the silicon lattice, reducing the layer quality and also limiting the choice of the substrates which have suitably good thermal expansion match with silicon. Silicon thin films grown on quartz and stainless steel substrates by the solution growth technique were reported to be of suitable quality for solar cell application 10-12]. As mentioned in the previous chapters, low processing temperature is one of the advantages of the solution growth method. This can reduce the stress in the silicon thin film resulting from differential contraction of the film and the substrate as the composite cools from the silicon 127 deposition temperature, and enlarge the choice of the substrates onto which the film can be deposited. This chapter describes the solution growth of polycrystalline silicon thin films on glass substrates at low temperatures. A variety of techniques have been explored to induce the nucleation of silicon onto glass substrates, such as silicon particle seeded growth on glass substrates, deposition of silicon on bare glass substrates (both flat and sandblasted) from A1 and Mg alloy solutions, deposition of silicon on amorphous silicon coated glass substrates and deposition of silicon on bare glass substrates by the technique of rheotaxy. Among these, moderate success has been achieved for the first two approaches and very promising results have been obtained from the last two approaches. The growth kinetics and characterisation of silicon thin films are also described in this chapter. 5.2 Substrate Selection The materials which can be used as a substrate of a thin film silicon solar cell ideally have the following properties: 1) cheap; 2) good chemical and mechanical stability; 3) good thermal expansion match with silicon; 4) low contamination levels; 128 5) (light and transparent). Among conducting materials, stainless steel, graphite, conducting ceramics and MG-Si have been used previously as substrates for polycrystalline thin film silicon solar cells. The thermal expansion coefficient of low cost steel is 3-4 times higher than that of silicon. Also, iron is a deep level impurity in silicon and its incorporation into the silicon lattice would reduce the minority carrier lifetime. A barrier layer on stainless steel is necessary before silicon deposition to provide a better thermal expansion match to the silicon and to prevent interaction between the steel and silicon layer[13-14]. Graphite is a good conductor and can be used as both the substrate and the rear contact of a solar cell. However, large grains of silicon have not been obtained on untreated graphite substrates [2]. To get large grain size, intermediate tin or aluminium layers on the graphite substrate have been introduced [15-16]. Graphite is also a very porous material and can be easily contaminated by moisture. This may degrade the quality and operating life of solar cells. Barnett and co-workers have manufactured a conducting ceramic material which has a good thermal expansion match with silicon! 11]. Good quality polycrystalline silicon film deposited on these ceramic substrates have been reported. MG-Si has many advantages over other materials as a substrate of a thin film silicon solar cell, such as good thermal expansion match and crystalline structure match. However, MG-Si has to be refined to remove 129 impurities before it can be used as a substrate for a thin film silicon solar cell, if high processing temperatures are involved. Of the insulating materials, ceramic and glass are considered strong candidates. Ceramics can be tailored to provide a good thermal expansion match with silicon and are well documented from work in the 1970's by Honeywell! 17]. Glass is an extremely attractive substrate onto which to deposit silicon film, due to its potentially very effective role as the superstate [18] of a solar module as illustrated in Fig.5.1. If silicon could be deposited directly onto glass to form a thin film module, this would ultimately result in very little additional cost above the cost of the glass. The main difficulties are the generally large thermal expansion mismatch between glass and silicon and the unsuitability of glass for high temperature deposition processes. The thermal expansion of silicon is very low, i.e., about 3.3x10 6/K. In general glasses have very large thermal expansion and low fusion temperatures, although glasses with very low thermal expansion can be manufactured for special purposes. The thermal expansion mismatch between glass and the silicon layer would cause deformation of, or even cracks in, the grown film during cooling or subsequent processing. These effects, however, can be obviated in different ways: 1) The thinner the silicon layer, the less significant the risk of cracks will be; 130 silicon layers^ glass superstrate trapped light laminating layer reflector Fig. 5.1 Thin film polycrystalline silicon solar cell deposited directly onto glass superstrate 131 2) The thermal expansion coefficient of glass depends on temperature and changes rapidly in the transformation range of the glass. The stress between glass and silicon can be reduced by slow cooling in this range of temperatures, i.e. when glass changes from the solid- state to the state of a supercooled liquid [19]. A cooling rate less than 5K/min. in the range of the transformation temperature Tg±50K is usually considered suitable for thermal expansion match between glass and silicon in the case of glass passivation of silicon semiconductor devices [19]. 3) Lowering the silicon deposition temperature (below transformation temperatures) can reduce the thermal stress between glass and silicon; 4) Another way of improving the expansion match between glass and silicon is offered by composite glasses. These contain mechanically added inert filler of very low or negative thermal expansion. These fillers lower the mean coefficient of expansion of the composite glass to the extent of eliminating the risk of cracking. The improvement of the mechanical stability of the composite glasses is a secondary effect of the fillers. As a consequence of differing refractive indices of fillers and glass, the composite glasses, as a rule, are optically hazy or even non-transparent like porcelain. This technique has been used for passivation glasses for semiconductor silicon components [19]; 5) The addition of boron-oxide to the glass to form borosilicate can lower the thermal expansion coefficient of glass and improve the thermal expansion match with silicon. 132 5.3 Glass Properties Glass can be defined as an inorganic product of fusion that has been cooled to a rigid condition without crystallisation. Glasses have special properties not found in other engineering materials. The combination of transparency and hardness at room temperature along with sufficient strength and excellent corrosion resistance to most normal environments make glasses indispensable for many engineering applications such as construction and vehicle glazing. Table 5.1 Composition of commercial glasses (%)[20] SODA BOROSI- ALUMINO HIGH LIME LEAD LICATE SILICATE SILICA COMPONENT GLASS GLASS GLASS GLASS GLASS sio2 70-75 53-68 73-82 57 96 Na20 12-18 5-10 3-10 1.0 — k2o 0-1 1-10 0.4-1 — — CaOa 5-14 0-6 0-1 5.5 — PbOb — 15-40 0-10 — — B2°3 — — 5-20 4.0 3 ai2o3 0.5-2.5 0-2 2-3 20.5 — MgO 0-4 — — 12.0 — a Maximum CaO up to 20%, because of devitrification, b For extra dense optical glasses PbO may be as high as 80%. 133 Commercial glasses include soda lime or lime glasses, lead glasses, borosilicate glasses, and high silicate glasses[20]. Their typical chemical composition is given in Table 5.1. Soda lime glasses have compositions approximately of the formula Na2OCaO-6Si02. Additional small quantities of alumina and magnesium oxide are introduced to improve the chemical resistance and durability of glass. Lead glasses, also called "flint" glasses, usually contain from 15 to 30% lead oxide. They are used for high quality tableware, optical purposes, neon sign tubing, and in art wares because of their high lustre. Borosilicate glasses contain virtually only silica and boron with a small amount of alumina. Reduced alkali oxide content compared with the lime glasses and replacement by boron and aluminium results in a glass of low thermal coefficient of expansion and high chemical resistance. The physical properties of some commercial glasses are listed in Table 5.2[21]. As shown in Fig. 5.2[22], borosilicate glass (Coming code 7740) has the best thermal expansion match with silicon at temperatures below 600°C and so was chosen as the substrate for the solution growth of silicon. 5.4 Experimental Solution growth of silicon on borosilicate glass substrates was carried out in a system similar to that used for the liquid phase 134 Table 5.2 Physical properties of some commercial glasses[21] Viscosity Data Type of glass Strain Annea Softening Coefficient of Refractive point ling point point (°C) linear thermal index (nD) (°C) (°C) expansion xlO7 (0-300°C) Fused silica 1070 1140 1667 5.5 1.458 96% silica 820 910 1500 8.0 1.458 glass Soda-lime 505 548 730 85 1.510 sheet glass Soda-lime 510 553 735 87 1.510 plate glass Soda-lime 505 548 730 85 1.520 container glass Soda-lime 470 510 696 92 1.512 bulb glass Lead alkali 395 430 626 91 1.539 silicate (etc.) 435 630 89 1.560 High lead 390 430 580 91 1.639 alkali silicate Alumino 670 715 915 42 1.534 silicate 540 580 795 49 1.490 Low 520 565 820 32 1.474 expansion borosilicate Low electrical 455 495 - 32 1.469 loss Borosil Borosilicate 485 525 755 36 1.487 for tungsten seal Borosilicate 435 480 708 46 1.484 for Kovar seal 135 4000 7059 3000 1729 / Si . 7740 2000 . 7940 400 600 i TEMPERATURE (°C) Fig. 5.2 Linear expansion coefficients as a function of temperature for several commercial glass substrates and silicon (Numbers: Corning Code)[22] 136 epitaxial growth of silicon (Chapter 3). The experiments were conducted in a vacuum ambient. The metals Ga, A1 and Sn (5N purity) and their alloys were used as solvents. The solutions were baked for several hours to ensure homogeneity before being saturated with silicon. The glass substrates were cleaned with dilute NaOH and HF solutions[23]. The silicon source wafers were cleaned with RCA# standard solutions[24] and dipped in dilute HF just before loading into the furnace. Silicon deposition occurred at temperatures between 500°C and 800°C using ramp cooling rates from 0.5°C to 3°C/min.. 5.5 Deposition of Polycrystalline Silicon Thin Films on Glass Substrates Various methods have been investigated during this thesis for the deposition of polycrystalline silicon thin films on glass substrates as outlined in the following sections. 5.5.1 Silicon Particle Seeded Growth on Glass Substrates In this experiment, solution growth of silicon on glass substrates coated with silicon particles was investigated. The silicon particles were deposited onto glass to act as nucleation centres. To deposit the silicon particles onto the glass, firstly silicon powder with grain size around 2 pm was obtained by crushing silicon wafers. Secondly, the silicon powder was mixed with an acetate solution to make a slurry of the particles. Then the silicon slurry was deposited 137 onto the glass surface by spinning on a spinner. Finally the samples were dried in an oven at a temperature of about 200°C for 100 minutes. Solution growth of silicon on glass coated with silicon particles was conducted using Sn:10wt%Al alloy as solvent and at growth temperatures around 550°C. The solution was baked at 550°C for 2 hours, then saturated with silicon for 65 minutes. When the solution was moved to contact the glass substrate, the temperature was raised 15°C to meltback the particle surfaces. The meltback procedure was used to improve wetting between the solution and particles and to remove small grained crystals. The solution was then cooled down to 485°C with a cooling rate of about 0.4°C/min.. Figure 5.3 shows crystals grown by this method. Although the growth was not continuous, the crystals were of good quality and had reasonable adhesion to the glass. Nucleation density depends on the density and orientation of the seeds. Most crystals showed (111) preferred orientation and large grain size. Crystals with lower index lattice parameter such as (100) are expected to dissolve in a solution much faster than (111) crystals[25]. Hence, most of the crystals with lower index lattice parameter and small grain size were dissolved in the solution during the meltback process. The retained crystals, such as (111) oriented crystals, usually have a preferred lateral growth habit and flat facets parallel to the substrate. The demonstration of solution growth of silicon on silicon seeded glass substrate indicated that it would be possible to get continuous and good quality polycrystalline silicon thin films on glass 138 Fig. 5.3 Polycrystalline silicon on silicon particle coated glass substrate as observed under an optical microscope 139 substrates at low temperature if an appropriate technique could be found to create a uniform and dense silicon seeding layer on the substrates. 5.5.2 Bare glass substrate Solution growth of silicon on bare glass substrates, both flat and sandblasted, was investigated by growing from Ga, Al, Sn and their alloy solutions. Initially flat glass substrates were used for solution growth of silicon from Al/Sn or Al/Ga solution. The solution was saturated with silicon at a temperature of 470°C. When the solution was brought to contact with the glass substrate, the temperature was ramped up to 570°C within 60 minutes, and then ramped down 100°C within 200 minutes. After growth, the substrate showed a brown surface layer with some silicon islands on top. This surface morphology indicates a reaction between the solution and glass substrate. The reaction is obviously due to the presence of Al in the solution, which is one of the elements which has a higher affinity for oxygen than silicon [26]. Al depleted oxygen from the glass surface and created a silicon rich surface. A silicon rich surface would improve the wetting between the solution and substrate and could act as a silicon seeding layer for subsequent nucleation. The reaction between the solution and substrate also coarsened the glass surface to produce a low energy surface, which is benign for crystal nucleation [25]. Based on the above analysis, a small quantity of Mg was added to the solution in subsequent experiments because Mg is a more 140 reactive element than Al. An experiment was performed under exactly the same conditions as described above. The growth morphology in this experiment showed a higher density of growth islands as illustrated in Fig.5.4 Each island is composed of a large flat base and some decorative crystal growth on top of the base. The bases seem very close to (111) orientation. Several other experiments were performed using slightly changed growth conditions, such as using a 50°C meltback instead of a 100°C meltback. Similar growth morphologies were observed. Sandblasted glass substrates were also used for solution growth of silicon. Sandblasted glass has a lower surface energy than flat glass due to surface roughness, which lowers nucleation barriers. Solution growth of silicon on sandblasted glass from Sn:10wt%Al:lwt% Mg solution was investigated under the conditions described above. The growth on the main area was similar to the growth on the flat glass substrates. However, sandblasted features on the growth area disappeared. This is believed to be caused by the reaction between the solution and the substrate. The edge area with carry-over showed some growth as well. There was a very high nucleation density of silicon in this area as depicted in Fig. 5.5 The white spots in Fig. 5.5. are silicon nucleation sites and the black area is glass substrate. The surface texture in this area is still retained after growth. It was inferred that the surface texture of the glass was benign for initial nucleation of silicon. In some areas, the surface texture changes, however, as determined by the contact time between the solution and glass due to their reaction with each other. 141 Pig.5.4 Nucleation pattern of polycrystalline silicon on a flat glass substrate from Al/Mg/Sn solution 142 t Pig. 5.5 Nucleation pattern of polycrystalline silicon on a sandblasted glass substrate from Al/Sn/Mg solution (carry over area) 143 Based on these analyses, one experiment was done using an 18°C supercooling of the solution before contacting the glass substrate, then cooling the solution by 80°C over a period of 80 minutes. The result of this experiment demonstrated near-impinging growth and the surface texture still remained on the glass surface as shown in Fig. 5.6. The improved growth could come from the textured surface or supersaturation, or both of these. Subsequent experiments used larger supercooling (25°C) and longer growth time (200 minutes). However, the growth showed no improvement and the growth area lost its surface texture as a result of the long contact time with the solution. It was understood that a supersaturated solution would initially enhance nucleation density. However, if the growth time is too long, further chemical reaction between the solution and the substrate would etch away the crystals (by undercutting) which had grown on the glass substrate, so the final nucleation density was still low. This phenomenon has been observed in some experiments where crystal attachment sites can still be identified on the glass surface under the microscope, even though the crystals no longer remained on the substrate. Summarizing these experiments, it was concluded that high density growth of silicon could be obtained on sandblasted glass substrates from A1 or Mg related solutions. A textured glass surface lowers the silicon nucleation barrier. Both the textured nature of the glass and a silicon rich surface are responsible for silicon crystal growth. The presence of A1 or Mg in the solution is important to for obtaining a silicon rich surface which is a possible silicon seeding layer and also improves the wetting between the substrate and 144 Pig. 5.6 Impinging growth of poly crystalline silicon on glass substrate from Al/Mg/Sn solution 145 the solution. However, the concentration of A1 and Mg in the solution and the contacting time between the substrate and solution are also crucial in determining the final result due to the reaction between the substrate and solution. This reaction can undercut the silicon crystals which have already grown on the glass substrate. 5.5.3 Deposition of Silicon on Amorphous Silicon Coated Glass Substrates The solution growth of silicon on amorphous silicon coated glass substrates was investigated. Before solution growth, sandblasted glass substrates were coated with a 1 gm thick amorphous silicon layer deposited either by LPCVD or else by ion assisted silane decomposition. The experiments were performed using Sn:10wt%Al as solvent at temperatures from 550°C to 800°C. Insitu meltback was used to remove surface oxide and small grained crystals. At low temperatures, there was litte growth on the substrate, and the amorphous silicon layer had disappeared from the target area. The nucleation density increased as the growth temperature increased. At growth temperatures above 750°C, locally continuous crystal growth was achieved on the substrate as illustrated in Fig. 5.7. However, in some areas there was no growth where it seems the amorphous silicon layer may have peeled off the substrate. Instead there was a black surface layer left on these areas. This black interfacial layer was believed to be caused by the reaction between the solution and substrate. 146 The deposition of polycrystalline Si layers on amorphous Si coated glass substrates was possibly influenced by the following factors: 1) The amorphous silicon coating on the glass improves the wetting of the substrate by the solution. As growth temperature increased, the amorphous silicon layer took on a micro-polyciystalline structure, which became a possible seeding layer for the subsequent crystalline Si layer deposition. X-ray diffraction of amorphous silicon layers annealed at the growth temperature, however, showed no strong peaks for any particular orientation. This meant that annealed silicon was still crystallographically amorphous or else very fine grained polyciystalline as depicted in Fig. 5.8. Hence, the crystalline silicon growth was actually initiated through silicon atoms rather than through silicon crystallites. 2) As the growth temperature was increased, the surface atoms of the substrate become more active. Under this condition, silicon atoms from the solution can more easily bond with the surface atoms. 3) The reaction between the substrate and the solution becomes more significant at higher temperature. This creates a silicon rich surface on the glass surface, which is another possible seeding layer for silicon crystal growth. The nonuniform silicon crystal growth is probably due to the nonuniformity and porosity of the amorphous silicon layer. Insitu meltback prior to the growth might totally remove the amorphous 147 Pig. 5.7 Continuous polycrystalline silicon growth on amorphous silicon coated substrate 148 2*^0^0200 tn! 2.50 CuKal+2 < 27.500 x : 2theta y : 34. Linear 77.500> Pig. 5.8 X-ray diffraction of amorphous silicon annealed at the growth temperature of 750°C. There is no strong diffraction peak for any particular orientation, which means that the specimen is crystallographically amorphous or very fine grain polycrystalline silicon [33] 149 silicon layer in some areas. The solution then penetrates to the substrate and reacts with it. This process could remove some of the amorphous silicon coating from the glass substrate by undercutting. 5.5.4 Rheotaxy of Silicon Thin Film Growth on Glass Substrates In the previous sections, various methods have been described for depositing crystalline silicon layers on glass substrates. Although locally good quality crystal growth has been achieved in some cases, the nucleation density is still not high enough for continuous silicon thin film growth. Since glass is an amorphous material, glass substrates exhibit only weak interactions with the depositing atoms and exert only a small influence on the structure of the deposited atoms. It is important to create a very active surface of the glass in order to get continuous silicon thin film growth. Rheotaxy, a technique of growing crystals on a liquid surface, was first used for depositing silicon on molten oxide surfaces for SOI device applications. Silicon was condensed by means of CVD onto a fluid surface[27,28]. This technique was also used to deposit silicon on substrates coated with low melting point metals, such as A1 or Sn. These metals form a liquid layer on the substrate at the deposition temperature. Enhanced crystallinity of silicon films was observed by depositing silicon on such liquid metal layers! 15,16]. During the coalescencing stage of crystal growth, grain boundaries between crystallites develop. The driving force for the coalescence is the loss in free energy which results from the decrease 150 in total surface area. The proper unification of the various crystal orientations will be favoured by some mobility of the associates! 15]. On a solid surface, however, the nuclei are rather rigid with respect to each other and reorientation during coalescence is hindered. Based on this idea, solution growth of silicon on glass substrates was conducted from Al/Sn, Al/Ga solutions at growth temperatures (circa 800°C) around the softening point of the glass. At these temperatures, the glass surface became fluid-like. Thus, in the initial stage of deposition, arriving silicon atoms would see a surface of maximum atomic mobility which is chemically non-reactive with silicon. As the solution cooled, the fluid glass surface solidified. Therefore the silicon atoms were firmly welded into the glass substrate. Continuous polycrystalline silicon thin films with area of 10 cm12 were successfully deposited on borosilicate glass substrates using this method as depicted in Fig. 5.9. The following are several possible mechanisms to explain this continuous silicon thin film growth on glass substrates: 1) As described in the previous sections, the presence of A1 in the solution depletes oxygen from the glass surface. This reaction becomes more intense at the higher temperatures used in these experiments. Therefore, more silicon-oxygen bonds are broken and more silicon atoms are exposed on the glass surface compared with the experiments described in the previous sections. This provides more silicon nucleation sites on the glass surface and accounts for the black intevening layer. 151 Pig. 5.9 Continuous polycrystalline silicon growth on glass substrate by Rheotaxy technology 152 2) The fluid surface allows a high maximum atomic mobility, so that incoming atoms can react with the substrate atoms very easily and have freedom of movement to align themselves with each other and so decrease the free energy on the whole surface. The former causes a good adhesion of the film with the substrate, the later enhances the preferred crystal orientation. 3) The nucleation density and grain size of the crystals increase as growth temperature increases. 4) Abrasion of the substrate during sliding can easily damage the substrate surface and enhance nucleation (by cavitation). 5) At the softening point, the structure of the glass may be devitrified, i.e., from amorphous to micro-crystalline[33]. Devitrification can often be induced by appropriate heat treatment at or below the softening temperature in which the liquid becomes unstable with respect to one or more crystalline compounds [33]. 5.5.5 Growth Kinetics and Properties of Silicon Films Polyciystalline silicon thin film growth on borosilicate glass substrates was found to be composed of four stages, i.e., wetting, nucleation, impinging growth and crystal epitaxial over-growth. The common feature of the methods used for solution growth of silicon on glass substrates is that a silicon rich surface, either amorphous or micro-crystalline, has been created before silicon deposition. The silicon rich surface has two functions in silicon thin film growth on 153 glass substrates, i.e., a) improving wettability between the solution and glass; and b) forming a seeding layer for subsequent silicon thin film growth. In the case of rheotaxy, the fluid surface increases the reactivity between the substrate atoms and the silicon deposits. This improves the adhesion between the silicon layer and glass substrate and also provides an opportunity for crystal reorientation during growth. The continuity of the film and the grain size of the crystals depend on the initial nucleation density. There is a critical nucleation density above which a continuous silicon thin film can be grown and below which only local growth can be achieved. The nucleation density was found to increase as the growth temperature increased. This is due to the facts that, as the temperature increases, the wettability between the solution and substrate is improved, the substrate surface becomes more active, and the solute atoms become more mobile on the substrate surface[25]. Figure 5.10 illustrates a nucleation pattern of silicon on a bare glass substrate obtained at a growth temperature of about 550°C from Al/Sn solution. The nucleation density of silicon in Fig. 5.10 is much lower than that in Fig. 5.11 where the nucleation pattern of silicon on bare glass substrate at a growth temperature of 750°C from Al/Sn solution is depicted. This comparison indicates the influence of growth temperature on nucleation. If the nucleation density is too high, however, the grain size of the crystals will be limited as in case of vapour deposition. Figure 5.12 shows silicon nucleation on an amorphous Si coated glass substrate from Al/Sn at a growth temperature of 750°C. The nucleation density of silicon in Fig. 5.12 is 154 much higher, and the grain size is smaller (on average) compared with Fig. 5.11. The degree of supersaturation is another parameter in controlling the nucleation density. Supercooling of the solutions up to 25°C was used in the initial nucleation stage. Excessively high supercooling of the solution would cause homogeneous nucleation in the solution and decrease the concentration of solute atoms available for diffusing to the growth interface. As soon as stable nucleation centres are formed on the substrate, they start to grow to crystals of visible size. When the individual crystals grow large enough to meet their neighbouring crystals, the crystals begin to coalesce and form a continuous layer on the substrate. Figure 5.13 shows impinging growth of silicon crystals with 80% crystal coverage of the glass substrate from Al/Sn solvent at growth temperature of 780°C. The average dimension of the crystals in Fig. 5.13 is about 100 pm. In this case, a nucleation density above 100 nuclei/mm2 was necessary to obtain a continuous thin film of silicon on the glass substrate. Further growth of the thin film is as an epitaxial over-growth of silicon on the base layer similar to liquid phase epitaxy. Figure 5.14 illustrates part of a continuous Si layer on glass substrate with an area of 10 cm2 and thickness of 30 pm, which is obtained using Al/Sn as a solvent with the technique of rheotaxy at a growth temperature of 800°C. Because the differently orientated crystals have uneven growth rates in polycrystalline growth[29], the surface of the thin film shows a very irregular and rough structure as illustrated in Figs. 5.14 and 5.15, where the surface morphology of the thin film and its cross- 155 Fig. 5.10 Nucleation pattern of polycrystalline silicon on a glass substrate at a growth temperature of 550°C 156 Fig. 5.11 Nucleation pattern of polycrystalline silicon on a glass substrate at a growth temperature of 750°C. 157 Fig. 5.12 Nucleation pattern of polycrystalline silicon on an amorphous silicon coated glass substrate at a growth temperature of 750°C 158 Pig. 5.13 Impinging growth of polycrystalline silicon on a glass substrate. The surface is 80% covered by silicon crystals. 159 Fig. 5.14 SEM image of the part of a continuous polycrystalline silicon on glass substrate with area of 10 cm2 and thickness of 30 |im. 160 Pig. 5.15 SEM image of the cross-section of the interface between silicon film and glass substrate 161 sectional structure are shown. Cooling rates from 0.3-3.0°C/min have been used during crystal growth. Fast cooling usually gave a fast growth rate, and was used in the initial nucleation stage. After stable nuclei were formed, both fast cooling and slow cooling rates were used for the subsequent growth. Although slow cooling of the solution has been reported to give better crystal surface quality due to slow diffusion of silicon atoms to the growth interface from the bulk of the solution[30], it was found that there was no difference between the surface morphologies of thin films grown using fast or slow cooling rates. In the case of polycrystalline growth, the crystal orientations are randomised. The crystals of different orientations have different growth aspect ratios (the ratio of lateral growth rate to vertical growth rate) [25]. Some crystals, such as (100) oriented crystals, have high vertical growth rate, and some such as (111) oriented crystals have high lateral growth rate. Therefore, the smoothness of the polycrystalline thin film surface is determined by the distribution of crystal orientations on the substrate, i.e., by the initial nucleation pattern. X-ray diffraction patterns of the silicon thin films show that the films have three strong diffraction peaks associated with (111), (220), and (311) orientations, with the strongest signal from the (220) orientation as presented in Fig. 5.16. This indicates that silicon crystallites show a strong (110) preferred orientation. 5.5.6 Surface Quality Improvement 162 For a silicon thin film to be suitable for solar cell applications, the grain size of the crystallites should be larger than 100 pm and the surface morphology should preferably be as smooth as possible. These two characteristics of silicon thin films can be improved by the periodic regrowth method during crystal growth[31]. Periodic vapour phase etching and regrowth has been used by Scholz[32] and subsequently by Schieber et al[31] to grow crystals of mercuric iodide from the vapour phase. By rotating the crystal in a bell jar with a strip heater down one side, better crystals were obtained. The crystals were reported to contain fewer gas phase inclusions. Cohen[31] has reported a significant increase in the grain size of electrodeposits using pulsating electrodeposition, where the electrodeposit is alternatively grown and etched. Saul[33] observed a decrease in dislocation density by a factor of 3 or more as result of one meltback cycle during the LPE growth of GaP. This technique has been used in the present thesis to improve the crystal quality of silicon deposited on glass substrates. In the early stage of growth, the temperature of the solution was changed above and below the equilibrium value in a periodic manner to melt and regrow the silicon crystals. During the meltback, the smaller crystals which had nucleated could be remelted. The fast growing crystals melted back further than the slower growing crystal faces, and in some cases, fast growing crystals were remelted completely during meltback. Figure 5.17 shows the surface morphology of a silicon thin film after melt back (without any regrowth). Although the individual grains have lost their distinctive 163 shapes, the surface has become much smoother and sufficiently planar for the area shown to lie in the depth of field of the microscope. In Fig. 5.17, some depressions are left in between the relatively planar crystals. The former are remelted fast growing crystals, reduced in size due to their faster dissolving rate than the surrounding crystals. During regrowth, the surrounding crystals could encroach on the fast growing crystals. By alternatively repeating this process, the surface quality of the thin film was improved significantly and the grain size of crystals was increased as shown in Fig. 5.18. These improvements were also confirmed by X- ray diffraction characterisation. The thin film grown by the periodic regrowth technique showed (111) preferred orientation as shown in Fig. 5.19. Figure 5.20 shows a schematic drawing which diagrammatically explains the mechanism for surface quality improvement of silicon thin films on glass substrates by the periodic regrowth technique. The fast growing crystals have much higher growth rate than slower growing crystals. During meltback, however, the melting rate of the fast growing crystals is also more rapid than that of the slower growing crystal faces. This leaves a depression at the average surface at the end of meltback (Fig. 5.17). During early regrowth, the fast growing crystals start to grow from the bottom of the depressions. It takes a while for them to catch up to the surrounding crystals. Meanwhile, lateral growth of slower growing crystals into the depression does not require the nucleation of a new layer (similar to epitaxial over-growth). The lateral regrowth rate, VL, can therefore be quite rapid at small undercooling during early 164 regrowth. When the regrowth of fast growing crystals catches up to the surrounding crystals, the surrounding crystals (slower growing crystals) have already laterally grown a distance d into the depressions as shown in Fig. 5.20. Thus the dimension of fast growing crystals has been reduced. Therefore, the cyclic regrowth suppresses the growth of fast growing crystals, enhances the growth of slower growing crystals in the lateral direction and provides an opportunity for the fast growing crystals to be overgrown. Polycrystalline silicon thin films deposited on borosilicate glass substrates have been processed through the whole procedure for conventional silicon solar cell fabrication. It was demonstrated that the thin film structure has very good chemical and mechanical stability, and the adhesion between substrate and thin film is surprisingly good. These characteristics of silicon thin films are consistent with the requirement for good performance silicon solar cells, although appreciable work remains to produce high performance cells by this approach. 165 ft:P0LY1 s&! 0.0200 In 1.50 CuKal+2 (in) (220) (331) (400) 105. Linear 90.000> 25.000 Fig. 5.16 X-ray diffraction of polycrystalline silicon on a glass substrate 166 Pig. 5.17 The surface morphology of a poly crystalline thin film after meltback (without any regrowth) 167 100 Jim Fig. 5.18 A smooth polycrystalline silicon film on a glass substrate obtained by the periodic regrowth technique 168 - —t——------r------( —------1------—1— —1 R:P0LY6 s%: 0 0200 tn: 5 .00 Cul (111) (220) (331) (400) ! ( . ) j ' ■7*7 c 27.500 2theta y 1301. Linear Fig. 5.19 X-ray diffraction of a polycrystalline silicon thin film on a glass substrate the grown by the periodic regrowth technique 169 Vaverage ^ (a) Vlateral (b) 5.20 Illustrating the periodic regrowth processes, (a) more rapidly grown crystal during growth, (b) a depression forms at the corresponding area during the meltback, permitting lateral regrowth of good crystal. 170 5.6 References: 1. T. L. Chu, H. C. Mollenkopf and Shirley S. Chu, "Polycrystalline Silicon on Coated Steel Substrates", Journal of Electrochemical Society: Solid State Science and Technology, Vol. 122, No. 12 (1975) pp. 1681-1685 2. T. L. Chu, H. C. Mollenkopf and Shirley S. Chu, "Deposition and Properties of Silicon on Graphite Substrates", Journal of Electrochemical Society: Solid State Science and Technology, Vol. 123, No. 1 (1976) pp. 106-110 3. T. I. Kamins, "Structure and Stability of Low Pressure Chemically Vapor-Deposited Silicon Films", Journal of Electrochemical Society: Solid State Science and Technology, Vol. 125, No. 6 (1978) pp.927- 932 4. T. L. Chu, Shirley S. Chu and E. D. Stokes, "Large Grain Silicon Films on Metallurgical Silicon Substrates for Photovoltaic Application", Solar Energy Materials, Vol. 2 (1979/1980) pp. 265-275 5. T. L. Chu, "Silicon Films on Foreign Substrates for Solar Cells", Journal of Crystal Growth, Vol. 39 (1977) pp. 45-60 6. Charles Feldman, Norman A. Blum, Harry K. Charles, Jr. and Frank G. Satkiewicz, " Evaporated Polycrystalline Silicon Films for Photovoltaic Application - Grain Size Effect", Journal of Electronic Materials, Vol. 7, No. 2 (1978) pp. 309-336 171 7. Avid Kamgar amd E. Labate, "Recrystallization of Polysilicon Films Using Inherent Light", Materials Letters, Vol. 1, No. 3-4 (1802) pp. 91- 94 8. John R. Troxell, Marie I. Harrington and Roger A. Miller, "Laser- Reciystallized Silicon Thin-Films Transistors on Expansion-Matched 800°C Glass", IEEE Electronic Device Letters, Vol. EDL-8, NO. 12 (1987) pp. 576-528 9. McD. Robinson, D. L. Lischner and G. K. Celler, "Large Area Recrystallization of Polysilicon with Tungsten-Halogen Lamps", Journal of Crystal Growth, Vol. 63 (1983) pp. 484-492 10. Allen M. Barnett, Michael G. Mauk, John C. Zolper, Ian W. Hall, William A. Tiller, Robert B. Hall, and James B. McNeely, "Thin Film Silicon and GaAs Solar Cells", Proceedings of the 17th IEEE Photovoltaic Specialists Conf. (1984) pp. 747-754 11. Allen M. Barnett, Michael G. Mauk, John C. Zolper, Robert B. Hall, and James B. McNeely, "Thin Film Silicon and GaAs Solar Cells on Metal and Glass Substrates", Tech. Digest of the Inti. PVSEC-1, Kobe, Japan (1984) pp. 241-244 12. Allen M. Barnett, D. H. Ford, R. B. Hall, C. L. Kendall and J. A. Rand, Proceedings of the 9th European Communities Photovoltaic Solar Energy Conference, September, 1989 (Kluwer, Dordrecht, 1989) pp. 697 172 13. T. L. Chu, "Polycrsytalline Silicon Layers for Solar Cells", Journal of Vacuum Science and Technology, Vol. 12, No. 4 (1975) pp. 912 14. Allen M. Barnett: "12% Efficient Thin Film Solar Cells on Low Cost Substrates", Technical Digest of the International PVSEC-3, Tokyo, Japan (1987) p. 101 15. W. J. P. van Enckevort and M. W. M. Graef, "Growth Mechanism of Silicon Crystallites Grown on top of a Metal-coated Graphite Substrate", Journal of Electrochemical Society: Solid-State Science and Technology, Vol. 128, No. 1 (1981) pp. 154 16. M. W. M. Graef and L. J. Giling, "Chemical Vapour Deposition of Silicon on a Liquid Tin Layer", Proceedings of European Community Photovoltaic Solar Energy Conference, (1977) pp. 136-142 17. J. D. Heaps, Z. D. Zook, B. L. Grung and C. D. Butter, Conference Record, 14th IEEE Photovoltaic Specialists Conference, (1980) pp. 39-48 18. Martin A. Green, "Thin Film Polycrystalline Silicon Solar Cells", Progress Report, New South Wales Department of Minerals and Energy, 1990 19. Schott Garsco, Passivation Glasses for Semiconductor Components, Product Information, No. 4841/le, 1991 173 20. Zbigniew D. Jastrzebski, "The Nature and Properties of Engineering Materials", John Wiley & Sons, 1977 21. A. Paul, "Chemistry of Glasses", Charp and Hill, p. 75 22. W. Gubatyj, D. Beglau, R. Himmler, G. Wicker, D. Jablonski and S. Guba, "Low Temperature Polycrystalline Silicon TFT on 7059 Glass", IEEE Device Letters, Vol. 10, No. 8, 1989 23. R. M. Tichane, "Cleaning Processes for Borosilicate Glass", Bull. Am. Ceram. Soc., Vol. 42 (1963) p. 441 24. W. Kern and D. A. Puptinen, "Cleaning Solutions Based on Hydrogen Peroxide for Use in Semiconductor Technology", RCA Review, (June 1970) p. 187 25. J. W. Mullin, "Crystallization", London, Butterworths, 1972 26. John C. Zolper, "The Solution Growth of Gallium Arsenide on Silicon and Its Application for Gallium Arsenide Solar Cells", Ph.D. Thesis, University of Delaware, 1987 27. E. Rasmanis and R. Beatty, "Rheotaxy Si Films for Microelectronics", Proc. Natl. Electron. Conf., Vol. 20 (1964) pp. 212- 214 174 28. B. H. Berry, "Fundamentals of Silicon Integrated Device Technology", Edited by R. M. Burger and R. P. Donovan, Prentice- Hall, Englewood Cliffs, N. J., 1967, Chapter III 29. K. L. Chopra and Suhit Ranjan Das, "Thin Film Solar Cells", New York: Plenum Press, 1983 30. B. Jayant Baliga, "Silicon Liquid Phase Epitaxy, A Review", Journal of Electrochemical Society, Vol. 133, No.l (1986) pp 5C-14C 31. K. A. Jackson and C. E. Miller, "Periodic Regrowth During Crystal Growth", J. Crystal Growth, Vol. 42 (1977) pp. 364-369 31. H. Scholz, Solid State Communication, Vol. 19 (1976) p. 429; Vol. 20 (1976) p. 195; p. 447 32. R. H. Saul, Journal of Electrochemical Society, Vol. 128 (1971) p. 793 33. George W. Morey, "The Properties of Glass", Reinhold Publishing Corporation, 1950 175 CHAPTER SIX THIN FILM SILICON PHOTOVOLTAIC DEVICES 6.1 Introduction Conventional silicon solar cells are processed by using diffusion or ion-implantation followed by thermal annealing to produce p-n junctions. These techniques usually require high temperature processing (900-1100°C) to get desirable doping levels. However, a heavily damaged, so called "dead layer" at the silicon surface often results from these techniques and reduces the cell efficiency! 1]. Moreover, if these techniques are applied to low cost thin film polyciystalline silicon solar cells, rapid diffusion of impurities along grain boundaries would result in shorting of the p-n junction or excessive recombination of the minority carriers[2,3] and so lead to poor cell performance. High processing temperature would also cause thermal expansion mismatch between the substrate and the silicon layer or even damage the substrate. As described in the previous chapters, solution growth has the advantages of low growth temperature and ease of control of the dopant concentration. This technique has been used to grow p-type emitter layers from Ga and A1 solution for silicon solar cell fabrication[3,4]. This chapter describes the use of solution growth for producing thin film silicon solar cells on various substrates, i.e., single crystalline p-n junction silicon, polycrystalline silicon and glass. Cells with an area of 1 cm2 have been made on these films. An open circuit 176 voltage of up to 605 mV was achieved for cells using films grown on single crystalline silicon substrates. Hot probe and spreading resistance measurements have been used to determine the doping type, doping concentration and junction depth of the films. PC-ID, a solar cell modelling program[5], has also been used to model and predict the performance of thin film silicon solar cells. 6.2 PC-ID Modelling of Thin Film Silicon Solar Cells PC-ID, a computer program for modelling the performance of a solar cell(5], was used to predict the performance of thin film silicon solar cells. The parameters of a thin film silicon solar cell used in the modelling were based on a poor quality silicon material and are listed in Table 6.1. Light trapping was not considered in the modelling. Table 6.1 The Parameters for PC-ID Modelling (* default value) Area of the cell: 1 cm2 Emitter diffusion length: 1 pm* Base layer thickness: 6pm Front surface recombination velocity: 1000 cm/sec.* Emitter layer thickness: 1 pm Back surface recombination velocity: 10000 cm/sec.* Base layer resistivity: 0.1 Q cm Illumination: 1.5 AM, 100 mW/cm2 Emitter layer resistivity: 0.01 Front surface reflectance: 30% Dcm No light trapping scheme used Base diffusion length: 6 pm Back surface reflectance: 95% 177 PC-ID modelling shows that the open circuit voltage (Voc) of a solar cell depends mainly on the minority carrier diffusion length (or lifetime) in both the base and emitter layers, which, in turn, depends on the quality and doping level of the film. If the silicon layer is heavily doped, the diffusion length is inherently limited by the doping level according to an internal PC-ID formula. Otherwise, the diffusion length is manually set to simulate the bulk recombination level, which is a reflection of the crystal quality. Figure 6.1 shows the dependence of the open circuit voltage on the minority carrier diffusion length in the base region and on the surface recombination velocity. The diffusion length in the emitter layer is modelled as that determined by the emitter doping level according to the standard formula used by PC-ID. The open circuit voltage increases as the base minority carrier diffusion length rises. If the base recombination is very large, surface recombination has less effect on open circuit voltage and base recombination dominates the situation. Surface recombination becomes more important as the base recombination decreases (or the base quality is improved). An open circuit voltage of 560 mV is predicted when the base diffusion length equals the thickness of the base layer as depicted in Fig. 6.1. Although the variation of short circuit current (J^) with these parameters is similar to that of Voc as shown in Fig. 6.2, only varies within a small range of values( ~3 mA). The short circuit current density is mainly limited by the quality of the emitter, the front surface recombination, the front surface reflectance and the total thickness of the cell. When the later two parameters are set, the front surface recombination, and both the quality and doping of the 178 O pen C ir c u itV o lta g eV oc (mV) velocity Fig. carrier 6.1 730 diffusion The 0 dependence Minority length 20 in of Carrier the open 179 base — 40 — m 151 Surface circuit — — Diffusion Velocity and Front voltage surface 60 Recombination 80 (cm/sec.) 10000 Back Length upon r e c o m b i n a t i o n minority (jim) 100 recombination minority Fig. S h o r tC irc u itC u r r e nD t e n s ity Isc 6.2 The carrier dependence Minority velocity diffusion Carrier of length short 180 Surface Velocity Front circuit Diffusion in the Recombination current (cm/sec.) Back base Length 1000 10000 5000 density and surface (jim) upon minority Fig. S h o r tC irc u itC u r r e nD t e n s ity (J s c :m A /cm * cm ) 6.3 carrier The Minority variation diffusion of Carrier length short 181 in circuit Diffusion the emitter current layer Length density (fim) with Fig. carrier Open Circuit Voltage (mV) 600 6.4 diffusion 012345678 The Minority variation length in of Carrier the open emitter 182 circuit Diffusion layer voltage Length with minority ( jim) recombination Fig. S h o r tc ir c u itc u r r e nd t e n s ity (m A /cm * cm ) Logarith 23 6.5 The velocity of changes front of surface (cm/sec.) 183 J sc versus recombination the front velocities surface emitter dominate the output current. Figure 6.3 shows the variation of Jgc with the emitter's minority carrier diffusion length. Diffusion length in the base layer is modelled as 6 pm, which is equal to the thickness as the base layer. As shown in Fig. 6.3, changes markedly with the emitter diffusion length, from 13 mA/cm2 (diffusion length of 0.1 pm) to about 29 mA/cm2 (diffusion length of 8 pm). Voc also changes marginally as shown in Fig. 6.4. The Voc is affected only slightly by the emitter surface recombination velocity. This may be due to the low diffusion length (6 pm) set for the base layer. However, can be further degraded by front surface recombination. Figure 6.5 shows the variation of with the front surface recombination velocity where the base and emitter diffusion lengths are modelled as 6 pm and 1 pm respectively, and the back surface recombination velocity is modelled as 104 cm/sec.. Because most of the absorption of light occurs in the top emitter layer of a silicon solar cell, its surface and bulk quality are very important for ensuring collection of the carriers generated in that region. Summarizing the PC-ID modelling of thin film solar cells, it was found that, although the modelling is based on very poor quality silicon material and light trapping effects were not included, the performance of a thin film silicon solar cell is still about 80% of that for a conventional high efficiency silicon cell. This is attributed to the thinness of the cell, which increases the collecton efficiency of the minority carriers generated in the cell. The quality and doping level in the base layer determine the upper bound of the performance of a solar cell, and whether or not the surface recombination plays a significant role. As soon as the base layer properties are fixed, the 184 final performance of a solar cell is determined by the top emitter layer; its surface passivation, bulk quality, doping level and junction depth. 6.3 Silicon Thin Film Solar Cells on Crystalline Silicon Substrates 6.3.1 P-N Junction Growth Silicon liquid phase epitaxial layers were grown from doped Sn solutions on (111) crystalline and polycrystalline substrates of both p- and n-type substrates. The growth temperatures ranged from 500°C to 800°C and cooling rates were from 0.5°C to 0.8°C /min. A1 and Sb were added to Sn solutions as p-type and n-type dopants respectively. Two approaches for p-n junction growth were demonstrated in the experiments. One was to grow a doped epitaxial layer on an oppositely doped substrate. Therefore, the junction was formed between the substrate and the grown epi-layer. Another was to grow two oppositely doped layers sequentially on a heavily doped substrate. In this case, the junction was formed between the two epi- layers. The second approach was expected to produce a better quality junction because, after the growth of the first layer, the substrate was brought into contact with the second solution instantly. Therefore, the surface of the first epi-layer was not exposed to the environment, and so the possibility of contamination of the surface by oxides and other impurities was minimized. In contrast, junction quality in the 185 first approach depended largely on the cleanliness of the substrate surface. 6.3.2 Device Fabrication Before device fabrication, the wafers were soaked in aqua-regia solution to remove any metal precipitates from the epi-layer surface. The doping type of the grown layers was checked by hot probe and the doping concentration was estimated by four point probe (FPP) measurements. Devices were then fabricated as follows: 1) The wafers were etched in hydrofluoric acid solution to remove native oxide; 2) The metal contacts were then applied by vacuum evaporation. The metal contacts were applied to the LPE films through a shadow mask defining a 1 cm2 finger pattern. A1 was evaporated on p-type silicon and Ti/Pd/Ag multilayers were used to contact n-type silicon; 3) The wafers were sintered in 4% H2/Ar at 300°C for 30 minutes after metal evaporation. This was to improve the ohmicity of the contact between the silicon and the metal. 6.3.3 I-V Characteristics of Solar Cells The current-voltage characteristic (I-V curve) under specified illumination is the single most important measurement for solar cells. All devices were tested under an illumination of 100 mW/cm2, AMI.5 186 spectrum. The measurement was initially carried out with the whole wafer surface under illumination. This determined the open circuit voltage (Voc) potential of the cell accurately. The precise measurement of short circuit current (1^) was achieved by limiting illumination through a 1 cm2 masking aperture. After these measurements, the cells were scribed to a 1 cm2 size. The photovoltaic results both before and after scribing are listed in Table 6.2. It was found that decreased after scribing, which is believed to be due to increased edge recombination. The fill factor increased markedly after scribing, however, because lateral current flow was reduced. The I-V measurements indicated that the solar cells with the p- n junction formed between a p-type epi-layer and a n-type substrate had low (300-500 mV) but reasonable values of 1^ (10-14 mA/cm2). Figure 6.6 is an I-V curve of one of these cells, with VOC=380 mV and 3^=14 mA/cm2. The performance of this solar cell was believed to be limited by the quality of the interface between the epi-layer and the substrate. A high density of crystal defects in the interfacial region would increase the reverse leakage current (IJ and reduce the open circuit voltage (Voc). Table 6.2 shows the growth parameters and the I-V characteristics of thin film silicon solar cells made using two epi- layers deposited on heavily boron doped (0.004-0.009 Q.cm) p-type substrates. The first epi-layer is a moderately A1 doped p-type layer and the second epi-layer is a heavily Sb doped n++ layer. Figure 6.7 shows the doping profile of one of the cells of this type obtained by spreading resistance measurement. The top emitter layer is about 1.5 187 Fig. a Photocurrent (mA) n-type 6.6 0.00 I-V substrate curve Eff: FF: Jsc: Voc: for 0.10 and a 0.66 thin 3.5% p-type 14mA/cm*cm 380 Voltage film epi-layer mV 188 0.20 silicon (V) solar cell .00.40 0.30 formed between Table 6.2 The growth parameters and the I-V characteristics of the thin film silicon solar cells formed o* a P n £ a a 3 *d % 4r The first The second Sample Substrate epi-layer epi-layer Before scribing After scribing Voc ” Sj Voc FF Eff type type resistivity type resistivity resistivity I" comment ic f JO Ic JO (mV) ■SD (mV) (%) (%) (Ocm) (ilcm) (ilem) 189 SO i e r > — -o o o o o o o CD 13 2! o o ► Ol ZSLPE1 605 4.0 600 13.4 ■vj Ol 6.0 0 6600 "0 25 4*- -0 ZSLPE2 0.004-0.009 0.24 597 12.5 3.3 587 to 3.3 damaged SIO'O no o o o o o "0 25 8 ZSLPE3 0.3 600 13.7 Ol to 4.0 590 damaged : "0 O o £» o o *0 o o CD 2 4* 05 ZSLPE4 0.45 0.0124 475 13.7 2.5 460 13.7 05 00 4.0 SO • — 2 2! *0 00 o o o bo POLY1 0.02 311 305 5.0 05 Ol » o » 4* 25 TJ 2 4^ ■vj POLY2 0.4 0.025 280 7.5 to 0.2 263 4.7 .65 pm thick and the maximum doping concentration is about 2xl018/cm3. There is a doping gradient in the top emitter layer which is very similar to the doping profile formed by diffusion. The total thickness for the base layer is about 14 pm. Roughly half of this thickness is heavily doped to a concentration higher than 1018/cm3. There is also a doping gradient in the base layer, which is beneficial to the cell performance. The most heavily doped region appears near the interface of the epi-layer and substrate. This may be due to the meltback procedure during crystal growth where boron in the heavily doped substrate dissolves in the solution and accumulates near the growth interface. The epi-layer starts to grow before the boron atoms have enough time to diffuse to the rest of the solution. This causes the initial growth to be very heavily doped. The epi-layer continues to grow as the solution cools down. During this procedure, two parameters control the doping of the epi-layer. Since the segregation coefficient of A1 is smaller than one (0.002), A1 atoms will accumulate increasingly near the growth interface. This tends to increase the doping level in the later grown region of the epi-layer. However, the segregation coefficient of A1 also decreases as the solution temperature drops. Therefore, the trade-off of these two processes gives the observed doping profile in the base layer (Fig. 6.7). This type of cell demonstrated medium to high values of open circuit voltage and reasonable current density. An open circuit voltage up to 605 mV was achieved for a 1 cm2 cell as shown in Table 6.2. This solar cell did not have any surface passivation or anti reflection coatings. The low short circuit current density of 14 190 by Fig. L ogarith mof doping concentration spreading (atoms/cm*cm*cm) 6.7 Doping resistance profile Thickness for measurement a thin thin 191 film ( silicon film jLim) solar substrate cell obtained Fig. epi-layers Photocurrent (mAj 6.8 I-V on curve Eff: FF: Jsc: Voc: a heavily for 0.75 6.0% 13.4 600 a thin doped Voltage mV mA/cm*cm film p-type 192 silicon substrate (V) solar cell formed by two mA/cm2 is probably due to high front surface recombination and poor emitter quality. Figure 6.8 shows the I-V curve of this cell. An open circuit voltage of 311 mV and short circuit current density of 8 mA/cm2 was also obtained for a polycrystalline thin film silicon solar cell deposited on a polycrystalline silicon substrate as shown in the Table 6.2. In the case of a polyciystalline silicon substrate, the epi-layer surface is usually very rough due to the unequal growth rate of different orientations. The anisotropy of the growth rate also causes an uneven junction depth, and more easily introduces the inclusions and crystal defects into the silicon layer. These tend to reduce the performance of a cell or even to shunt the device. Increased recombination at grain boundaries is another factor causing low output of polyciystalline silicon solar cells. 6.3.4 EBIC Characterisation of Thin Film Silicon Solar Cells When electron beams generate electron-hole pairs inside a depletion region in a semiconductor device or when minority carriers diffuse to this region, the electric field in the depletion region separates the charge carriers and a charge-collection current or an electron-beam-induced-current (EBIC) can be measured externally. Since the EBIC signal is affected by differences in recombination rate, it has an important application in semiconductor technology, where it can be used as a video signal for the imaging of p-n junctions and crystal defects. Crystal defects such as dislocations, stacking faults and precipitates usually increase the recombination rate of minority 193 carriers in their vicinity. Defects that are electrically active can be imaged in the EBIC mode by producing dark contrast. Figure 6.9 shows SEM (left) and EBIC (right) images of the same epi-layer on a substrate cell shown in Fig. 6.6. The EBIC image shows a high density of dark spots which are due to regions of high recombination. The EBIC image shown in Fig. 6.9 corresponds to electron energy of 20 keV. The penetration depth of electrons at this energy is about 2 pm, which corresponds to the depth of the p-n junction region. THe high recombination rate indicates that there is a high density of electrically active defects such as dislocations, stacking faults or impurity precipitates in the junction region. Oxidation of the substrate surface before silicon deposition is believed to be the main catalyst for crystal defect growth. Figure 6.10 shows SEM (left) and EBIC (right) images of the cell with 605 mV open circuit voltage, i.e., one whose p-n junction lies between two epitaxially deposited layers. Although there are still some small dark spots distributed on the picture, the density of dark spots is reduced significantly compared to Fig. 6.9. This indicates that the junction formed between two epi-layers has much better quality than one formed between an epi-layer and a silicon substrate. This is quite consistent with the experimental strategy described previously in Section 6.2. That is, for the first case, the quality of the junction depends largely on the surface condition of the substrate. A good quality junction can only be grown if the substrate surface is free of oxide and contaminants. In contrast, for the second case, two epi-layers were grown in a single experimental run. Fewer 194 Pig. 6.9 SEM (left) and EBIC (right) images for a cell whose junction is formed between an epi-layer and a substrate 195 L- $CH EHT- 10.0 KV WD- 21 mm PH0T0= 19 R= 100 urn I------—I SP .CURRENT = -8.0ufl LPE CELL flSN4 BY Z SHI EBIC B CHRN 16 SEP 1991 Fig. 6.10 SEM (left) and EBIC (right) images for the a cell whose junction is formed between two epi-layers grown on a heavily doped substrate 196 contaminants and crystal defects were introduced into the junction region during crystal growth. However, the EBIC image still reveals some defects in the junction region. These defects could be continued from the first epi-layer, which, in turn, started from the substrate surface. Alternatively these defects could be formed during crystal growth or be caused by the discontinuity of the growth between the first and second epi-layers. 6.4 Polycrystalline thin film silicon solar cells on glass substrates An initial attempt has been made to fabricate polycrystalline thin film silicon solar cells on glass substrates. Two methods have been explored for this purpose. The first method was to deposit a p-type polyciystalline silicon layer on a glass substrate and then to do a phosphorus diffusion to make a p-n junction. Since the silicon film was rough, a spin-on source was used to diffuse an n-type emitter into the top surface of the layer. The procedures for device fabrication were as follows: 1) The samples were cleaned using RCA# and HF solutions; 2) It was not possible to spin the liquid phosphorus source on the sample because of the lack of a suitable chuck for the spinner. Instead it was applied directly using a dropper. The liquid source seemed to wet the silicon and spread rapidly across the surface. The dopant was then dried at 160°C for one hour; 197 3) The diffusion was done at 700°C for one hour under an oxygen ambient. The samples were placed in the furnace while it was at room temperature. It was then ramped up to 700°C. After one hour, the power to the furnace element was switched off. The wafers were removed at about 150°C; 4) An attempt was made to etch the emitter from one edge of the silicon layer by dipping it into a Si-etch solution. However, it was found that the solution quickly spread up along the surface of the film. It was decided to use wax to mask part of the film. The sample was placed on a hot-plate at about 200°C. The wax was then applied to part of the surface. The sample was then removed from the hot plate. When the wax solidified, the sample was placed in a Si-etch solution (1:10 HFiHNOg) for about 10 sec. to remove the emitter layer; 5) The wax was then removed in three consecutive baths of boiling TCA (1,1,1-Trichloroethane, CH3CC13) for 5 minutes; 6) Ti/Pd/Ag metallisation was applied by vacuum evaporation through shadow masks (1 cm2) on the emitter and A1 was evaporated on the p-type film exposed by the Si-etch; 7) The device was finally sintered in a furnace at 300°C under a nitrogen ambient for 30 minutes. 198 The second method was to grow p-n junctions directly from solutions using the same technique for p-n junction growth on crystalline silicon substrates. The device was designed as a P*+PN++ structure. The first silicon layer was a heavily doped p-type polyciystalline silicon layer on a glass substrate, which was finished in a single growth run. The thin film on glass was soaked in an aqua- regia solution to remove carry-over from the surface of the silicon layer. The sample was then cleaned with RCA# and HF solutions prior to the growth of the first and second epi-layers. The first epi-layer was a moderately doped p-type layer and the second epi-layer was a heavily doped n-type layer. These two layers were grown in a sequential order using exactly the same growth conditions as those used for p-n junction growth on the crystalline silicon substrates. After growth, the sample was, again, put in an aqua regia solution to remove carry-over. A hot probe was used to check the doping type of the layers. Ohmic contacts to both the p- and n-type layers were applied on the front surface. Since the n-type area (the second epi- layer) was intentionally designed smaller (4 cm2) than the p-type area (the first epi-layer with 15 cm2), Ti/Pd/Ag multilayers were evaporated through a shadow mask (1 cm2) on the centre emitter area and A1 was evaporated on the surrounding p type area. The device was then sintered at 300°C under a N2 ambient for 30 minutes. Current-voltage charcteristic of the devices grown on glass substrates by both methods showed that the devices were shunted. The shunting is due possibly to non-continuous formation of the emitter layer or to the presence of residual metal precipitates (e.g., A1 199 and Sn) in the silicon layer which causes a shunt across the junction. More investigation is underway in this area. 6.5 References: 1. H. J. Hovel, "Semiconductors and Semimetals", ed. R. K. Willardson and A. C. Beer, Academic, New York, 1975, Vol. 11 2. Martin A. Green, "High Efficiency Silicon Solar Cells", Trans. Tech. Publication, Switzerland, 1987 3. Kentaro Ito and Kunio Kojima, "Solution-Grown Silicon Solar Cells" in Proc. 1st Photovoltaic Science and Engineering Conference in Japan, 1979 printed in Japanese Journal of Applied Physics, Vol. 19 Supplement 19-2 (1980) pp. 37-41 4. Kentaro Ito, Tatsuo Nakazawa and Akira Masamura, "Silicon Solar Cells Made by Liquid Phase Epitaxy", Proc. 3rd Photovoltaic Science and Engineering Conference in Japan, 1982 reprinted in Japanese Journal of Applied Physics, Vol. 21 Supplement 21-2 (1982) pp. 125- 129 5. Copyright 1989, Iowa State University Research Foundation (ISURF), 315 Beardshear Hall, Ames, IA 50011, (515) 294-4740 200 CHAPTER SEVEN CONCLUSION AND FUTURE DIRECTIONS 7.1 Introduction This chapter summarises the results obtained in this thesis work, discusses the problems remaining, and proposes future research directions in this area. 7.2 Summary and Discussion The purpose of this thesis work was to search for a technique to deposit polycrystalline silicon thin films on to glass substrates for low cost photovoltaic cell production. Solution growth was selected as a method for deposition because of its advantages over other deposition techniques, such as low growth temperature and large grain size. This thesis investigates the selection of an appropriate solvent for the growth of silicon of good crystallographic quality, nucleation and orientation control of silicon crystals on dissimilar substrates, continuous polycrystalline silicon thin film growth on glass substrates, and silicon thin film photovoltaic device fabrication. Liquid phase epitaxial layers of silicon have been grown on (111) and (100) silicon substrates from A1 and Au related solutions at low temperatures. The motivation for these experiments was to search for an appropriate solvent for solution growth of silicon on 201 dissimilar substrates. The alloyed solutions of type I and type II metals[l], Al/Ga, Al/Sn, Al/Zn, Au/Bi, Au/Pb, Au/Sn, have shown higher silicon solubility at low temperatures than those used previously. The silicon epitaxial layers grown from A1 containing solutions were heavily doped p-type and those grown from Au based solutions were moderately doped n-type as determined by spreading resistance measurements. The silicon epitaxial layers grown from Au/Pb solutions exhibited an unusual morphology possibly due to two immiscible phases in the solution. As a result of these experiments, A1 related solutions, especially Al/Sn alloys, have been chosen for solution growth of silicon on dissimilar substrates. Graphoepitaxy of silicon on Si02 substrates was investigated. A high density of large grain, (111) orientated crystals was deposited on patterned Si02 substrates. This is a possible technique for growing single-crystalline silicon film on glass substrates or on Si02 coated glass substrates. To deposit silicon on glass substrates, various approaches were used to enhance nucleation. These approaches all have potential to give good quality silicon crystal growth on glass. Large area (up to 10 cm2) polycrytalline silicon thin films with grain sizes from 50 to 250 |im were deposited on bare glass substrates by a rheotaxy technique, and by using glass substrates coated with amorphous silicon. A periodic regrowth technique has been used to improve surface smoothness and to further enhance growth of polycrystalline silicon grains. The silicon films grown on glass substrates show good 202 mechanical and chemical stability, and the adhesion between the silicon film and the glass substrate is surprisingly good. Finally, the electronic properties of solution-grown silicon films were investigated by using the films in the fabrication of photovoltaic devices. Silicon p-n junctions have been grown from doped Sn solutions on silicon and glass substrates. Cells with an area of 1 cm2 have been fabricated using the silicon films. Open circuit voltages up to 605 mV were achieved for thin film silicon solar cells grown on heavily doped p-type (111) silicon substrates. This indicates that the quality of the silicon films grown from the solutions is reasonably good. Solar conversion efficiencies up to 6% for cells without surface passivation, antireflection coatings and light trapping further confirm this quality. 7.3 Future Prospects The solution evaluation experiments demonstrated that silicon epitaxial layers can be deposited at very low temperatures by liquid phase epitaxy (LPE) from A1 and Au alloy solutions. The investigation of silicon LPE from Au/Pb solutions could be continued to obtain a detailed understanding of the growth kinetics. Graphoepitaxy of silicon is a very attractive technique not only for photovoltaic application, but also for its possible importance in silicon on insulator (SOI) technology. More work needs to be done in this area to determine how crystal orientation varies with the pattern shape and size, and how to increase the nucleation density to get a 203 continuous single crystalline silicon layer on an amorphous substrate. The techniques developed for silicon deposition on glass substrates may be applicable to the integrated circuit industry, such as for producing polycrystalline silicon thin film transistors (TFT) on glass substrates. This application needs silicon films of good crystal quality and low impurity level. Another research focus is to investigate techniques for scaling up to mass production of large area silicon photovoltaic modules grown on glass substrates. Initial thin film photovoltaic device work demonstrates that it should be possible to fabricate a high efficiency thin film silicon solar cell when the techniques used for conventional high efficiency silicon solar cells, such as surface passivation, light trapping schemes, and anti-reflection coatings are incorporated in the processing sequence. PC-ID, a computer modelling program is an auxiliary tool for optimum design of a thin film silicon solar cell. Future work will concentrate on photovoltaic device fabrication using polycrystalline silicon thin films deposited on glass substrates. This includes refining the quality of the base layer, improving the junction growth technique, and exploring other techniques for p-n junction formation on polycrystalline silicon films deposited on glass substrates. 204 7.4 References: 1. Soo Hong Lee and Martin A. Green, Journal of Electronic Materials, Vol. 20, No. 8 (1991) pp.635-641 205 APPENDIX I[l] NUMERICAL MODELLING OF SOLUTION GROWTH 1. Numerical Method A one dimensional solution has been obtained by segmenting the melt into 25 segments of width e as shown in Fig. 1. The segment numbers are 1, 2...... j...... 25 with corresponding concentrations Cj, C2, ...» Cj, ... C25. In this case, the concentration represents that of Si in Ga. Diffusion of Si in the solid has been neglected, i.e. the solid composition has been assumed to be uniform and stoichiometric. The basis of the method is to start with an initial concentration C(x,t=0)=C0 for all x, and to calculate successive concentration profiles after successive time increments x. One can write C(x,t)=C(J,n) where x=ej and t= xn (where j is the segment number and n is the number of time cycles that have occurred). The one-dimensional diffusion equation relative to the moving interface as origin is: ac/at = d a2c/ax2 + Rac/ax where D is the diffusion coefficient of Si in Ga solution and R is the interface velocity. It has been shown that in the case of LPE[1] r ac/ax « d a2c/ax2 Thus the change in the concentration in the jth segment during the time x is ACj = Ax [d2C/dx2]j, 206 or ACj = At(52Cj + 84Cj/12-56Cj/90...), where 8mCj is the mth order central difference in C at j [2]. Thus if we take the second order difference only, Cj,n+1 = Cj n + D'cCCj.i n - 2Cj n + Cj+i n). The factor Dx/e2 is called the modulus M; it is necessary to choose values of x and e for a given value of D in such a way as to make M < 1/3(2]. 2. Boundary conditions In the basic model of bulk diffusion for a given solution thickness, the boundary conditions used are: 1) At the interface, the concentration of the melt is assumed to be the equilibrium concentration (This assumption can be realised if the cooling rate of the solution is low enough). The function Cx = 65.98 e -7899.5K/T Cm-3 is a fairly accurate representation of the Ga-Si liquidus for temperatures from 779°C to 469°C[3]. 2) At the other solution boundary, (dC/dx)j=25 = 0. 3. Growth rate Assuming that the growth rate is not limited by kinetic factors, it will be determined by the rate at which solute atoms diffuse to the interface. With reference to Fig. 2, in a small element thickness 8x 207 adjacent to the interface there will be a flow of material in due to diffusion and interface movement, and a flow out due to growth, i.e. (dC/dt) 5x = D (dC/dx)x,6x -R(Cs-Cx=&t), where Cs is the concentration of Si atoms in solid Si. As dx—>0, R = D(dC/dx)x=0/(Cs-Cx=0), or in terms of a segmented solution, R = D(C2-C1)/[e(Cs-C1)], and the thickness grown G = XRx = ZtD(C2-C x) /e(cs-C i). Here the concentration gradient has been taken at the boundary between the first and second segments which is also the gradient at the interface if segment 1 lies in the crystal. Segment 1 is, in fact, fictitious and because it lies in the crystal, the interface concentration is slightly supersaturated during growth. This has the advantage that it provides the driving force for crystal growth to occur. 4. Reference: 1. I. Crossley and M. B. Small, "Computer Simulation of Liquid Phase Epitaxy of GaAs in Ga Solution", Journal of Crystal Growth, Vol. 11 (1971) pp. 157-165 2. H. S. Carslaw and J. C. Jaeger, "Conduction of Heat in Solids" , Oxford University Press, 1959, p. 468 3. R. Linnebach and E. Bauser, "Low Temperature Liquid Phase Epitaxy of Silicon", Journal of Crystal Growth, Vol. 57 (1982) pp. 43- 47 208 Solution Boundaiy Solution ------> Solid Crystal 1 2 3 ...... j-l : J j+i; - ... 25 Cl C2 ;C3 ; •••• ..... Q-1 :Q Cj+i: ••• ..... ;C25 C(x,t)=C(j,n) where x=je e=segment spacing t=nx x=time increment Fig. 1 The segmentation of solution in front of the interfaced] 209 Solid Solution Fig. 2 Diagram showing solute flowing and out of a amall segment 5x adjacent to the interface[l] 210 5. Program Listing: The program was written in 'Turbo Pascal". Program LPE-SIMULATION; Var c: array [1..30] of real; concentration of silicon atoms in Ga solvent g: array [1..50] of real; growth thickness of the film cc: array [1..30] of real; concentration of silicon atoms in Ga solvent gl,r,d,s,f,eO,t,tl,tll,cs: real m,n,j,mm,j 1 ,nl: integer; datafile: text; Procedure Diffusion; begin for i:=2 to n do begin c [i]; =cc [i]+d*S* (cc [i-1 ]-2*cc [i]+cc [i+1 ]) /f*f;; end; for i:=2 to n do begin cc[i]:=c[i]; end; r:=d*(cc[2]-cc[l])/(f*(cs-cc[l])); gl:=r+gl; end; begin readln(d,s,f,t,tl,tll,cs,n,mm,m,nl); r:=0; gl:=0; for i:=l to n do begin cc[i]:=(4.82e+22)*exp(8.42-(1.32e+4)/t); end; assign(datafile,'a:\myfile.txt'); rewrite (datafile); for i:=l to n do begin writeln(datafile, cc[i]); end; 211 writeln(datafile, 'meltback procedure'); for j:=l to nl do begin t:=t+(j-l)*tl; cc[l]:=(4.82e+22)*exp(8.42-(1.32e+4)/t); diffusion; end; writeln(datafile, 'temperature, T:=',t); writeln(datafile, 'meltback, gl:=',gl); writeln (datafile, 'solute concentration profile'); for i;=l to n do begin write (datafile, cc (i]); end; writeln; writeln(datafile, growth procedure'); for j:=l to mm do begin for j:=l to m do begin t:=t-(j-l)*tl 1; cc[l]:=(4.82e+22)*exp(8.42-(1.32e+4)/t); diffusion; end; writeln(datafile, 'temperature, T:=',t); writeln(datafile, 'growth rate, r:=',r); writeln (datafile, 'thickness gl:=',gl); writeln(datafile, 'solute concentration profile'); for i;=l to n do begin write(datafile, cc[i]); end; end; close (datafile); end; 212