Plugging Into High-Volume Consumer Products

Total Page:16

File Type:pdf, Size:1020Kb

Plugging Into High-Volume Consumer Products ISSUE 53, SECOND QUARTER 2005ISSUE 53, SECOND QUARTER XCELL JOURNAL XILINX, INC. Issue 53 Second Quarter 2005 XcellXcelljournaljournal THETHE AUTHORITATIVEAUTHORITATIVE JOURNALJOURNAL FORFOR PROGRAMMABLEPROGRAMMABLE LOGICLOGIC USERSUSERS PluggingPlugging intointo High-VolumeHigh-Volume ConsumerConsumer ProductsProducts HIGH VOLUME Spartan-3E: A New Era Multimedia for Automotive DSP Algorithms DESIGN TOOLS New ISE 7.1i Software Control Your Designs SERIAL I/O Extend Your Reach SUBSCRIBE NOW R SEE PAGE 3 Xilinx is the only FPGA supplier in the world to have achieved high-volume 90nm production, resulting in the lowest-cost FPGAs in the industry. Our leadership in 90nm products gives you all the performance and features you need, at the lowest price points ever. Both our SpartanTM and VirtexTM product lines__ the world's most widely adopted FPGAs__ are shipping on our optimized 90nm process now. Contact your Xilinx rep today and let's ramp up for success together. The Programmable Logic CompanySM www.xilinx.com/spartan3 Pb-free devices available now ©2004 Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124. Europe +44-870-7350-600; Japan +81-3-5321-7711; Asia Pacific +852-2-424-5200; Xilinx is a registered trademark, Spartan and Virtex are trademarks, and The Programmable Logic Company is a service mark of Xilinx, Inc. LETTER FROM THE EDITOR What’s Both High and Low, and Used Everywhere...? This issue of the Xcell Journal focuses on high-volume, low-cost consumer applications and the design tools used to implement them. Business Viewpoints Our Business Viewpoints column offers an independent business perspective by Rich Wawrzyniak, Senior Analyst, ASICs Services for Semico Research Corporation. His article, EDITOR IN CHIEF Carlis Collins “Changing the Systems Landscape with Low-Cost FPGAs,” discusses how advanced processing [email protected] technology is driving down the costs of FPGAs and changing the ASSP/ASIC crossover point. 408-879-4519 T High-Volume Solutions MANAGING EDITOR Forrest Couch Approximately one year ago Xilinx® engineers were asked to develop the lowest cost, highest density [email protected] 408-879-5270 FPGA family on the market. This section features articles using the new Spartan™-3E devices in several high-volume applications. Their low cost makes these devices successful in applications ASSISTANT MANAGING EDITOR Charmaine Cooper Hussain previously reserved for ASIC and gate-array technologies. XCELL ONLINE EDITOR Tom Pyles Industry Expert [email protected] In “Extend Your Reach,” well-known signal integrity expert Howard Johnson discusses the 720-652-3883 Virtex™-4 RocketIO™ transceiver, which incorporates three forms of equalization to stretch the ADVERTISING SALES Dan Teie reach and performance of serial links. 1-800-493-5551 Design Tools ART DIRECTOR Scott Blair Software support for the Spartan-3E family is available with the newly announced ISE™ 7.1i tools. This section has articles from Xilinx and some of its partners describing the use of their design tools to implement a complete solution. Board Room The Board Room section describes some of the Spartan-3 hardware development boards and other design solutions to help you determine which platform is best for your application and design task. Power Play The new Power Play section features technical descriptions of our partners’ power solutions. In Steve Sharp’s lead article, “Conquering the Three Challenges of Power Consumption,” he writes, Xilinx, Inc. “To conquer the key challenges of power consumption, it takes a combination of good product 2100 Logic Drive San Jose, CA 95124-3400 design, proper device technology, and tools that let you take control of system power management.” Phone: 408-559-7778 FAX: 408-879-4780 And... It’s Time to Re-Subscribe www.xilinx.com/xcell/ Periodically, we must clean our mailing database. As of January 1, 2005, you must re-subscribe to continue receiving the Xcell Journal FREE. If you subscribed after January 1, 2005, you do not © 2005 Xilinx, Inc. All rights reserved. XILINX, the Xilinx Logo, and other designated brands included have to re-subscribe. If you subscribed before this date, please visit our website at herein are trademarks of Xilinx, Inc. PowerPC is a trade- mark of IBM, Inc. All other trademarks are the property www.xilinx.com/xcell/subscribe/ and take a minute to renew your FREE subscription and ensure of their respective owners. uninterrupted delivery. The articles, information, and other materials included in this issue are provided solely for the convenience of our readers. Xilinx makes no warranties, express, implied, statutory, or otherwise, and accepts no liability with respect to any such articles, information, or other materials or their use, and any use thereof is solely at the risk of the user. Any person or entity using such information in any way releases and waives any claim it might have against Xilinx for any loss, damage, or expense caused thereby. Forrest Couch Managing Editor TABLE OF CONTENTS INDUSTRY EXPERT DESIGN TOOLS 63 This section comprises articles from Xilinx and its partners describing the use of the newly announced ISE 7.1i software, 66 as well as other design tools. This article, by well-known signal integrity expert Howard POWER PLAY Johnson, discusses the Virtex-4 RocketIO transceiver, which incorporates three forms of equalization to stretch the reach and performance of serial links. 104 High-Volume Solutions The latest FPGAs from Xilinx set new records in capacity, capability, performance, power efficiency, and value. 13 The new Power Play section features technical descriptions of our partners’ power solutions. BOARD ROOM 112 This section describes some of the Spartan-3 hardware development boards and other design solutions. SECOND QUARTER 2005, ISSUE 53 Xcell journal INDUSTRY EXPERT Extend Your Reach -- Using RocketIO Transceivers.....................................................................6 BUSINESS VIEWPOINTS Changing the Systems Landscape with Low-Cost FPGAs ..........................................................10 HIGH-VOLUME SOLUTIONS Leading the High-Volume Programmable Revolution ...............................................................13 Spartan-3E FPGAs Introduce a New Era in Low-Cost Programmable Logic...................................14 Implementing New Configuration Options for the Spartan-3E Family.........................................16 Encoding High-Resolution Ogg/Theora Video with Reconfigurable FPGAs...................................19 Implementing DSP Algorithms Using Spartan-3 FPGAs ............................................................22 Designing a Spartan-3 FPGA DDR Memory Interface...............................................................26 Signal Processing Capability with the Nu Horizons Spartan-3 Development Board.......................28 CoolRunner-II CPLDs Offer New Features...............................................................................31 Reducing Bill-of-Materials Cost Using Logic Consolidator ..........................................................34 Using CoolRunner-II Silicon Features to Reduce Cost...............................................................36 Using Spartan-3/3E Features to Area-Optimize Your Design....................................................39 Low-Cost EasyPath FPGAs Offer Promise to ASSP Companies...................................................42 Applications of the Spartan Family in Flat-Panel Displays.........................................................46 Managing Signal Quality ....................................................................................................49 Meeting Timing and Reducing Area with the Synplify Pro Tool .................................................52 The Changing Face of Automotive ECU Design.......................................................................54 A Multimedia Platform for Automotive and Consumer Markets.................................................57 A Low-Cost PCI Express Solution..........................................................................................60 DESIGN TOOLS Design Leadership From Xilinx -- Introduction.........................................................................63 Design Performance Leaps Forward with ISE 7.1i Software.....................................................64 Debugging with Combined Oscilloscope and Logic Analyzer Measurements................................67 Real-Time Debug That Dominates ........................................................................................70 Integrating MATLAB Algorithms into FPGA Designs..................................................................73 Complex FPGAs Require Equivalence Checking.......................................................................76 Complete FPGA and CPLD Power Analysis .............................................................................80 Increase Performance and Lower Cost Through System Design.................................................83 Control Your Designs with the PlanAhead Hierarchical Design and Analysis Tool ..........................86 Building High-Performance Measurement and Control Systems with FPGAs................................90 GENERAL The Hydra Project (Chess Program)......................................................................................94 Accelerating Time to Market with Embedded Processing QuickStart!.........................................98 Bioinformatics Algorithms on Nallatech-Configurable
Recommended publications
  • Automatic Sandboxing of Unsafe Software Components in High Level Languages
    Master Thesis Automatic Sandboxing of Unsafe Software Components in High Level Languages Benjamin Lamowski Technische Universität Dresden Fakultät Informatik Institut für Systemarchitektur Professur Betriebssysteme Betreuender Hochschullehrer: Prof. Dr. rer. nat. Hermann Härtig Betreuender Mitarbeiter: Dr. Carsten Weinhold 3. Mai 2017 Aufgabenstellung Neue “sichere“ Programmiersprachen wie Go, Swift oder Rust wurden nicht nur für die normale Anwendungsentwicklung entworfen, sondern sie zielen auch auf eine hochper- formante Ausführung und Programmierung vergleichsweise systemnaher Funktionalität ab. Eine attraktive Eigenschaft beispielsweise von Rust ist das gegenüber C und C++ deutlich strengere Speicherverwaltungsmodell, bei dem bereits zur Kompilierzeit der Lebenszyklus und die Erreichbarkeit von Objekten sowie die Zuständigkeit für deren Allokation und Deallokation wohldefiniert sind. Ganze Klassen von Programmfehlern wie etwa Buffer Overflows oder Dereferenzierung ungültige Zeiger werden dadurch eliminiert und die Programme mithin sicherer und robuster. Aus diversen Gründen müssen Programme, die in sicheren Sprachen geschriebenen wurden, aber oftmals auf “unsicheren“ Legacy-Code zurückgreifen. So bietet etwa Rust über das “unsafe“-Sprachelement die Möglichkeit, Funktionen innerhalb von Bibliotheken aufzurufen, die in fehleranfälligem C geschrieben sind. Leider werden die vom Com- piler durchgesetzten Garantien der sicheren Sprache hinfällig, sobald im Code einer C-Bibliothek ein Speicherfehler auftritt. Ein Schreibzugriff etwa durch
    [Show full text]
  • A Microkernel API for Fine-Grained Decomposition
    A Microkernel API for Fine-Grained Decomposition Sebastian Reichelt Jan Stoess Frank Bellosa System Architecture Group, University of Karlsruhe, Germany freichelt,stoess,[email protected] ABSTRACT from the microkernel APIs in existence. The need, for in- Microkernel-based operating systems typically require spe- stance, to explicitly pass messages between servers, or the cial attention to issues that otherwise arise only in dis- need to set up threads and address spaces in every server for tributed systems. The resulting extra code degrades per- parallelism or protection require OS developers to adopt the formance and increases development effort, severely limiting mindset of a distributed-system programmer rather than to decomposition granularity. take advantage of their knowledge on traditional OS design. We present a new microkernel design that enables OS devel- Distributed-system paradigms, though well-understood and opers to decompose systems into very fine-grained servers. suited for physically (and, thus, coarsely) partitioned sys- We avoid the typical obstacles by defining servers as light- tems, present obstacles to the fine-grained decomposition weight, passive objects. We replace complex IPC mecha- required to exploit the benefits of microkernels: First, a nisms by a simple function-call approach, and our passive, lot of development effort must be spent into matching the module-like server model obviates the need to create threads OS structure to the architecture of the selected microkernel, in every server. Server code is compiled into small self- which also hinders porting existing code from monolithic sys- contained files, which can be loaded into the same address tems. Second, the more servers exist | a desired property space (for speed) or different address spaces (for safety).
    [Show full text]
  • A Practical UNIX Capability System
    A Practical UNIX Capability System Adam Langley <[email protected]> 22nd June 2005 ii Abstract This report seeks to document the development of a capability security system based on a Linux kernel and to follow through the implications of such a system. After defining terms, several other capability systems are discussed and found to be excellent, but to have too high a barrier to entry. This motivates the development of the above system. The capability system decomposes traditionally monolithic applications into a number of communicating actors, each of which is a separate process. Actors may only communicate using the capabilities given to them and so the impact of a vulnerability in a given actor can be reasoned about. This design pattern is demonstrated to be advantageous in terms of security, comprehensibility and mod- ularity and with an acceptable performance penality. From this, following through a few of the further avenues which present themselves is the two hours traffic of our stage. Acknowledgments I would like to thank my supervisor, Dr Kelly, for all the time he has put into cajoling and persuading me that the rest of the world might have a trick or two worth learning. Also, I’d like to thank Bryce Wilcox-O’Hearn for introducing me to capabilities many years ago. Contents 1 Introduction 1 2 Terms 3 2.1 POSIX ‘Capabilities’ . 3 2.2 Password Capabilities . 4 3 Motivations 7 3.1 Ambient Authority . 7 3.2 Confused Deputy . 8 3.3 Pervasive Testing . 8 3.4 Clear Auditing of Vulnerabilities . 9 3.5 Easy Configurability .
    [Show full text]
  • On the Construction of Reliable Device Drivers Leonid Ryzhyk
    On the Construction of Reliable Device Drivers Leonid Ryzhyk Ph.D. 2009 ii iii ‘I hereby declare that this submission is my own work and to the best of my knowledge it contains no materials previously pub- lished or written by another person, or substantial proportions of material which have been accepted for the award of any other degree or diploma at UNSW or any other educational institution, except where due acknowledgement is made in the thesis. Any contribution made to the research by others, with whom I have worked at UNSW or elsewhere, is explicitly acknowledged in the thesis. I also declare that the intellectual content of this the- sis is the product of my own work, except to the extent that as- sistance from others in the project’s design and conception or in style, presentation, and linguistic expression is acknowledged.’ Signed .................................. Date .................................. iv Abstract This dissertation is dedicated to the problem of device driver reliability. Software defects in device drivers constitute the biggest source of failure in operating systems, causing sig- nificant damage through downtime and data loss. Previous research on driver reliability has concentrated on detecting and mitigating defects in existing drivers using static analysis or runtime isolation. In contrast, this dissertation presents an approach to reducing the number of defects through an improved device driver architecture and development process. In analysing factors that contribute to driver complexity and induce errors, I show that a large proportion of errors are due to two key shortcomings in the device-driver architecture enforced by current operating systems: poorly-defined communication protocols between drivers and the operating system, which confuse developers and lead to protocol violations, and a multithreaded model of computation, which leads to numerous race conditions and deadlocks.
    [Show full text]
  • Executive Summary
    Mobile Commerce Security: Legal & Technological Perspectives Michael Triguboff Table of Contents EXECUTIVE SUMMARY 4 INTRODUCTION 7 The Need for Security 11 PART I TECHNOLOGY 12 Client-Side Vulnerabilities 12 Browser Software 13 Java Applets 14 ActiveX controls 16 JavaScript 18 Plug-Ins and Graphic Files 18 Push technology 18 Web Server Security 19 Front-end 20 Firewalls 22 Back-end Database vulnerabilities 23 Server- Side Middleware 24 Operating System Problems 25 Hardened versions of Operating Systems 36 Distributed systems 37 Software Testing 38 Mobile Commerce Issues 43 Device Properties 43 Wireless Communication 45 Wireless Communication Protocols 47 Ad Hoc Networks 49 Ad Hoc Networks and Key Management 51 Network Protection in Ad Hoc Networks 54 Location Dependent Information and Mobile Computing 55 Mobile Agents 56 Protecting the Host from the Mobile Agent 59 Safe Code Interpretation 61 Digital Signatures 63 Proof Carrying Code 63 Path Histories 64 Software-Based Fault Isolation [“Sandboxing”] 64 Protecting the Agent From the Host and Other Agents 64 Secure Control of Remote Agents 65 Read-Only/Append-Only 65 Partial Results Encapsulation 66 Code Obfuscation 67 Computing with Encrypted Functions 67 Environmental Key Generation 68 Execution Tracing 68 Itinerary Recording 69 Security Through Shared Secrets and Interlocking 69 Other Approaches 69 Attacks Based on Device Limitations 71 2 Prevention, Detection and Reaction 71 Intrusion Detection 72 Intrusion Detection and Mobile Agents 75 Part I Conclusion 76 PART 11 THE LEGAL PERSPECTIVE 80 The Debate: A Confluence of Two Streams 81 Uniform Electronic Transactions Act 85 Article 2B of the Uniform Commercial Code 85 The Electronic Signatures in Global and National Commerce Act [“E-Sign Act”] 88 Jurisdiction Selection 90 Reaction- Criminal Law 96 Convention on Cyber-Crime 97 Evidentiary or Procedural Law 99 Practical Considerations 100 Part II Conclusion 101 APPENDIX 103 Digital Millennium Copyright Act 103 BIBLIOGRAPHY 107 3 EXECUTIVE SUMMARY The objectives of this project are twofold.
    [Show full text]
  • Open Ongtang-Phd-Dissertation.Pdf
    The Pennsylvania State University The Graduate School SECURING MOBILE PHONES IN THE EVOLVING MOBILE ECOSYSTEM A Dissertation in Computer Science and Engineering by Machigar Ongtang © 2010 Machigar Ongtang Submitted in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy August 2010 The dissertation of Machigar Ongtang was reviewed and approved∗ by the following: Patrick D. McDaniel Associate Professor of Computer Science and Engineering Dissertation Advisor, Chair of Committee Thomas F. La Porta Distinguished Professor of Computer Science and Engineering Trent Jaeger Associate Professor of Computer Science and Engineering Ling Rothrock Associate Professor of Industrial and Manufacturing Engineering Raj Acharya Professor of Computer Science and Engineering Department Head ∗Signatures are on file in the Graduate School. Abstract The revolution of mobile phone industry has been altering our life and business practices over the past few decades. Driven by user demands and technological advancement, we now experience rich mobile phone applications and sophisticated cellular services ranging from mobile payment, stock trading, to social networking, vehicle tracking to in-car control. As more players joining the community, this mobile phone environment has transformed into a complex network of interacting companies, known as mobile ecosystem. Unfortunately, this opening and converging mobile ecosystem has brought in more opportunities for more attacks on mobile phones, a key element of the system. This dissertation aims to achieve mobile phone security. We reveal two main chal- lenges that we need to overcome, namely developing a clear definition of secure phones, and building security infrastructure that imposes such definition on the phones. We also identify three key elements that contribute to the fidelity of mobile phones, namely, mobile phone platforms, mobile phone applications, and mobile content.
    [Show full text]
  • Capability Myths Demolished
    Capability Myths Demolished Mark S. Miller Ka-Ping Yee Jonathan Shapiro Combex, Inc. University of California, Berkeley Johns Hopkins University [email protected] [email protected] [email protected] ABSTRACT The second and third myths state false limitations on We address three common misconceptions about what capability systems can do, and have been capability-based systems: the Equivalence Myth (access propagated by a series of research publications over the control list systems and capability systems are formally past 20 years (including [2, 3, 7, 24]). They have been equivalent), the Confinement Myth (capability systems cited as reasons to avoid adopting capability models cannot enforce confinement), and the Irrevocability and have even motivated some researchers to augment Myth (capability-based access cannot be revoked). The capability systems with extra access checks [7, 13] in Equivalence Myth obscures the benefits of capabilities attempts to fix problems that do not exist. The myths as compared to access control lists, while the Confine- about what capability systems cannot do continue to ment Myth and the Irrevocability Myth lead people to spread, despite formal results [22] and practical see problems with capabilities that do not actually exist. systems [1, 9, 18, 21] demonstrating that they can do these supposedly impossible things. The prevalence of these myths is due to differing inter- pretations of the capability security model. To clear up We believe these severe misunderstandings are rooted the confusion, we examine three different models that in the fact that the term capability has come to be have been used to describe capabilities, and define a set portrayed in terms of several very different security of seven security properties that capture the distinctions models.
    [Show full text]
  • Scalability of Microkernel-Based Systems
    Scalability of Microkernel-Based Systems Zur Erlangung des akademischen Grades eines DOKTORS DER INGENIERWISSENSCHAFTEN von der Fakultat¨ fur¨ Informatik der Universitat¨ Fridericiana zu Karlsruhe (TH) genehmigte DISSERTATION von Volkmar Uhlig aus Dresden Tag der mundlichen¨ Prufung:¨ 30.05.2005 Hauptreferent: Prof. Dr. rer. nat. Gerhard Goos Universitat¨ Fridericiana zu Karlsruhe (TH) Korreferent: Prof. Dr. sc. tech. (ETH) Gernot Heiser University of New South Wales, Sydney, Australia Karlsruhe: 15.06.2005 i Abstract Microkernel-based systems divide the operating system functionality into individ- ual and isolated components. The system components are subject to application- class protection and isolation. This structuring method has a number of benefits, such as fault isolation between system components, safe extensibility, co-existence of different policies, and isolation between mutually distrusting components. How- ever, such strict isolation limits the information flow between subsystems including information that is essential for performance and scalability in multiprocessor sys- tems. Semantically richer kernel abstractions scale at the cost of generality and mini- mality–two desired properties of a microkernel. I propose an architecture that al- lows for dynamic adjustment of scalability-relevant parameters in a general, flex- ible, and safe manner. I introduce isolation boundaries for microkernel resources and the system processors. The boundaries are controlled at user-level. Operating system components and applications can transform their semantic information into three basic parameters relevant for scalability: the involved processors (depending on their relation and interconnect), degree of concurrency, and groups of resources. I developed a set of mechanisms that allow a kernel to: 1. efficiently track processors on a per-resource basis with support for very large number of processors, 2.
    [Show full text]
  • What Have We Learnt in 20 Years of L4 Microkernels?
    Lecture 6 From L3 to seL4: What Have We Learnt in 20 Years of L4 Microkernels? Kevin Elphinstone and Gernot Heiser Operating Systems Practical 12 November, 2014 OSP Lecture 6, L4 Microkernels 1/42 Contents Introduction and design principles Brief history of microkernels L4: Basic abstractions L4: Design and implementation choices Keywords Questions OSP Lecture 6, L4 Microkernels 2/42 Outline Introduction and design principles Brief history of microkernels L4: Basic abstractions L4: Design and implementation choices Keywords Questions OSP Lecture 6, L4 Microkernels 3/42 Context and terminology I Operating system I Kernel I Monolithic kernel I Microkernel OSP Lecture 6, L4 Microkernels 4/42 Operating system I abbrv. OS I Software (collection) to interface hardware with user I Components: I Kernel: Linux, FreeBSD, Windows NT, XNU, L4, ::: I Services/daemons: sysvinit, CUPS print server, udev, ::: I Utilities: ls, Windows Commander, top I Other applications OSP Lecture 6, L4 Microkernels 5/42 Kernel I Components directly interfacing with hardware I Examples? I \Core" of OS I No general definition of \core" OSP Lecture 6, L4 Microkernels 6/42 Monolithic vs. Micro-kernel Application Syscall User VFS "ode Uni File Server Device Server IPC, file system Application Driver Scheduler, virtual memory !ernel "ode Device drivers, dispatcher IPC, virtual memory IPC Hardware Hardware Source: http://www.cse.unsw.edu.au/ OSP Lecture 6, L4 Microkernels 7/42 Monolithic vs. Micro-kernel Monolithic kernel Microkernel I IPC, scheduling, I IPC, scheduling, memory management memory management I File systems I API closer to the I Drivers hardware I Higher-level API OSP Lecture 6, L4 Microkernels 8/42 Microkernel principles: minimality I If it's not critical, leave it out of the kernel I Pros: I Small code base I Easy to debug I Trusted Computing Base, feasible for formal verification I Cons: I Harder to find the \right" API design I Harder to optimize for high-performance OSP Lecture 6, L4 Microkernels 9/42 Microkernel principles: user-level services I Drivers, file systems, etc.
    [Show full text]
  • Marijuana Business Licenses Approved
    OREGON LIQUOR & CANNABIS COMMISSION Marijuana Business Licenses Approved as of 9/9/2021 Retail Medical LICENSE NUMBER LICENSEE NAME BUSINESS NAME LICENSE TYPE ACTIVE COUNTY Delivery Grade Hemp 050 100037147CC Hotbox Farms LLC Hotbox Farms Recreational Retailer Yes Baker Yes 050 10011127277 Scott, Inc 420VILLE Recreational Retailer Yes Baker 020 10017768FC7 Burnt River Farms, LLC Burnt River Farms LLC. Recreational Producer Yes Baker 030 10031846B25 Burnt River Farms, LLC Burnt River Farms LLC. Recreational Processor Yes Baker 060 1003692E356 Burnt River Farms, LLC Burnt River Farms LLC. Recreational Wholesaler Yes Baker 050 1003713A8A4 The Coughie Pot, LLC The Coughie Pot Recreational Retailer Yes Baker 050 10047883377 Sumpter Nugget, LLC Sumpter Nugget Recreational Retailer Yes Baker Yes 030 10071310CDB Nugget Candy Co, LLC Nugget Candy Co, LLC/Bad Rabbit Recreational Processor Yes Baker Yes Solventless 060 10079080A50 420BUNKERVILLE LLC 420 Bunkerville Recreational Wholesaler Yes Baker Yes 020 1007910A67C 420BUNKERVILLE LLC 420 Bunkerville Recreational Producer Yes Baker 020 1008998100D Burnt River Farms, LLC Burnt River Farms LLC Recreational Producer Yes Baker 060 1010135EC04 Hotbox Farms LLC Hotbox Farms Recreational Wholesaler Yes Baker 020 10104590FEE Bad Rabbit Farms LLC Bad Rabbit Farms LLC Recreational Producer Yes Baker 020 10001223B25 Fire Creek Farms LLC. Fire Creek Farms Recreational Producer Yes Benton 020 1000140D286 Bosmere Farms, Inc. Bosmere Farms, Inc. Recreational Producer Yes Benton 020 10004312ECD Grasshopper Farm,
    [Show full text]
  • Minotaur Automotive Tuning Software™ User's Guide
    Minotaur Automotive Tuning Software™ User's Guide 192 Picklesimon Rd. Winder, GA 30680 Phone: (678) 890-1110 gopowerhungry.com Compiled and Written by William Cohron This book is dedicated to my wonderful family. Without your strength, your encouragement, and your understanding of my obsession with the world of automotive high performance, this book, along with so many other things that I’ve accomplished, would not have been possible. I would also like to dedicate this book to our son, Wil. It is so unfortunate to have lost you at such a young age. Your love for cars, tuning, racing, and engineering was quite exceptional for a person of your age, and it was fascinating to watch you growing into the enthusiast that I was at your age. You are missed daily by those who love you and knew you, and I hope that we all make you proud. All contents © 2021, Power Hungry Performance, Inc. This document is protected by US and International Copyright Laws. No part of this manual may be reproduced, either in whole or in part, without the express written consent of Power Hungry Performance, Inc. Violators will be prosecuted to the fullest extent of the law. Version 20210216a (Online) The Minotaur Automotive Tuning Software™ is an extremely powerful and flexible application and in order to provide this degree of flexibility it does not restrict or limit any of the values being modified. This software is recommended for experienced users only. It is very easy to make an adjustment to a calibration that could cause the engine to not start, run poorly, cause erratic shifting or result in other drivability concerns or loss of control while driving.
    [Show full text]
  • Université De Strasbourg École Doctorale Mathématiques
    Université de Strasbourg École Doctorale Mathématiques, Sciences de l’Information et de l’Ingénieur Laboratoire des sciences de l’ingénieur, de l’informatique et de l’imagerie (ICube) THÈSE présentée par : Jean-François DOLLINGER Soutenue le : 01 juillet 2015 pour obtenir le grade de : Docteur de l’Université de Strasbourg discipline/spécialité : Informatique A framework for efficient execution on GPU and CPU+GPU systems Thèse dirigée par : M. CLAUSS Philippe Professeur, Unistra, Strasbourg Rapporteurs : M. COHEN Albert Directeur de Recherche INRIA, ENS, Paris M. BODIN François Professeur, IRISA, Rennes Examinateurs : Professeur, Universität des Saarlandes, Saar- M. HACK Sebastian brücken, Allemagne M. LOECHNER Vincent Maître de conférences, Unistra, Strasbourg Laboratoire des sciences de l’ingénieur, de l’informatiqueet de l’imagerie(ICube) UMR 7357 2 Contents 1 Résumé en Français 11 1.1 Introduction................................. 11 1.2 Prédiction et sélection adaptative de version de code . ........ 12 1.2.1 Introduction............................. 12 1.2.2 Vue d’ensemble du framework . 13 1.2.3 Equité ................................ 14 1.2.4 Prédiction .............................. 14 1.2.5 Expérimentations . .. .. 16 1.3 Calcul hétérogène : CPU vs GPU ..................... 17 1.3.1 Introduction............................. 17 1.3.2 CodeCPU.............................. 18 1.3.3 CodeGPU.............................. 18 1.3.4 Expérimentations . .. .. 19 1.4 Calculhétérogène:CPU+GPU . 19 1.4.1 Introduction............................. 19 1.4.2 Générationdecode ......................... 20 1.4.3 Répartitiondecharge. 21 1.4.4 Multiversioning ........................... 23 1.4.5 Consommationd’énergie . 23 1.4.6 Experimentations . .. .. 23 1.5 Parallélisationspéculative . ... 24 1.5.1 Introduction............................. 24 1.5.2 Problématique............................ 25 1.5.3 Machinevirtuelle .......................... 25 1.5.4 Contributions ...........................
    [Show full text]