California State University, Northridge

CALIFORNIA STATE UNIVERSITY, NORTHRIDGE

PHYSICS BASED SIMULATION OF GaN MESFET FOR HIGH POWER RF

APPLICATIONS

A graduate project submitted in partial fulfillment of the requirements

For the degree of Master of Science

In Electrical Engineering

JIMIT GANDHI

May 2016

The graduate project of Jimit Gandhi is approved:

______

Dr. Sembiam Rengarajan Date

______

Dr. Robert D. Conner Date

______

Dr. Somnath Chattopadhyay, Chair Date

California State University, Northridge

Acknowledgement

I would sincerely like to thank my professor Dr.Somnath Chattopadhyay for being my guide and advisor. I am really grateful to him for the continuous support that he has provided me throughout the development of the project. I wouldn’t have been able to complete my project without his knowledge, support and encouragement. I am thankful to him for showing me examples related to my project.

I would also like to show my gratitude to Dr. Robert D. Conner and Dr. Sembiam

Rengarajan who supported me to complete the project.

Besides, I would also like to thank the Department of Electrical and Computer

Engineering for providing me with a good environment and facilities to complete this project. It gave me an opportunity to participate and learn about the software MATLAB.

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Table of Contents

Signature Page ……………………………………………………………………………………ii

Acknowledgement ...... iii

List of Figures ...... vii

List of Tables ...... ix

ABSTRACT ...... x

Chapter 1 ...... 1

1.1 Introduction ...... 1

1.2 Some advantages of GaN over other materials ...... 7

1.3 Comparison between GaAs, SiC and GaN...... 8

Chapter 2 ...... 10

2.1 Properties of GaN ...... 10

2.2 Different Parameters for GaN ...... 11

2.3 Specific-On resistance and Breakdown Voltage for GaN and Sic ...... 13

2.4 Performance comparison of SiC and GaN‘s potential gradient...... 13

2.5 Pulsed Measurements of GaN MESFETs ...... 15

2.6 DC Measurements of GaN MESFETs ...... 15

2.7 Static Pulsed Measurements ...... 16

2.8 Potential distribution along the cross-section using Kelvin Probe Force Microscopy...... 16

2.9 Limitations in growth of GaN ...... 22

2.10 GaN Applications ...... 24

Chapter 3 ...... 25

3.1 Equilibrium Point Defects and Diffusion ...... 25

3.2 Ion Implantation ...... 29

Chapter 4 ...... 35

4.1 MESFET Device ...... 35

4.1.1 TYPES OF MESFETS ...... 36

4.1.2 Principles of the GaN MESFET Operation ...... 37

4.1.3 Current-Voltage Characteristics of GaN MESFET ...... 38

4.1.4 Carrier Mobility in Gallium Nitride (GaN) ...... 40

4.2 Electrical Parameters ...... 41

4.2.1 Parasitic Inductances ...... 43

4.2.2 Parasitic Resistances ...... 44

4.2.3 Intrinsic Capacitance ...... 44

4.2.4 Transconductance (gm) ...... 46

4.2.5 Output Resistance (Rds) ...... 47

Chapter 5 ...... 48

5.1 Threshold Voltage ...... 48

5.2 I-V Characteristics of GaN MESFET ...... 51

5.3 Internal Gate Capacitance (Intrinsic Parameters) ...... 53

5.4 Internal Drain-Source Resistance ...... 55

5.5 Transconductance (gm) ...... 56

Chapter 6 ...... 57

6.1 Results and discussions ...... 57

Chapter 7 ...... 60

7.1 Conclusion ...... 60

References ...... 61

Appendix ...... 67

List of Figures

Figure 1 Basic Schematic view of MESFET Structure ...... 5

Figure 2 Wurtzite Structure of GaN...... 7

Figure 3 Vd vs. E for Sic and GaN ...... 10

Figure 4 Specific-on Resistance (Ron) vs. Breakdown Voltage (V) ...... 13

Figure 5 Static Id vs. VDS characteristics between Vgs of -1V to -5V GaN MESFET ...... 14

Figure 6 Static Id vs. VDS characteristics between Vgs of -1V to -5V SiC MESFET ...... 14

Figure 7 DC Id vs. VDS characteristics for a 0.2x5x0.03 mm GaN MESFET in presence and absence of light ...... 15

Figure 8 Id vs. VDS Characteristics for 0.2x5x0.03 mm GaN MESFET in presence and absence of light ...... 16

Figure 9 Schematic C-S view of (a) Fabricated Field effect transistor and (b) KFM Measurement

System ...... 17

Figure 10 Electric Field Distribution without SiNx passivation layer ...... 18

Figure 11 Electric Field Distribution with SiNx passivation layer ...... 18

Figure 12 Electric Field Distribution at the mid-depth of GaN without SiNx Passivation Layer 19

Figure 13 Electric Field Distribution at the mid-depth of GaN buffer with SiNx Passivation

Layer ...... 20

Figure 14 Electric Field Distribution under the Gate Electrode of AlGaN/GaN HFET without

SiNx Passivation Layer ...... 21

Figure 15 Electric Field Distribution under the Gate Electrode of AlGaN/GaN HFET with SiNx

Passivation Layer ...... 21

Figure 16 Anomalous phosphorus diffusion displaying a kink and tail characteristic ...... 28

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Figure 17 Ion implantation process flow-chart ...... 30

Figure 18 Primary implant damage: (a) with no amorphous layer formed, (b) buried and (c) amorphous layer extended to the surface...... 32

Figure 19 MESFET Model (Gallium Nitride) ...... 35

Figure 20 Enhancement type MESFET structure ...... 36

Figure 21 Depletion type MESFET structure ...... 37

Figure 22 IDS vs. VDS Characteristic of GaN MESFET at different values of VGS ...... 38

Figure 23 GaN MESFET operation under different Vds biasing with Vgs = 0: a) Linear region

(Vds low), b) Vds at the commencement of saturation, c) Vds big...... 39

Figure 24 MESFET models showing intrinsic elements: (a) physical origin (b) Large signal model (c) Small signal model...... 43

Figure 25 The schematic representation of the GaN MESFET structure used in the study ...... 48

Figure 26 Gate-Drain Capacitance (CGD) vs. Drain-Source Voltage (VDS) ...... 57

Figure 27 Transconductance (gm) versus gate-source voltage (Vgs) ...... 58

Figure 28 Internal drain-source resistance ( RDS) vs. Gate length (L) ...... 59

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List of Tables

Table 1 Basic comparison between SiC, GaAs and GaN ...... 8

Table 2 Different Parameters of Gallium Nitride ...... 12

Table 3 Classification of various extended defects due to ion implantation ...... 34

ABSTRACT

PHYSICS BASED SIMULATION OF GaN MESFET FOR HIGH POWER RF

APPLICATIONS

Jimit Gandhi

Master of Science in Electrical Engineering

GaN material becomes a prime candidate for high power and frequency amplifiers for its properties like high electric breakdown voltage, stability and good thermal conductivity, wide bandgap and high electron velocity. A physics based analytical model for GaN MESFET is developed, taking into consideration different fabrication parameters like Ion range, Ion dose, annealing parameters, ion energy and physical parameters like channel thickness, impurity doping concentration and substrate doping to obtain optimized values for threshold voltage, intrinsic parameters like, Internal gate-drain resistance, Transconductance, gate-drain capacitance and source-drain current. The intrinsic parameters were studied for the explanation of frequency response of the device made from GaN material. The detailed analysis of which has been explained in the theory section of chapter 4 and chapter 5.

Chapter 1

1.1 Introduction

Gallium nitride (GaN) has unique characteristics which include: high thermal conductivity, broad band-gap, high electric field strength breakdown and very low intrinsic concentration. These characteristics have made it an attractive material in making the power transistors. Other characteristics are relatively low permittivity and relatively high drift velocity (the saturation velocity), implying ability for great frequency performance.

GaN with direct bandgap structure has become primary candidate in optoelectronic devices (which operate in wavelengths range between blue and ultraviolet) and electronic devices (which operate at high temperature and power levels) because of its wide bandgap. Super-lattices, quantum and transistors well devices based on GaN are commonly applicable in both the optoelectronic and electronic devices.

Research are being carried out in order to develop GaN power based devices with lower on resistance together with higher breakdown voltage compared to devices based on silicon. The inverse proportionality of specific on resistance to the third order of electric field breakdown gives the GaN devices specific on resistance of order three lower than those of devices based on silicon [15].

“GaN HEMT’s with output power of 9.8W/mm at 8 GHz” [25], “ft =101GHz and fmax=

155 GHz, and operating temperature of 750°C have been reported” [38]. Nitride semiconductor has drawn much interest in different applications. Technology growth is rapidly advancing and theory is yielding transporting data of material. GaN is capable of

providing microwave power devices which operate under high temperature. 1 × 1017

Doping concentration of GaN has a theoretical value of about 1500cm2/Vs field electro mobility. This value of electron mobility is higher than those of SiC (Silicon Carbide) poly-type [17].

GaN becomes viable choice because of requisition of high frequency. Basically this is because of high electron saturation velocity up to 3 × 1017푐푚/푠 and extremely low dielectric constant which results to low capacitance. Integrated circuits (ICs) are very realizable and HBTs are preferred. The HBTs are preferred since they are tolerant to heat.

In addition some applications which require high frequency and speed employ the tolerance of high temperature property of GaN and HBTs devices. The property is useful in satellite, aircraft and RADAR applications. In unfavorable environments with high temperatures and situations where superior power are demanded devices made of GaN based on FETs are preferred due to their switching properties and power amplifications

[32]. A lot of advancement on the devices with broad band gap is being undertaken. GaN is given lesser deliberations in attempt to attain high standoff voltages. This may provide benefits that cannot be attained by electromechanical and silicon based power gadgets.

The high standoff voltages can lead to disposal of necessary arrangement of stacking gadgets [38].

To save on cost sapphire and Si wafers may be used as substrates instead of using SiC substrate in developing GaN devices. The property of high breakdown of the GaN also enables it to be used at elevated temperature. Initially the cost of fabricating GaN was very high and therefore its application was limited to RADAR, communications only of high security and warfare. Nowadays it is used in varied commercial applications because

of its reduced cost of fabrications which have come about as a result of decreased cost of developing substrate together with wafer for GaN [15]. Monte Carlo simulations and experiments generally provide explorations on GaN. Semi-empirical model is also considered as a model of GaN based on MESFET and used for the cases of small signals, where MW transistors are simulated using scattering parameters and admittance [20].

“The DC attributes of GaN MESFETs with length of gate as 4 µm have been as of late reported, the gadget manufacture and microwave exhibition with length as small as

0.7μm GaN MESFETS where the engaged channel was developed on an exceptionally resistive GaN layer. GaN epi-layers are developed on orientation as (111) using crystal diamond substrate by NH3source atomic beam epitaxy” [14]. “The GAN band edge is focused at 3.469 eV with a line width of 5 meV and the aforementioned effects exhibit that GaN hetero-epitaxially developed on jewel opens new spaces for heightened power electronic provisions”[21].

GaN devices and material are currently under study with the target being on the electron transport characteristics. The consideration made is that drift velocity, 푣푑 of electron and the electric field are co-dependent and its region of differential conductivity is negative.

The potential of GaN MESFET of operating over a wide range of temperature needs models which are accurate in the simulation of temperature dependence parameters of a variety of devices. The contributions of the material parameters (which depend on temperature) are useful in developing accurate I-V models.

The MESFET principle preferences in contrast to its counterparts include:

 High electron velocity within the channel.

 Travelling time is smaller hence quicker reaction is accelerated.

 The active layer of GaN (semi insulated substrates) is fabricated to reduce

parasitic capacitances thus leading to high switching speed.

 Channel conductance has majority carrier.

 The noise is extremely low.

The MESFET essential preference is based on the huge electron mobility in the channel in comparison to the MOSFET. The carriers in MOSFET are responsible for inversion layer. These carries have wave capacity that argument to oxide. Their portability and surface mobility is less than half the versatility of the mass material. The portability of the carriers gets closer to that of the mass material if the transporters are split by exhaustion locale from the surface. Also the bulk material mobility gets closer to that of the carriers when they are separated through a depletion layer [43].

GaN material also has wide applications in p-n junction and Schottky diodes. The

Schottky metal gate vicinity hinders the MESFET structure. It acts as constraint for forward bias voltage on Schottky diode gate to Schottky diode turn on voltage. GaAs

Schottky diode commonly has a voltage turn on of 0.7V. Therefore, the threshold voltage is less in comparison to the voltage turn on. Hence it is troublesome to make circuits containing a large number of MESFET improvement modes [7].Because of high

MESFET’s travel frequency makes it useful particularly in the investment in microwave circuits.

GaN electronic devices for p-n junction diodes and Schottky barrier diodes are fabricated through the growth of hetero-epitaxial layer on a substrate such as sapphire and SiC. It is

impossible to realize a good GaN crystalline structure. At high densities specifically between 109 and 1010 squared centimeters there exists a lattice mismatch together with dislocation of epitaxial layers of GaN. This is because of the thermal expansion coefficients difference. The major demerit of devices based on GaAs, silicon and electronic devices from their alloys is the incompatibility at mordant environment and higher temperature. Devices with wide band gap do not show such shortcomings [38].

According to [19] MESFET playing point furnishes predominant circuit in microwave and amplifier. The impediment due to turn-on of diode is tolerated. The high transconductance and current due to depletion mode of MESFETs leads to their preference. Due to these circuits use of the transistors is limited and therefore controlling the threshold is no longer a concern. Moreover commotion exhibition is improved by the covered channel. This improvement comes as a result of transporters’ trapping and discharge either into or from the surface states together with the disposal of imperfections. The Figure 1 shows the schematic view of MESFET.

Figure 1 Basic Schematic view of MESFET Structure

Predominant electrical characteristics of Gallium nitride (GaN) gives it incredible ability to be used in force gadgets as a key material. The property of GaN that differentiates it from other counterfeits is that its avalanche breakdown field is elevated. GaN various parameters, both physical and analytical, can be arrived at through simulation models.

This is very significant since it helps in the exploration of the material and emerge it market leader for its high important electronic applications [25].

Realizing competency of power handling of devices fabricated by GaN is done by depicting different hindrances in both conducting and non-conducting states. The models proposed showed SAGFETs possesses expansive band cut-off frequency which is of important and goes to the extent of doubling that of MESFET’s provide that voltage which take care the SACFET’s ability is kept lower [41]. The low cost and friendly fabrication impact is considered to be income of broad band, linear, high power and efficiency of GaN devices. GaN MESFET has much consideration than HEMT. The reason for this is that dissection of its structure can be done with less complexity than that of HEMT [36]. GaN material due to its perfect electrical properties may be a good alternative for Silicon Carbide (SiC) in microwave of high temperature and power applications. Wurtzite structure of GaN is shown in Figure 2.

Figure 2 Wurtzite Structure of GaN

1.2 Some advantages of GaN over other materials:

 GaN do have higher mobility than other materials like Si and SiC hence making it

the most appropriate material at high frequencies.

 The wavelength inside the visible region is spanned in Group III nitride alloy

system. Nitride based materials has band gap which ranges between 1.9eV and

6.2eV.

 Dielectric constant of GaN is low and its thermal conductivity pathway is high.

 Bond strength of GaN is high and its melting temperature is high too. Thus its

reliability is better than other materials due to its possession of high bond

strength.

 Devices based on GaN can be operated under harsh environments. This is because

nitrides possesses chemical resistant.

 Using GaN sources of light leads is cost saving as compared to conventional

sources of light due to their compactness and reliability.

 GaN based LEDs usage may lead to decrease of greenhouse gases hence reducing

global warming risks.

 The major GaN application is found in fabrication of blue laser diodes. These

laser diodes are applicable in optical storage systems [19].

1.3 Comparison between GaAs, SiC and GaN

Material Property GaN SiC GaAs

Thermal Conductivity (Watts/cm. K) 1.3 5 0.5

Electron-Mobility (µ)(cm2/V-sec) 2000 900 8500

Electron Saturation Velocity (cm/sec) 25 22 12

Band-gap (values in eV) 3.4 3.2 1.43

High/Low Power Device High High Low

Table 1 Basic comparison between SiC, GaAs and GaN

Table 1 presents the basic comparison of SiC, GaN and GaAs. GaN HEMTs and GaN

MESFETs do possess great ability in high power amplifiers at frequencies of microwave since they have the following properties: broad band gap, their electron saturation velocity is high, high temperature of operation and their breakdown electric field strength is high. High power density integrated with comparable high impedance which can be attained with these devices offers new chances for broad band for systems of power microwave.

GaN material and Device Applications

GaN materials have high remarkable electrical and electronic properties. These materials were widely explored for their usage in high power RF transistor. Broad band property of

GaN does allow high voltages supply and operation at high temperature situations.

Some years down the line there has been development of broad band gap materials like

GaN. The key point for this is due to their possession of higher breakdown voltage and their lower rate of thermal generation. Thus, these material properties are applicable in elevated temperature, microwave frequency and elevated power. Currently military applications have developed interest to a great extent in devices based on GaN due to their properties like efficiency and elevated power. GaN MESFETs have gained great consideration due to less complexity in examining its structure as compared to complexity of examining the structure of HEMTs (High Electron Mobility Transistors).

Analytical models based on simple physics should be developed for the study of varied parameters of the GaN. This would help to explore the ability of GaN in semiconductor electronics and may lead to a new direction in computer aided design [15].

Chapter 2

2.1 Properties of GaN

Gallium nitride (GaN) as a semiconductor material has various desirable characteristics.

These characteristics make it very essential in applications which involve high power and speed. Its two properties which make it viable under harsh environment include: broad band gap and high avalanche. It has stability and good thermal conductivity. This makes it applicable in high temperature and power electronic devices. Its electron velocity at peak is 2.4 x 107cm/sec as shown in Figure 3.

Figure 3 푽풅 VS. E for Sic and GaN

This value has been obtained from Monte Carlo simulations and it is applicable for high frequency gadgets. Its fabrication is simple and it also has minimal dopant diffusion challenges in comparison to its counterparts. For this reason MESFETs are favorable in manufacturing very large ICs. It also has broad band gap. This leads to large electron mobility hence an increase in rate of frequency of operation. This reason gives it advantage over silicon in the industry of semiconductors. GaN has a direct band gap.

Therefore, it is integrated with optical devices. The direct band gap of GaN has made it favorable in the modern industry and it gives understanding of the principles of operation.

Monte Carlo simulations are used in solving the Boltzmann Transport equations. They help to encounter the effects of hot electron present in devices fabricated by GaN [15].

2.2 Different Parameters for GaN

The different parameters of the Gallium Nitride (GaN) material along with the required units are shown in Table 2

Parameters Units GaN

High-Frequency Dielectric 5.35

Constant

Density g/cm 6.15

Effective Mass( Valley) Me 0.20

Symmetry Zinc blende/ wurtzite

Energy Gap(Valley) EV 3.39

Hole mobility cm2/Vs 30.0

Static Dielectric constant 8.9

Saturation velocity cm/s 2.5x107

Lattice constant, a (c) Å 3.189

Peak velocity cm/s 3.1x107

Light hole mass Me 0.259

Polar Optical Phonon MeV 91.2

Energy

Breakdown field V/cm >5x106

Peak velocity field kV/cm 150

Electron mobility cm2/Vs 1000

Melting Temperature OC 2530

Thermal Conductivity W/cm-K 1.5

Table 2 Different Parameters of Gallium Nitride

Factors below that made GaN very helpful for microwave applications include:-

1) Extremely high values for electron mobility.

2) Along with large thermal conductivity pathways it has comparative low dielectric constant.

3) GaN has Strong bond strengths which lead to higher melting point. Thus high reliability is attained.

4) It is resistant to chemical etching effects. Therefore, it can be operated under harsh environmental conditions [15].

2.3 Specific-On resistance and Breakdown Voltage for GaN and Sic

In simple words, we can define Specific on resistance as the total resistance experienced by current whenever it flows from the source end to the drain end of the device. Lower values of Ron are necessary for effective operation of MESFETs. It is clearly depicted from Table 2 and Figure 4 that GaN display least Ron at high breakdown voltage that is necessary for a desirable operation [15].

Figure 4 Specific-on Resistance (퐑퐎퐍) vs. Breakdown Voltage (V)

2.4 Performance comparison of SiC and GaN‘s potential gradient.

The procured aspects are usually indistinguishable. From Figure 5 and Figure 6, we can observe that for both structures the value for conductance generally increase and never squeezes off to zero even for very low or negative gate bias. The already-mentioned impact occurs due to two reasons, first is short channel impact and the second is solid electron infusion of support layer. It is possible to acquire drain current for both the structures which then confirms that it is essential for sensitive power provision. Again,

GaN materials have the preferred electronic transport lands over SiC. Because of this, it

gives 70% higher 퐽푑 in comparison to its counterparts. It can be deduced that, as the length of the device (L) reduces, higher values of 퐼푑 are reached and hence results into velocity overshoot and expansion in longitudinal electric field [15].

Figure 5 Static 푰풅 vs. 푽푫푺 characteristics between Vgs of -1V to -5V GaN MESFET

Figure 6 Static 푰풅 vs. 푽푫푺 characteristics between Vgs of -1V to -5V SiC MESFET

2.5 Pulsed Measurements of GaN MESFETs

GaN material shows superior electrical properties. Materials made from GaN have been suitably researched on its operation in RF transistors. The broad band gap of GaN material makes it suitable for high temperature and supply voltage application. Until now its electrical properties were not fully explored [15].

2.6 DC Measurements of GaN MESFETs

From Figure 7 given a Vgs of one volt and eighteen volt Vds, 퐼푑 of approximatelty 0.305

푛퐴⁄푚푚 in presence of light and 0.270 푛퐴⁄푚푚 in dark (absence of light) is exhibited by the transistor. This variation can best be expounded by the presence of electrical traps situated in the core material surface. Additional measurements are ongoing so as to determine their location [3].

Figure 7 DC 푰풅 vs. 푽푫푺 characteristics for a 0.2x5x0.03 mm GaN MESFET in presence and absence of light

2.7 Static Pulsed Measurements

These measurements were also carried out under the same conditions on the device. It was observed from Figure 8 that the utmost 퐼푑 value obtained in dark conditions is one half of the 퐼푑 obtained under pulsed conditions. An indication about the presence of traps

(electrical) inside the material is given by the huge loss of current [2].

Figure 8 푰풅 vs. 푽푫푺 Characteristics for 0.2x5x0.03 mm GaN MESFET in presence and absence of light 2.8 Potential distribution along the cross-section using KFM.

The two dimensional electrical potential distribution is measured using an important measurement technique called Kelvin probe force microscopy. It is the most used technique for analysis of potential during operating state of FET. For analysis, a cleaved surface of an AlGaN/GaN HFET is required. The analysis is carried out without and with

SiNX passivation layer. The KFM is used for several device operation conditions and the various influences of the SiNX layer on the electric field distribution have been analyzed

[38].

Figure 9 Schematic C-S view of (a) Fabricated Field effect transistor and (b) KFM

Measurement System

From Figure 9, the ohmic contacts for channel and source, which consists of Ti/Al/Ti/Au layered structure and a Ni/Au comprising Schottky contact gate was structured on the given substrate. Length of the gate( 퐿푔) was about 1000 nm. Also the gate channel separation, 퐿푑푔 along with source-gate separation, 퐿푠푔, were approximated to be 2000 and 1000 nm, respectively [24].

Figure 10 Electric Field Distribution without SiNx passivation layer

Figure 11 Electric Field Distribution with SiNx passivation layer

From Figure 10 and 11, we can see that the electric field is poised at the center of the gate and drain region. Moreover, we can observe that maximum electric fields for both the cases are almost the same. However, near the surface, the electric field distribution of the passivated AlGaN/GaN HFETs is relatively weak when compared to the non-passivated

AlGaN/GaN HFETs [34].

Figure 12 Electric Field Distribution at the mid-depth of GaN without SiNx Passivation Layer

Figure 13 Electric Field Distribution at the mid-depth of GaN buffer with SiNx Passivation Layer From Figure 12, 13, 14and Figure 15 as expected on the behavior of the electric field close to the buffer layer and the substrate, the strength of electric field goes on increasing with decrease in the width of the GaN buffer layer. Whereas, a marginally stronger field concentration is seen for thick GaN buffer layer with thickness approximately equal to

2000 nm within SiNx-passivated AlGaN/GaN HFET [6].

Figure 14 Electric Field Distribution under the Gate Electrode of AlGaN/GaN HFET without SiNx Passivation Layer

Figure 15 Electric Field Distribution under the Gate Electrode of AlGaN/GaN HFET with SiNx Passivation Layer

2.9 Limitations in growth of GaN

The most important drawback for usage of GaN slim films in homo-epitaxial process advancement as a substrate is the low availability of single valuable crystals(> 1 푐푚).

Because of this reason, hetero-epitaxial advancement has achieved more importance making the choice of substrate used even more critical. Lower thermal growth is one of the main problems with the currently feasible substrate materials. In addition, they should not be affected by improvement sciences (like 퐻3 or 푁퐻3) at elevated improvement temperatures (in excess of 1000 ℃ in certain instances). This stipulations make SiC and sapphire Al2O3 the most valuable substrate at this time. Equivalent division densities are observed between the GaN and 6H-SiC matrix as an outcome of strain proportional to it

[15]. Having better conductivity of heat along with other properties, SiC substrate has gained vast applications in raised temperature power electronics devices like transistors.

Materials having an adjacent grid match with GaN were also used for epitaxial substrates.

The desirable electronic properties are not being offered from improved GaN material because of the unintended contamination from the substrate or the complex infrastructure.

The aggregation of nitride is tested with hetero-epitaxial films growth with incomprehensible MESFETs [15].

A number of thin film epitaxial structures can thus be fabricated by use of a variety of routine incorporations such as hydride vapor based epitaxy (HVPE), MOCVD and molecular beam epitaxy (MBE) among many available. During the initial development,

MOCVD has increased in value as a leading framework for availability of III-V nitrides microelectronic and optoelectronic growth. The high quality accomplishment of this method is the creation of super blue shiny Light emitting diodes. Sections of this

framework connect the elevated immaculacy substance sources, a lifted hierarchy of formation control and uniformity, escalated advancement rates, the proficiency to improve sharp intersections and encroachment scale collecting ability [15].

At the earliest period of using Gallium Nitride for its extraordinary ability, there existed a deterrent owing to crystal-like defects as the material development was prepared on

Silicon Carbide substrate and sapphire. The major imperfection was that within the thin film, few vertical crystal defects thread from the interface of the substrate. Rough surfaces on the wafer are induced by three dimensional growth modes. Within the interfacial free energy, there is a reduction in the film and substrate. Hence, they aid as a template for development and lateral evolution of the Gallium Nitride material. The buffer reduces lattice gap but still the flaw is more sophisticated compared to other semiconductor materials having an order of one million and above. These developed slender films still possess a threading imperfection that ranges from 109 to 1010 square centimeters. The flaws of GaN structure must be reduced so as to achieve the complete capability of GaN semiconductor [15].

Further improvement was realized in the year 1994, by use of a technique called Lateral epitaxial overgrowth (LEO). This method helped in the reduction of the structure flaws to a great degree. Advanced etching is used in the manufacture of windows to the primary coating of GaN. This is preceded by re-growth of Gallium Nitride film through achieving such state that on the mask, there is no growth. As a result, an epitaxial development is attained on GaN windows. By this technique the disruption in threading are consequently reduced on the mask of GaN. A span of 104 to 105 is attained for the concentration of disruptions in LEO GaN outer surface. In addition, there exists a conspicuous high

threading level of defects in the region of the window [15].

2.10 GaN Applications

 Military field – Wireless communication remains one potential area demanding

MW frequency performance. These are filled by SiC and GaN since they have a

wide band gap. Likewise, considering a transmitter, a PA development becomes

the bottleneck. SiC and GaN are the most appropriate to justify the wide band gap

necessities.

 Telecommunication firms- The next mobile generation satellite used in

communications and dissemination devices necessitate a very high effectiveness

and broader band width. Wireless and Broadband firms – These involve high

power and frequency applications. Thus, they need semiconductor devices of high

electron kinesis and thermal conductivity. This enhances the suitability of GaN.

 Semiconductor such as GaN having an extensive band gap gives a high power

density output making them highly suitable for production of small sized devices

[15].

Chapter 3

3.1 Equilibrium Point Defects and Diffusion

The imperfections in a crystalline material which involve just a few atoms are called

Point Defects. It has a huge impact on properties of the material and they appear in all classes of material. Vacancies are created when atom leave their normally occupied position in the lattice structure, while the host atoms which are located at any other place are called interstitials. The atoms with different atomic number than those of atoms composing the system are called impurities. Dopants are the kind of impurities that are introduced intentionally into the atom structure whereas undesired impurities are called

Contaminants.

The balance between the Internal energy (enthalpy) and statistical randomness (entropy) is provided by Gibb’s free energy, G. The value of G increases with decreasing entropy or increasing enthalpy .Due to point defects , the atoms move from their equilibrium position , thus increasing the enthalpy of the structure due to change in strain energy.

However, a balance is created with decrease in free energy of a crystal with point defects.

This suggests that it is impossible to create a stable crystal without point defects.

In a semiconductor, the equilibrium concentration of point defects is directly proportional to exponential of (-W/푘퐵T) and defined as a function of concentration and temperature respectively. The impurity trapping, stress, material processing and electron concentration also affect the equilibrium concentrations [47]. Thus, the direct measurement of equilibrium point defect population and migration is not so feasible.

Fickian Diffusion

The simplest way to describe diffusion on cellular lever is using Fick’s Law. The law is given under a steady state condition and states that the mass flux density per unit area is proportional to the concentration gradient. This can be expressed as [48]:

휕퐶(푥) 퐽 = −퐷 ( ) 휕푋 푡

Where, x = gradient.

J = Flux t = time.

C = Concentration of diffusing species.

D = Arrhenius constant (diffusion constant).

The Arrhenius equation is used for the macroscopic modeling of D and is expressed by

퐸 − 퐷(푡) = 퐷0 푒 푘푇

Where,

퐸퐴 = Activation Energy

퐷0 = Pre-exponential constant.

T = Temperature

K = Boltzmann’s Constant.

This method for calculating diffusivity holds true for lower doping concentrations.

Concentration Dependent Diffusion

This method is used for doping concentration values that are much lower than the intrinsic carrier concentration, 푛푖 , for a diffusion temperature approximated by[48]:

∆퐸푔 3 (−0.605+ ) 16 푘푇 푛푖 = 3.87 푥 10 푇2 푒

Where,

∆퐸푔 = The energy gap lowering.

D becomes a function of concentration at very high dopant condition concentration. The extrinsic diffusion coefficient is used when the total impurity concentration exceeds the intrinsic concentration.

퐷퐸 Is dependent on the proportion of extrinsic to intrinsic carrier concentration and is a function of different charge states of diffusing species.

2 − 푛 2− 푛 + 푝 퐷퐸 = 퐷푖 + 퐷 ( ) + 퐷 ( ) + 퐷 ( ) 푛푖 푛푖 푛푖

Where, there is a pre-exponential factor and activation energy of diffusion for each of the diffusivity component.

Anomalous Dopant Diffusion

Figure 16 shows that under certain conditions, dopant material like phosphorous exhibit kink and tail kind of behavior. This is characterized by an inflection and gradually sloped tail near plateau region of the surface. This type of behavior is highly for phosphorous as compared to boron [11, 37].

Figure 16 Anomalous phosphorus diffusion displaying a "kink and tail"

characteristic

Thus at high power application, using diffusion for doping does not yield a substantial value for D of Impurity in GaN. Hence the Ion implantation process is chosen over diffusion process followed by thermal annealing. Ion implantation process helps in

controlling reproducibility and uniformity in device fabrication making the channel of the device.

3.2 Ion Implantation

The method of producing the required ions of any element in special equipments, changing the electrical, physical and chemical properties of the equipment is called ion implantation. It mainly constitute of an ion extraction, acceleration, target and separation magnet. The process starts with dopants being induced to an ion source. It is then followed by its extraction from the ion extractor. The dangerous elements are separated from the dopants by passing through the magnet separator. Then they are accelerated towards the target element. Figure 17 shows the flow chart for ion implantation.

Figure 17 Ion implantation process flow-chart

For the modification of material properties which involve removal (etching) of material or addition (implantation) of material, ion beams are getting more preference.

Experiments depicting the penetration and stopping of ions in matter have existed nearly more than hundred years. The usefulness of ion implantation was first observed in 1952 at Bell Laboratories by using irradiated contact diodes within helium, achieving reduced reverse current [35]. After which, the ion implantation method for doping of semiconductor was patented [39]. Which pointed out that later annealing was must for the recrystallization of semiconductor lattice. Thus Ion implantation has developed wide application in the fabrication of single integrated circuits. The main field of application involve CMOS transistor processing of poly gate, SDE, LDD, anti-punch through and retrograde well formation. Some miscellaneous uses include gettering, enhanced etching, photo resist hardening to improve etch resistance and ion beaming.

Primary and Secondary damages

The damages compliant from ion implantation of material can be classified into two different categories:

 Secondary Damage

They result in extended defects during thermal processing.

 Primary Damage

This type of damage occur from the bombardment of the implanted ions

During the process of ion implantation, when the ions lose their energy they settle in the target material through energy transfer via nuclear collision and electronic screening.

When the energy transferred during nuclear collision exceeds the displacement energy,

Lattice displacement occurs. This displacement results in the formation of interstitial and point defects. The creation of an interstitial is accompanied by creation of a vacancy, together which is commonly known as Frenkel’s pair. This vacancy and interstitial combine and migrate, annihilating one another which is referred to as I-V recombination.

From Figure 18 we can observe that the material can be amorphized for a significant damage density (due to large ion doses). Amorphization of material occur when the damage density exceeds the lattice density by 10%. Thus the heavier ion can cause amorphization of target ions easily.

Figure 18 Primary implant damage: (a) with no amorphous layer formed, (b) buried and (c) amorphous layer extended to the surface. After the process of ion implantation, annealing is required for the recrystallization of material and for the dopants to occupy active sights. Extended defects are formed due to thermal annealing process as a result of recombination of point and interstitial defects.

The effects of this extended defects also called secondary damage, depends mainly on primary damage as classified in Table 3 below [22, 23]

As-implanted Extended defects Possible reason for

condition after annealing defects

Type I Damaged above a Dislocation loops Inability of all

(sub threshold) critical dose but Voids vacancies and

not Stacking fault interstitials to

amorphized tetrahedra located recombine and

near the projected injection of extra

range or the surface atoms into the lattice

Type II Amorphous layer Band of dislocation Recoil of extra atoms

(end of range) formed either loops located below from the amorphous

buried the layer and/or injection

or continuous to amorphouscrystalline of extra implanted

the interface atoms beyond the

surface (end of range) amorphous layer

Type III Amorphous layer Stacking faults Poor recrystallization

(regrowth formed, either Microtwins of the amorphous related) buried or Hairpin dislocations layer (i.e., (111)

continuous located in the silicon, strained SiGe

to the surface recrystallized layer alloys or compound

semiconductors)

Type IV Buried amorphous Dislocation loops Lack of perfect

(clamshell or layer formed located at the coherency when the

zipper) interface where the two regrowing

two recrystallizing amorphouscrystalline

interfaces meet interfaces

meet

Type V Crystalline or Precipitates Exceeding the solid

(solubility amorphous Dislocation loops solubility of the related) Half loop dislocations impurity, also defects

located around the from point defects

ion projected range generated by the

precipitation process

Table 3 Classification of various extended defects due to ion implantation

Chapter 4

MESFET Technology

4.1 MESFET Device

Metal semiconductor field effect transistor (MESFET) is unipolar device in which current flow is through majority carriers alone. N-type MESFET have electrons as majority carriers. On the other hand p-type MESFET have holes majority carriers. As seen in

Figure 19, MESFET has a conducting channel. It is in the channel through electricity is conducted. The channel is located between the source and drain. Gate depletion regulates the flow of carriers. Therefore, gate is used to control current flow. This is possible through adjustment of gate voltage. The adjustment leads to variation of the depletion layer [9].

Figure 19 MESFET Model (Gallium Nitride)

4.1.1 TYPES OF MESFETS

There are two types of MESFETs: a) ENHANCEMENT MESFET

N-channel MESFET in the enhancement mode has its channel region entirely covered by depletion region. Therefore, the MESFET is in non-conducting state as seen from Figure

20. To enable conduction the expansion of the channel is required. This is achieved through narrowing of the depletion layer by gate biasing. The way to arrive at this is by applying positive voltage at the gate terminal. By doing this the junction gets forward biased. As the width of channel enlarges device begins to conduct. Hence flow of carriers is facilitated [40].

Figure 20 Enhancement type MESFET structure b) DEPLETION MESFET

For depletion MESFET of n-channel depletion width (as seen in Figure 21) can be changed by alteration of voltage applied at gate terminal. For example application of negative between the gate and source terminals leads to expansion of depletion width hence the channel width becomes narrow. Thus carriers flow is obstructed. As a result

junction between channel and gate is said to be reverse biased. The depletion region may expand up to the point where it blocks entirely the channel. The channel is said to have been pinched off. Therefore, the channel resistance between source and drain increase to a large value and the MESFET turns off just in similar manner to a switch [29].

Figure 21 Depletion type MESFET structure 4.1.2 Principles of the GaN MESFET Operation

For the biasing of the device, we require 푉퐷푆 drain-source voltage and 푉퐺푆 gate-source voltage. These two voltages help in controlling the line current 퐼퐷푆 by changing the longitudinal electric field and also varying the depth of gate-depletion region [31]. The one dimensional quantitative explanation of operation of device is easier without going into deep physical analysis. The 푉퐷푆-퐼퐷푆 characteristic of the MESFET shows three distinct cases which can be identified for when 푉퐺푆 is greater than the pinch-off voltage

Vp, minimal 푉퐷푆 voltage where 퐼퐷푆 is proportionally linear to 푉퐷푆, high 푉퐷푆 in the case when the current is almost constant, and average 푉퐷푆 where 퐼퐷푆 does not have a linear relationship with 푉퐷푆.

4.1.3 Current-Voltage Characteristics of GaN MESFET

Figure 22 푰푫푺 vs. 푽푫푺 Characteristic of GaN MESFET at different values of 푽푮푺

IDS vs. VDS characteristic for an idyllic and real MESFET device are shown in Figure 22.

The graph is obtained for varying values of gate-source voltage (VGS) while keeping other parameters constant. It is worth noting that a positive finite gradient in the region of saturation is seen from the IDS vs. VDS graph. This phenomenon could be due to many reasons. Being a short gate device, injection of carrier into the substrate layer is one of the most prevailing reasons for it. The output conductance for any MESFET device is provided by the finite slope of current-voltage graph. In the graph, Idyllic current is represented using solid line whereas the actual current is represented by dashed line.

A relatively thin region of depletion is formed under the Schottky barrier gate, when gate-source voltage is kept at zero(VGS=0) and the drain-source voltage is raised to a small value. As the drain-source voltage increases linearly, longitudinal current and electric field are built in the channel. Because of this, a wider region of depletion is obtained at the drain region compared to the source region [12].

An increment in the electric field making the electrons to move faster is attained by the constricting of channel along with increase in source-drain current. As a result, an increased current is obtained at the cost of reduced channel cross-section and channel depth.

As seen in Figure 23(a), at low values of VDS, the current IDS and voltage VDS are directly proportional to each other. But if the applied voltage biasing is kept such that the reverse bias at the gate terminal goes on increasing whereas the drain bias remains constant , the conductive channel gets thinner and the depletions region broadens up.

When the gate-source voltage is equal to the pinch-off voltage, a fully depleted channel is obtained. Id drops down to zero and becomes independent of the value of VDS [27]. The pinch-off voltage is a function of the active channel depth (a). Hence it is an important parameter to be fixed at the fabrication process.

Figure 23 GaN MESFET operation under different Vds biasing with Vgs = 0: a)

Linear region (Vds low), b) Vds at the commencement of saturation, c) Vds big.

As seen in Figure 23(b), if 푉퐷푆 is increased linearly keeping 푉퐺푆>푉푃, the current in the channel increases. Along with this increase in current, the conductive channel becomes thinner and the region of depletion grows deeper at the drain end. The current inside the channel must be constant. Thus, there is an increase in electron mobility until the conductive channel at the drain end keeps getting thinner [46]. Suppose the drain-source voltage is increased further which causes velocity saturation, then the electron concentration must be raised so as to maintain current continuity. As a result of which there is accumulation of electrons near the gate end. This forms a depletion layer of electron between the drain and the gate due to the motion of electrons at saturation velocity. The depletion region has a positive charge due to the positive donor ions retained in the crystal [28].

As seen in Figure 23(c), if the drain-source voltage is increased even further, more of the voltage increase is dropped across this region to impose the electrons to cross it and little is dropped across the unsaturated part of the channel. This region is known as a charge domain or dipole layer. Thus after reaching saturation, increase in 푉퐷푆 has no effect on the drain current and is lost in the charge dipole. At this juncture, the electrons interchange at saturated drift velocity over a wide part of the length of the channel. If the small-signal MESFET device is operated in this mode, it is described to be in its saturated region. More precise models may include the impact of the charge domain.

4.1.4 Carrier Mobility in Gallium Nitride (GaN)

Mobility of the carrier (either electrons or holes) varies with change in electric field, temperature, the quality of semiconductor material and doping concentrations. During the process of cooling down after high temperature annealing, cracks are formed on nitride

crystals which are grown on sapphire structure because of the large difference in their lattice constants. Hall mobility of about 10-30 푐푚2⁄푉푠 is obtained from it. This helped in improving the carrier mobility of the GaN film. As documented by the Hall measurement, an enhancement up to the values of 350-400 푐푚2⁄푉푠 at room temperature was obtained [26].

The electron mobility of a device is inversely proportional to that of its electronic concentration as suggested from the statistical data and is not affected by the thickness of the buffer layer or the kind of substrate used for fabrication. Thus it indicates an exponential behavior rather than linear one due to this steady trend of decline. The variation in Hall measurement method, insufficient growth optimization and variant temperatures used during the growth process leads to minor spreads in values from various sources [32].

4.2 Electrical Parameters

The physical structure of MESFET is used to propose a large signal model of the device.

As seen in Figure 24 both the models are shown together for comparison. Large signal model can be used for the derivation of small signal model. Figure shows the relationship between the model elements and physical structure which are explained further. For high frequency operation, a lumped element model has been chosen which can operate in the microwave range. The significance of each element is explained further individually.

Output Resistance 푅퐷푆, Transconductance 푔푚, Intrinsic Capacitance and time delay are the parameters that can be calculated from source-drain current 퐼퐷푆. The pad capacitances can be expressed in reference to source at one side and the respective junction at the other. 퐶푃퐷 can be expressed as the pad capacitance between the source and the drain

junction and 퐶푃퐺 as the pad capacitance between the gate and the source.

Diodes can be included in parallel with pad capacitances if the required voltages are high enough to reverse bias or forward bias the gate junction. The main use of these diodes is to protect the device from damages occurring from large rectified gate current. The circuit model elements can be divided into two distinct parts relative to internal voltages.

First, elements that are linearly dependent on voltage and secondly elements that are non- linearly proportional to these voltages.

However, the circuit model can be divided into 2 parts

a) Intrinsic Parameters

The active region under the gate is characterized by these parameters and

it’s a function of bias voltage. They include 퐶퐷푆, 퐶퐺퐷, 푅푖, 푔푚, 퐶퐺푆 and

푅퐷푆.

b) Extrinsic Parameters

They are only dependent on the technological parameters. They include

other elements like 퐶푃퐺, 퐶푃퐷, 푅푔, 푅푑, 푅푠, 퐿푔, 퐿푆, and 퐿퐷.

푅푖 and 퐶퐷푆 are those intrinsic parameters that have a weak dependence on the internal voltage and are considered to be linear. Contrarily, due to significant dependence on internal voltages some of the extrinsic elements are considered to be non-linear.

Figure 24 MESFET models showing intrinsic elements: (a) physical origin (b) Large signal model (c) Small signal model.

4.2.1 Parasitic Inductances

The inductances from the extrinsic part of circuit model can be defined as Parasitic inductances. They include 퐿푔,퐿푆 , and 퐿퐷. For devices with shorter gate length, the main reason for the presence of these inductances is the deposition of contact pad on the metal surface. Gate inductance 퐿푔 is the most dominant among all inductances. Usually, 퐿푔 and

퐿퐷 are in the order of 0.005 to 0.01 nH. For the packaged device, parasitic bond wire

inductances along with the above mentioned inductances should be considered in modeling of the circuit. The parasitics of the device are controlled by these bonding inductances which are in the range of 100 to 300 pH.

4.2.2 Parasitic Resistances

Both small signal and large signal model include parasitic resistances 푅푠, 푅푑 and 푅푔 as seen in Figure 24. To compensate for bulk resistance or any ohmic contact resistance present between the n+ GaN layer and the metal electrode, source resistance Rs and drain resistance Rd are considered inside the active channel. The gate resistance 푅푔 is a result of the metallization resistance of the gate Schottky contact. The range of 푅푠, 푅푑 and 푅푔 is just a few ohms. When measurement of 푅푠, 푅푑 and 푅푔 are carried out, there is an indication that these values are dependent on the bias voltage. But to reduce the complexity of calculations, they are held constant in the large-signal models.

Nevertheless, precise models need to take into consideration their bias dependence, more so if their values are significantly dependent on the bias voltages. The parasitic resistance 푅푠, 푅푑 and 푅푔 can be approximated directly from S-parameters optimization method or from measurements of forward DC conduction. But, High frequency applications require more accurate values of the parasitic resistances for a given bias for which S-parameter optimization method is preferred [8].

4.2.3 Intrinsic Capacitance

In Figure 24, 퐶푑푠 , 퐶푔푠 and 퐶푔푑 represents the intrinsic capacitances. The change in the depletion charges relative to 푉퐺푆 and 푉퐺퐷 is illustrated by gate-source capacitance 퐶푔푠 and gate-drain capacitance 퐶푔푑, respectively. There is symmetry in division of depletion

charge relative to the source and drain region of the device. Right beneath the gate, the depletion charge extends closer and deeper towards the drain end compared to the source end. The two depletion capacitances 퐶푔푑 and 퐶푔푠 are identified by the charge redistribution due to deviation in bias voltage in the depletion region. This charge present in the region of depletion is shared between drain-gate capacitance and source-gate capacitance.

푉푔푠 and 푉푑푠, are considered to be the controlling factor for biasing under normal conditions of operation. Thus, we can define the gate-source capacitance as:

푑푄푞 퐶푔푠 = | → 푉퐷푆 = 푐표푛푠푡푎푛푡 푑푉푔푠

When empirical models or measurements are used to derive the values for capacitances, the above equation defining capacitance is not applicable. Rather, an equivalent circuit is used to define the capacitance values which help in accurate prediction of behavior of the device [42]. The definition of capacitance provided is applicable for any physics based modeling of MESFET device. As we can see from the given equation, the capacitances are not dependent on the external terminal voltages but are dependent on the internal voltages.

Under normal bias conditions for operation of a MESFET, the gate–source capacitance is always greater that the drain-source capacitance. This is due to the reason that it illustrates the change in depletion charge emanating from instabilities in 푉푔푠 while reverse bias 푉퐷푆 is greater than the reverse bias gate-source voltage. From the analysis of depletion capacitance, it is noticed that its value decreases with the increase in reverse biased voltage. This is the reason that under normal bias conditions of operation, the gate- drain capacitance 퐶푔푑 is significantly smaller in magnitude than gate-source capacitance;

yet, 퐶푔푑 is an important parameter that helps in obtaining accurate S-parameter predictions [18].

To compensate for the geometric capacitance effects, drain-source capacitance is integrated between the drain and the source electrode in the equivalent circuit. Values for

퐶푔푠 are characteristically on the order of 1 pF/mm gate width under normal MESFET bias conditions. The value of 퐶푔푠 is almost ten times larger than the values of 퐶푔푑 and 퐶푑푠.

Besides, due to symmetry, 퐶푔푠 and 퐶푔푑 are more or less equal for 푉퐷푆=0.

4.2.4 Transconductance (품풎)

Transconductance provides the mechanism of intrinsic gain of the MESFET device. For set deviation in internal input voltage 푉푔푠 , the change in output current 퐼퐷 gives the value of transconductance 푔푚. A simple definition for device transconductance is given as the gradient of the 퐼퐷푆-푉푔푠 while keeping constant the value of 푉퐷푆 . Thus the mathematical equation can be given by

푑퐼퐷푆 푔푚 = | → 푉퐷푆 = 푐표푛푠푡푎푛푡 푑푉푔푠

At microwave and millimeter wave applications, transconductance plays an important role in deciding the quality of the device. If all other intrinsic parameters are found to be equal, better performance and higher gain are observed in a device with higher transconductance. The transconductance however suffers from a phenomenon in which variation of parameter occur at lower frequencies which is due to the deep levels in the device structure. Thus transconductance depends on the process of fabrication as well as the quality of the semiconductor material [49].

At lower frequency values up to 1000 Khz, transconductance and frequency are directly

proportional. Thus it changes with change in frequency. The values of transconductance are inversely proportional to gate length and directly proportional to gate width.

4.2.5 Output Resistance 푹푫푺

The gradually increasing resistance between drain and source is known as the output resistance 푅퐷푆. An easy way to explain RDS is by explaining its inverse gDS, the output conductance. The output conductance gives the measure of the incremental change in the output current 퐼퐷푆 with the output voltage 푉퐷푆. When the source-gate voltage is held constant, the gradient of current vs. voltage characteristics gives the value of output conductance. Thus, RDS and gDS are defined mathematically by:

1 푑퐼퐷푆 푔푚 = = | → 푉퐺푆 = 푐표푛푠푡푎푛푡 푅퐷푆 푑푉퐷푆

In analog applications, an important characteristic of the device is its output conductance

( gDS) or its output resistance. The optimum voltage gain and matching properties of a device are determined using either of these values. Generally, higher switching speed are expected from a device operating at high frequency for which lower values of output conductance or extremely high values of output resistance are needed. But the length of the gate is inversely proportional to the output conductance. Thus we can say that low frequency dispersion is more important for output conductance [49].

Chapter 5

Theory and calculations on GaN MESFET

For the improvement of high power performances of GaN MESFET, device parameters such as Gate length (L), gate width (W) and channel depth (a), along with fabrication parameters like ion dose, ion range and annealing are considered. The cross-section view of GaN MESFET is illustrated in Figure 25

Figure 25 The schematic representation of the GaN MESFET structure used in the

study

5.1 Threshold Voltage

The non-uniform impurity profile for GaN after annealing can be defined as:

푋−푅푝 푄 [−( ′ )] √2 ∆푆푝 푁(푥, 푡) = ′ 푒 − 푁퐴 …………………………… (1) √2휋 ∆푆푝

Where,

′ 2 ∆푆푝 = √2퐷푡 + ∆푅푝 ………………….…….…………….….. (2)

t = annealing time

′ ∆푆푝 = straggle parameter after annealing

D = diffusion coefficient of impurity ions.

푅푝 = Implant range parameters

The threshold voltage can be calculated from one-dimensional Poisson’s equation which is given by equation (3).

푑2Φ 휌 = − …………….…………………….………. (3) 푑푥2 휖

푑Φ (푋 ) = 0 ………………………..………………. (3a) 푑푥 퐷퐺

푑Φ (푋 = 0) = 푉 − Φ …………..………………….. (3b) 푑푥 퐺 퐵

Φ(푋퐷퐺) = −∇ + 푉(푦) ……………..……………….. (3c)

Where,

푉(푦) = the potential at different values of y.

Φ퐵 = the work function difference between semiconductor-metal.

∇ = Depth of Fermi level below the conduction band in the undepleted region.

Φ(0) = the surface potential.

After applying the boundary conditions, we get threshold conditions given by equation 4 and 5.

푋푃푀 = 푋퐷푆 = 푋퐷퐺………………………………….. (4)

푉(푦) = 푉푝 = 0 …………………………………….. (5)

Where,

푋퐷퐺 = distance from surface to edge of gate depletion region in the channel.

푋퐷푆 = distance from surface to edge of substrate depletion region in the channel.

푉푝 = Pinch off voltage

Combining the threshold and boundary conditions, the threshold voltage is obtained which is given by

Φ(0) = 푉푇 − Φ……………………..……………….. (6)

The threshold voltage equation obtained by solving Poisson’s equation along with appropriate boundary conditions is given as

2 푅푝 2 {− } 푞푄√휎 +2퐷푡 2휎 푞푄푅푝 푅푝 2푁퐴 2휖 푉푇 = Φ퐵 − ∇ − [푒 ] − [푒푟푓 ( 2 ) + 1 − ( (푉푏푖 − √2휋 휖 2휖 √2√휎 +2퐷푡 푄 푞푁퐴

1 2 푉퐵푆)) ] ………………………………………………… (7)

Where:

푁퐷 = channel impurity concentration

푉푇 = Threshold voltage

휖 =dielectric constant

푉퐺푆 = Gate to source voltage a = Active Channel Thickness

Q = Ion implant dose

∇ = Depth of Fermi level below the conduction band in channel

휎 = straggle parameter

푉퐷푆 = Drain to source voltage

푁퐴 = substrate concentration

푉퐵푆 = Substrate to source voltage

푅푝 = Implant range parameters

푉푏푖 = Built-in potential voltage

Φ퐵 = Metal semiconductor work function difference

5.2 I-V Characteristics of GaN MESFET

The channel charge 푄푛 can be calculated by using [50]:

푋퐷푆 푄푛 = ∫ 푁(푋)푑푋 ………………………..…… (8) 푋퐷퐺

Where,

푋퐷푆 =distance from surface to edge of substrate depletion region in the channel.

푋퐷퐺 = distance from surface to edge of gate depletion region in the channel.

To obtain the accurate channel current, gradual channel approximation is considered.

푊 푉 퐼 = 푞휇 ∫ 퐷푆 푄 (푉)푑푉 ……………………… (9) 퐷푆 퐿 0 푛 Where,

L = Gate Length

W = Device width q = Electron charge

휇 = Electron mobility

푉퐷푆 = Drain-Source Voltage

푄푛 = Channel charge

For different values of 푉퐺푆 , the 퐼퐷푆 vs, 푉퐷푆 characteristics are evaluated using:

3 푊푄푞 푞푄휎 2 휖 2휋 2 퐼 = 휇 [ √ [훼2 − 2훼퐶 + 퐶 2 + √ (– 푉 + Φ − ∇)] − 퐷푆 2퐿 3휖 휋 1 1 푞푄휎 퐺푆 퐵푛

3 3 2 2 2푞푁퐴 2휀 2 2푞푁퐴 2휖 2 [( ) (푉푏푖 − 푉퐵푆 + 푉퐷푆)] + 푉퐷푆(1 + 훼) + [( ) (푉푏푖 − 푉퐵푆)] − 3푄휖 푞푁퐴 3푄휖 푞푁퐴 2 푞푄휎 휖 2휋 √ [훼2 − 2훼퐶 + 퐶 2 + √ (Φ + 푉 − 푉 − 휋 3휖 1 1 푞푄휎 퐵푛 퐷푆 퐺푆 3 ∇)]2 ] ……………………………………………..………..…… (10)

Where:

휋 푅 훼 = (√ ) 푃 …………………………….. (10a) 2 2휎

퐶2 = Φ퐵 − ∇ + 푉 − 푉퐺푆 ……..…………... (10b)

푅 퐶 = erf ( 푃 ) .…………….…………….. (10c) 1 휎√2

푁퐷 = channel impurity concentration

푉푏푖 = Built-in potential voltage

∇ = Depth of Fermi level below the conduction band in channel

푉퐷푆 = Drain to source voltage

푅푝 = Implant range parameters

푉퐺푆 = Gate to source voltage

휎 = straggle parameter

휖 = dielectric constant

푉퐵푆 = Substrate to source voltage

Q = Ion implant dose

Φ퐵 = Metal semiconductor work function difference

푁퐴 = substrate concentration

5.3 Internal Gate Capacitance (Intrinsic Parameters)

The total internal gate-drain capacitance (for GaN MESFET) is divided into three divisions 1, 2 and 3 along with charge segments Q1, Q2 and Q3 respectively. This can be expressed by [50]:

푑푄푇 퐶퐺퐷 = [( )] = 퐶퐺퐷1 + 퐶퐺퐷2 + 퐶퐺퐷3 = 푐표푛푠푡푎푛푡 …….…... (11) 푑푉푠

The charge Q1 which is present below the gate region is given by

푞푊퐿 푋퐷퐺′ 푋푆퐺 푄1 = ∫ 푁(푋)(푋 − 푋)푑푋 + 푞푊퐿 ∫ 푁(푋)푑푋 푋 − 푋 퐷퐺 퐷퐺 푆퐺 푋퐷푆 0

푞푊퐿 푋퐷퐺′ 푋퐷퐺′ = ∫ 푁(푋)(푋퐷퐺 − 푋)푑푋 + 푞푊퐿 ∫ 푁(푋)푑푋 …… (12) 푋퐷퐺−푋푆퐺 푋퐷푆 0

Where:

푋푆퐺 = distance from the surface to edge of gate depletion region at the source end of the channel

푋퐷퐺′ = distance from the surface to edge of gate depletion region at the drain end of the channel

In a similar manner, the charge Q2 and Q3 in region 2 and 3 are given by

휋 푄 = 휖푊(푉 − 푉 ) …………………….. (12a) 2 2 푏푖 퐺푆 and

휋 푄 = 휖푊(푉 − 푉 ) ………………. (12b) 3 2 푏푖 퐺퐷

Combining equations (11), (12) and 12(a) and 12(b), the gate-drain capacitance can be derived as

1 1 푞푄푊퐿 푀 √(푉푏푖−푉퐺푆) (푀(푉푏푖−푉퐺푆) +퐴1)2 (푀푁+퐴1)2 퐶퐺퐷 = [ 1 + 2 { − − 2 ( ) √푁 √푁 2(푀푁+퐴1)2 2 √푁−√(푉푏푖−푉퐺푆)

1 푀(√푁−√(푉푏푖−푉퐺푆) ) 1 2푁퐵휖 2 2(√푁−√(푉푏푖−푉퐺푆) ) 푉퐷푆 1 − ( ) { + }}] + 푄 푞 √(푉푏푖−푉퐺푆) √(푉푏푖−푉퐺푆) 푁 (푀푁+퐴1)2

휋 휖푊 ………………………………….…………………… (13) 2

Where:

푁 = 푉푏푖 − 푉퐺푆 + 푉퐷푆 ………………….. (13a)

4훼휖 푀 = ……………………….…….. (13b) 푞푄푅푝

2 퐴1 = 퐴3 + 훼 ………………………….. (13c)

휋 푅 훼 = (√ ) 푝 …...………………….. (13d) 2 2√휎2+2퐷푡

푅 퐴 = −훼 + erf ( 푃 ) ………………. (13e) 2 2√휎2+2퐷푡

푅 푅 2 퐴 = 1 − 2훼 erf ( 푃 ) − 푒푥푝 (− ( 푃 ) ) ….. (13f) 3 2√휎2+2퐷푡 2√휎2+2퐷푡

5.4 Internal Drain-Source Resistance

To obtain the equation for internal drain-source resistance 푅퐷푆, current-voltage equation is differentiated with respect to drain source voltage.

1 1 휋휇 2푞푄휖푉푏푖 2 휇푊푄푞 2 푉푝 2 2 푅퐷푆 = [ [ 2 ] + [(1 + 훼) − ((훼 + 1 − 푎푝) − ) − (푎푝 − 2 √2휋(휎 +2퐷푡) 2퐿 푉2

−1 1 8푁 휖푉 퐴 푝)2]] ……………………………………………………. (14) 푞푄2

Where:

휋 푅 훼 = (√ ) 푝 ……………………….. (14a) 2 2√휎2+2퐷푡

푞푄√휎2+2퐷푡 푉 = ………………………… (14b) 2 √2휋휖

2푁퐴 2휖 푎푝 = √ (푉푏푖 − 푉퐵푆 + 푉푝) ……..…. (14c) 푄 푞푁퐴

5.5 Transconductance (퐠퐦)

It is one of the important parameter which helps in determining the quality of a semiconductor for high power RF applications.

푑퐼퐷푆 푔푚 = …………………………………….. (15) 푑푉퐺푆

To obtain the equation for transconductance, 퐼퐷푆 is differentiated with respect to 푉퐺푆 while having constant 푉퐷푆 and is given by

휇푞푊푄 8푁퐴휖 √2휋휖 푔푚 = [ 2 + 2 ] (푉퐺푆 − 푉푇) …… (16) 4퐿 푞푄 푎푝 (푞푄√휎 +2퐷푡)(훼+1−푎푝)

Where,

휋 푅 훼 = (√ ) 푝 ……………………………….. (16a) 2 2√휎2+2퐷푡

2푁퐴 2휖 푎푝 = √ (푉푝 − 푉퐵푆 + 푉푏푖) ………………. (16b) 푄 푞푁퐴

푉푇 = Threshold voltage

푉푝 = Pinch off voltage

Chapter 6

6.1 Results and discussions

A physics based analytical model for GaN MESFET is developed, taking into consideration different fabrication parameters like Ion range, Ion dose, annealing parameters, ion energy and physical parameters like channel thickness, impurity doping concentration and substrate doping to obtain optimized values for threshold voltage, intrinsic parameters like, Internal gate-drain resistance, Transconductance, gate-drain capacitance and source-drain current.

Figure 26 Gate-Drain Capacitance (퐂퐆퐃) vs. Drain-Source Voltage (퐕퐃퐒)

Figure 26 shows the plot of gate to drain capacitance CGD versus drain-source voltage

푉퐷푆.This plot has been obtained by for substrate doping concentration 푁퐴 of 7 ×

15 −3 −4 −4 10 푐푚 , channel length 퐿푔 of 2 × 10 cm, channel width (W) of 100 × 10 cm

and channel thickness (A) of 1 × 10−4 cm along with different values of ion dose in the range of 9 × 1012 , 3 × 1013 and 7 × 1013 (푐푚−2) with. From Figure 26, we can observe that 퐶퐺퐷 sharply declines for 푉퐷푆 transition from 1V to 3V and also for the range of 3V to 10V there is an exponential decay. After 푉퐷푆 =10 V, we see that drain-to-gate capacitances (퐶퐺퐷) reaches a saturation point. This plot has been generated by using the equation 13.

Figure 27 Transconductance (gm) versus gate-source voltage (Vgs)

Figure 27 shows the plot of transconductance (푔푚) versus gate source voltage (Vgs) for different values of ion doses like 7 × 1012 , 1 × 1013 and 6 × 1013 푐푚−2 with substrate doping concentration of 1 × 1015 푐푚−3 . The implant range parameter (Rp) and straggle parameter (σ) are 2232 × 10−8cm and 456 × 10−8 cm respectively. For the gate-source voltage from -2 to 1.5 V, we observe that the transconductance increases linearly. The threshold voltage was found to be -1.0 V for ion dose Q=7 × 1012 푐푚−2 , -1.5V for ion dose Q= 1 × 1013 푐푚−2 and -1.75 V for ion dose Q= 6 × 1013 푐푚−2.Hence the device is behaving as a depletion device for the given range of ion dose. From these values of

transconductance, we can conclude that GaN is appropriate for use at high frequencies.

This graph has been generated by using the equation 16.

Figure 28 Internal drain-source resistance ( 퐑퐃퐒) vs. Gate length (L) Figure 28 shows the plot of drain-source resistance versus the Gate length for different values of ion dose (Q) taken as 4 × 1013 푐푚−2, 2 × 1013 and 3 × 1013 푐푚−2 with channel doping concentration of 5 × 1017 푐푚−3 , implant range parameter (Rp) and straggle parameter (σ) are 155 × 10−8 and 41 × 10−8 cm respectively. From figure, we can observe that the value of RDS is inversely proportional to the ion dose and attains saturation quickly. The source-drain resistance or the channel resistance reaches to higher values because of high ion dose clearly depicted in the plot. The channel resistance plays an important role and one can enhance the drain current by controlling the channel resistance by adjusting the ion dose. This graph has been generated by using the equation

14.

Chapter 7

7.1 Conclusion

Numerical calculations for the evaluation of intrinsic parameters for a GaN MESFET are carried out by considering a physics based analytical model. The intrinsic parameters include internal drain-source resistance, drain-gate capacitance and transconductance which are studied under various fabrication and physical parameters.

From the results shown in previous chapter, it is clear that GaN holds an outstanding prospective for the device operation at very high frequency and also at high power. GaN material can also be used in extremely high temperature environment. This makes it a prime candidate in the field of communication, military applications and space applications.

Due to all of its inbuilt properties, GaN holds high a promising future in high frequency amplifiers and also considered a probable substitute for travelling wave tube for military and space applications.

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Appendix

Matlab Code:

MatLab code for Gate-Drain capacitance (Cgd) Vs Drain-Source voltage (Vds) at different ion doses close all; clc;

Na=7e15;

Vgs=-4; epsd=5.8; epso=8.854e-14; eps=epsd*epso;

Nd=1e17; sigma=0.0032e-4;

Vbs=5; q=1.6e-19; u=500;

Vbi=3.105;

Vp=1.3;

Rp=0.0125e-4;

Z=1000e-4;

L= 2; t=650;

Do=1.9e10;

D=(Do)*exp(-(1.27*q)/(1.38066e-23*1273)); alpha=(Rp/(2*sigma))*(sqrt(3.14/2));

Vds=[0:1:30];

N= Vbi-Vgs+Vds ;

A3=1-exp(-((Rp/sqrt(2*((sigma*sigma)+(2*D*t))))^2))-

((2*alpha*erf(Rp/sqrt(2*((sigma*sigma)+(2*D*t))))));

A1=(alpha*alpha)+A3;

R=Vbi-Vgs; for i=1:length(Vds)

Q1=9*10^12;

M1=(4*alpha*eps)/(q*Q1*Rp); h1=(q*Q1*Z.*L*1e-4)./2; h2=(M1)./(2.*sqrt((M1.*N)+A1));

h3=sqrt(R)./(2.*(sqrt(N)-sqrt(R)).*(sqrt(N)-sqrt(R))); h4=sqrt(((M1*R)+A1)./N); h5=(M1.*(sqrt(N)-sqrt(R))./sqrt((M1.*N)+A1)); h6=(sqrt((M1.*N)+A1))./sqrt(N); h7=(1/Q1)*(sqrt((2*Na*eps)/q)); h8=sqrt(N/R)-1; h9=(Vds(i))./(2*(sqrt(R*N)));

Cgd=(h1)*(h2+h3.*(h4-h5-h6-h7.*(h8-h9)))+((3.14.*eps.*Z)/2); display (Vds(i)) end plot(Vds,Cgd); ylabel 'Gate-Drain Capacitance(Cgd)'; xlabel 'Drain-Source Voltage(Vds)'; hold on; for i=1:length(Vds)

Q1=3*10^13;

M1=(4*alpha*eps)/(q*Q1*Rp);

h1=(q*Q1*Z.*L*1e-4)./2; h2=(M1)./(2.*sqrt((M1.*N)+A1)); h3=sqrt(R)./(2.*(sqrt(N)-sqrt(R)).*(sqrt(N)-sqrt(R))); h4=sqrt(((M1*R)+A1)./N); h5=(M1.*(sqrt(N)-sqrt(R))./sqrt((M1.*N)+A1)); h6=(sqrt((M1.*N)+A1))./sqrt(N); h7=(1/Q1)*(sqrt((2*Na*eps)/q)); h8=sqrt(N/R)-1; h9=(Vds(i))./(2*(sqrt(R*N)));

Cgd=(h1)*(h2+h3.*(h4-h5-h6-h7.*(h8-h9)))+((3.14.*eps.*Z)/2); end plot(Vds,Cgd,'red'); hold on; for i=1:length(Vds)

Q1=7*10^13;

M1=(4*alpha*eps)/(q*Q1*Rp); h1=(q*Q1*Z.*L*1e-4)./2;

h2=(M1)./(2.*sqrt((M1.*N)+A1)); h3=sqrt(R)./(2.*(sqrt(N)-sqrt(R)).*(sqrt(N)-sqrt(R))); h4=sqrt(((M1*R)+A1)./N); h5=(M1.*(sqrt(N)-sqrt(R))./sqrt((M1.*N)+A1)); h6=(sqrt((M1.*N)+A1))./sqrt(N); h7=(1/Q1)*(sqrt((2*Na*eps)/q)); h8=sqrt(N/R)-1; h9=(Vds(i))./(2*(sqrt(R*N)));

Cgd=(h1)*(h2+h3.*(h4-h5-h6-h7.*(h8-h9)))+((3.14.*eps.*Z)/2); end plot(Vds,Cgd,'black'); hold on;

MatLab code for Transconductance Vs Gate-Source voltage (Vgs) for different Q clc; close all;

Na=1e15; q = 1.602e-19;

t=3600;

Nc=3.25e14*sqrt(T*T*T);

Nv= 4.8e15*sqrt(T*T*T);

Ni= sqrt(Nc*Nv)*exp(-(Eg*q)/(2*K*T));

K=1.3807e-23; u=900;

T=600;

Eg= 3.23;

Z= 100e-4;

E0 = 10.4;

L= 2e-4; pi= 3.145;

Rp=2232e-8;

E= E0*8.854e-14;

Vbs=0;

Phib = 1.27; do= 0.69e-15;

Vt= (K*T)/q;

T2= 273;

T1= 1200+ T2; diff= do* exp(-(Ea*q)/(K*T1)) sigma1= 456e-8;

Ea= 40e-3; l= diff*time y= sqrt(2*diff*time)

Vds= 3;

Vgs= -2:0.5:1.5 x= 0.06e-4; for i=1:1

for j=1:11

Q=7e12;

sigma(i)= sqrt((sigma1(i)*sigma1(i))+(2*diff*time))

R= E*sqrt(2*pi)/(q*Q*sigma(i));

Nd1= Q/(sigma(i)*sqrt(2*pi))

Nd2= exp(-(((x-Rp(i))/(sigma(i)*sqrt(2)))*((x-Rp(i))/(sigma(i)*sqrt(2)))))

Nd= Nd1*Nd2

Delta= Vt * log (Nc/Nd)

Vbi = Vt*log(Na*Nd/(Ni*Ni)) alpha= (Rp(i)*sqrt(pi/2))/(2*sigma(i)*sqrt(2))

V1= (q*Q*Q)/(8*Na*E)

V21= q*Q*sqrt(sigma(i)*sigma(i)+(2*diff*t));

V22= 1/(sqrt(2*pi*E));

V2=V21*V22

Ap1= (2*Na)/Q;

Ap2= sqrt(((2*E*(Vbi-Vbs+Vds))/(q*Na)));

Ap= Ap1*Ap2

B= (q*u*Z*Q)/(4*L)

J1=1/(V1*Ap)

J2= 1/(V2*(alpha+1-Ap))

J=J1+J2;

F= Vgs(j)-VT;

Gm(i,j)= B*J*F;

end end plot(Vgs,Gm/1000,'red') xlabel (' Vgs') ylabel('gm') hold on ; for i=1:1

for j=1:11

Q=6e13;

sigma(i)= sqrt((sigma1(i)*sigma1(i))+(2*diff*time))

R= E*sqrt(2*pi)/(q*Q*sigma(i));

Nd1= Q/(sigma(i)*sqrt(2*pi))

Nd2= exp(-(((x-Rp(i))/(sigma(i)*sqrt(2)))*((x-Rp(i))/(sigma(i)*sqrt(2)))))

Nd= Nd1*Nd2

Delta= Vt * log (Nc/Nd)

Vbi = Vt*log(Na*Nd/(Ni*Ni))

alpha= (Rp(i)*sqrt(pi/2))/(2*sigma(i))

V1= (q*Q*Q)/(8*Na*E)

V21= q*Q*sqrt(sigma(i)*sigma(i)+(2*diff*t));

V22= 1/(sqrt(2*pi*E));

V2=V21*V22

Ap1= (2*Na)/Q;

Ap2= sqrt(((2*E*(Vbi-Vbs+Vds))/(q*Na)));

Ap= Ap1*Ap2

B= (q*u*Z*Q)/(4*L)

J1=1/(V1*Ap)

J2= 1/(V2*(alpha+1-Ap))

J=J1+J2;

F= Vgs(j)-VT;

Gm(i,j)= B*J*F;

end end plot(Vgs,Gm/1000,'blue')

for i=1:1

for j=1:11

Q=1e13;

sigma(i)= sqrt((sigma1(i)*sigma1(i))+(2*diff*time))

R= E*sqrt(2*pi)/(q*Q*sigma(i));

Nd1= Q/(sigma(i)*sqrt(2*pi))

Nd2= exp(-(((x-Rp(i))/(sigma(i)*sqrt(2)))*((x-Rp(i))/(sigma(i)*sqrt(2)))))

Nd= Nd1*Nd2

Delta= Vt * log (Nc/Nd)

Vbi = Vt*log(Na*Nd/(Ni*Ni)) alpha= (Rp(i)*sqrt(pi/2))/(2*sigma(i))

V1= (q*Q*Q)/(8*Na*E)

V21= q*Q*sqrt(sigma(i)*sigma(i)+(2*diff*t));

V22= 1/(sqrt(2*pi*E));

V2=V21*V22

Ap1= (2*Na)/Q;

Ap2= sqrt(((2*E*(Vbi-Vbs+Vds))/(q*Na)));

Ap= Ap1*Ap2

B= (q*u*Z*Q)/(4*L)

J1=1/(V1*Ap)

J2= 1/(V2*(alpha+1-Ap))

J=J1+J2;

F= Vgs(j)-VT;

Gm(i,j)= B*J*F;

end end plot(Vgs,Gm/1000,'black')

MatLab code for internal resistance (Rds) Vs Gate length(L) at different Ion Dose

(Q)

clc; clear all; q=1.6e-19; epsd=5.35; epso=8.854e-14; eps=epsd*epso;

Nd = 5E17;

A = 7.5*10^-6; k = 1.83E-16;

T = 350; q = 1.6E-19;

Vt = k*T/q;

Es = 8.854e-14;

Na = 9e13;

Nc = 4.3e14*T^(3/2);

Nv = 8.9e15*T^(3/2);

Eg = 3.39;

Ni = ((Nc*Nv)^0.5)*(exp(-Eg/(2*Vt)));

Vbi = Vt*log((Na*Nd)/(Ni*Ni));

Vgs = -2; sigma=41-8;

Vbs=0;

Vp = (q*Nd*A^2)/(2*eps);

u=500;

Z=10e-4;

Rp=155e-8;

D=exp(-(Rp)^2/(2*(sigma)^2)); t=600; alpha=(Rp/(2*sigma))*(sqrt(3.14/2)); lenghthL=[1:0.1:5];

for j=1:length(lenghthL)

Q2=(2)*(10^13);

L=lenghthL*1e-3;

ap11=(2*Na)./Q2; ap21=(2*eps)/(q*Na); ap31=(Vbi-Vbs-Vp); ap1=ap11*(sqrt(ap21*ap31));

V1=(q.*(Q2.*Q2))/(8.*Na.*eps);

V2=(q*Q2*sqrt((sigma*sigma)+(2*D*t)))/(eps*sqrt(2*3.14));

X1=(q*u*Z*Q2)./(2.*L);

X2=(1+alpha)-sqrt((ap1.*ap1)-(Vp./V1));

X3=sqrt(((alpha+1-ap1).*(alpha+1-ap1))-(Vp./V2));

X4=(3.14*u)/2;

X5=(2*eps*q*Q2*Vbi)/(sqrt((2*3.14)*((sigma*sigma)+(2*D*t))));

X6=exp(-((Rp)/(sqrt(2*((sigma*sigma)+(2*D*t))))));

X7=(X1.*(X2-X3))+(X4*sqrt(X5*X6));

X8=1./(X7);

Rds=X8;

plot(L,Rds,'red');

xlabel('Gate Length (L)')

ylabel('Internal Drain-Source Resistance(Rds)')

hold on; end

for j=1:length(lenghthL)

Q2=(3)*(10^13);

L=lenghthL*1e-3;

ap11=(2*Na)./Q2;

ap21=(2*eps)/(q*Na); ap31=(Vbi-Vbs-Vp); ap1=ap11*(sqrt(ap21*ap31));

V1=(q.*(Q2.*Q2))/(8.*Na.*eps);

V2=(q*Q2*sqrt((sigma*sigma)+(2*D*t)))/(eps*sqrt(2*3.14));

X1=(q*u*Z*Q2)./(2.*L);

X2=(1+alpha)-sqrt((ap1.*ap1)-(Vp./V1));

X3=sqrt(((alpha+1-ap1).*(alpha+1-ap1))-(Vp./V2));

X4=(3.14*u)/2;

X5=(2*eps*q*Q2*Vbi)/(sqrt((2*3.14)*((sigma*sigma)+(2*D*t))));

X6=exp(-((Rp)/(sqrt(2*((sigma*sigma)+(2*D*t))))));

X7=(X1.*(X2-X3))+(X4*sqrt(X5*X6));

X8=1./(X7);

Rds=X8;

plot(L,Rds,'blue');

hold on;

end

for j=1:length(lenghthL)

Q2=(4)*(10^13);

L=lenghthL*1e-3;

ap11=(2*Na)./Q2; ap21=(2*eps)/(q*Na); ap31=(Vbi-Vbs-Vp); ap1=ap11*(sqrt(ap21*ap31));

V1=(q.*(Q2.*Q2))/(8.*Na.*eps);

V2=(q*Q2*sqrt((sigma*sigma)+(2*D*t)))/(eps*sqrt(2*3.14));

X1=(q*u*Z*Q2)./(2.*L);

X2=(1+alpha)-sqrt((ap1.*ap1)-(Vp./V1));

X3=sqrt(((alpha+1-ap1).*(alpha+1-ap1))-(Vp./V2));

X4=(3.14*u)/2;

X5=(2*eps*q*Q2*Vbi)/(sqrt((2*3.14)*((sigma*sigma)+(2*D*t))));

X6=exp(-((Rp)/(sqrt(2*((sigma*sigma)+(2*D*t))))));

X7=(X1.*(X2-X3))+(X4*sqrt(X5*X6));

X8=1./(X7);

Rds=X8;

plot(L,Rds,'green');

hold on;

end

text(2 * 10^-3, 2.5, 'Q= 4*10e13 ', 'Color', 'red'); text(3 * 10^-3, 1.7, 'Q= 3*10e13 ', 'Color', 'blue'); text(1.5 * 10^-3, 0.5, 'Q= 2*10e13 ', 'Color', 'green');