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System Buses EE2222 Computer Interfacing and Microprocessors
System Buses EE2222 Computer Interfacing and Microprocessors Partially based on Computer Organization and Architecture by William Stallings Computer Electronics by Thomas Blum 2020 EE2222 1 Connecting • All the units must be connected • Different type of connection for different type of unit • CPU • Memory • Input/Output 2020 EE2222 2 CPU Connection • Reads instruction and data • Writes out data (after processing) • Sends control signals to other units • Receives (& acts on) interrupts 2020 EE2222 3 Memory Connection • Receives and sends data • Receives addresses (of locations) • Receives control signals • Read • Write • Timing 2020 EE2222 4 Input/Output Connection(1) • Similar to memory from computer’s viewpoint • Output • Receive data from computer • Send data to peripheral • Input • Receive data from peripheral • Send data to computer 2020 EE2222 5 Input/Output Connection(2) • Receive control signals from computer • Send control signals to peripherals • e.g. spin disk • Receive addresses from computer • e.g. port number to identify peripheral • Send interrupt signals (control) 2020 EE2222 6 What is a Bus? • A communication pathway connecting two or more devices • Usually broadcast (all components see signal) • Often grouped • A number of channels in one bus • e.g. 32 bit data bus is 32 separate single bit channels • Power lines may not be shown 2020 EE2222 7 Bus Interconnection Scheme 2020 EE2222 8 Data bus • Carries data • Remember that there is no difference between “data” and “instruction” at this level • Width is a key determinant of performance • 8, 16, 32, 64 bit 2020 EE2222 9 Address bus • Identify the source or destination of data • e.g. CPU needs to read an instruction (data) from a given location in memory • Bus width determines maximum memory capacity of system • e.g. -
Control Bus System and Application of Building Electric Zhai Long1*, Tan Bin2, Ren Min3 1.Xi’An Changqing Technology Engineering Co., Ltd., Xi'an 710018 ,China 2
ORIGINAL ARTICLE Control Bus System And Application of Building Electric Zhai Long1*, Tan Bin2, Ren Min3 1.Xi’an Changqing Technology Engineering Co., Ltd., Xi'an 710018 ,China 2. Xi'an Changqing Technology Engineering Co., Ltd., Xi'an 710018,China 3.The Fifth Oil Production Plant of Changqing Oilfield Company, Xi'an 710018,China ABSTRACT As the most important part of Building construction, the KEYWORDS electric part 's intelligent control is particularly important. the most Building electric important sign of The intelligent intelligent control is the application of Control Bus System control bus system, only select the appropriate control bus system, and CAN protocol achieve intelligent applications in buildings, elevators, fire, visualization, etc., can meet the household needs. Firstly, the design principle of the electrical control system will be described, and then the CAN - based bus system control principle and application are discussed, only used for reference. 1.Design Principles of Electric Control System Introduction As a primary prerequisite for intelligent building, For construction, the electric bus control technology is a Design of electrical control system should meet the relatively new technology. under the trend of the following principles: development of intelligent building in the future, application (1) It is needed to ensure meeting the needs under of control bus system has become the most important normal production environment . the mainstay of component of intelligent building . In the construction of the electrical system is designed to meet the production machinery and production process requirements. (2) building, the control bus system can not only make The overall design concept should be clear. -
Věstníku ÚNMZ Č. 12/2017
Ročník 2017 Úřadu pro technickou normalizaci, metrologii a státní zkušebnictví ČÍSLO 12 Zveřejněno dne 8. prosince 2017 OBSAH: ČÁST A – OZNÁMENÍ Strana: Oddíl 1. Harmonizované normy a určené normy ÚNMZ č. 115/17 o určených normách 2 ÚNMZ č. 116/17 o určených normách k nařízení vlády č. 120/2016 Sb. 3 Oddíl 2. České technické normy ÚNMZ č. 117/17 o vydání ČSN, jejich změn, oprav a zrušení 60 ÚNMZ č. 118/17 o schválení evropských norem k přímému používání jako ČSN 72 ÚNMZ č. 119/17 o zahájení zpracování návrhů českých technických norem 81 ÚNMZ č. 120/17 o veřejném projednání návrhů evropských norem CEN 110 ÚNMZ č. 121/17 o veřejném projednání návrhů evropských norem CENELEC 115 ÚNMZ č. 122/17 o veřejném projednání návrhů evropských telekomunikačních norem 117 Oddíl 3. Metrologie Oddíl 4. Autorizace Oddíl 5. Akreditace ČIA, č. 12/17 o udělení, pozastavení a zrušení akreditaci 119 Oddíl 6. Ostatní oznámení MO ČR č. 12/17 o vydání seznamu nových standardizačních dohod NATO, vydání doplňků ke standardizačním dohodám, o zrušení standardizačních dohod a přistoupení ke standardizačním dohodám 131 ČÁST B – INFORMACE ÚNMZ č. 12/17 Informačního střediska WTO o notifikacích Členů Dohody o technických překážkách obchodu (TBT), která je nedílnou součástí Dohody o zřízení Světové obchodní organizace (WTO) 138 ČÁST C – SDĚLENÍ ÚNMZ o ukončení platnosti norem 143 ČAS, p.o. ceník zboží a služeb poskytovaných Českou agenturou pro standardizaci, p. o. 144 Věstník č. 12/2017 ČÁST A – OZNÁMENÍ Oddíl 1. Harmonizované normy a určené normy OZNÁMENÍ č. 115/17 Úřadu pro technickou normalizaci, metrologii a státní zkušebnictví o určených normách Úřad pro technickou normalizaci, metrologii a státní zkušebnictví oznamuje podle § 4a odst. -
High Voltage Transient Protection for Automotive
High voltage transient protection for automotive Comparison of three different protection circuits for low power devices Viktor Lindholm Thesis for Master of Science in Engineering Main field of study: Electrical Engineering Credits: 300 Semester/Year: 2019 Supervisor: Kent Bertilsson Examiner: Mattias O´Nils Course code/registration number: EL039A High voltage transient protection Abstract for automotive 2019-06-27 Viktor Lindholm Abstract Electronics for automotive needs to be able to handle different situations that can occur on the power line, such as high voltage transients. ISO- 16750 and ISO-7637 describes different pulses and tests a system needs to be able to handle. This report compares three different protection circuits that can output +5V and +12V built for low power devices. The circuits use different techniques for protection, one that uses TVS diodes, another that uses a voltage regulator IC with built in protection. The last protec- tion uses P-channel MOSFET’s for protection. The circuits are compared against protection, price and leakage current. The most relevant transi- ents to test a system against are decided to be pulse1, pulse 2a and load dump. A pulse generator consisting of a pulse shaping network and a common drain amplifier is used to create the test pulses. The result shows that all the circuits could protect against pulse 2a and load dump. How- ever, all the circuits did fail against pulse 1 due to an undersized diode for negative voltage protection. The leakage current did not exceed 4µA for two of the circuits in the temperature interval of -40°C to +100°C. -
PDP-11 Bus Handbook (1979)
The material in this document is for informational purposes only and is subject to change without notice. Digital Equipment Corpo ration assumes no liability or responsibility for any errors which appear in, this document or for any use made as a result thereof. By publication of this document, no licenses or other rights are granted by Digital Equipment Corporation by implication, estoppel or otherwise, under any patent, trademark or copyright. Copyright © 1979, Digital Equipment Corporation The following are trademarks of Digital Equipment Corporation: DIGITAL PDP UNIBUS DEC DECUS MASSBUS DECtape DDT FLIP CHIP DECdataway ii CONTENTS PART 1, UNIBUS SPECIFICATION INTRODUCTION ...................................... 1 Scope ............................................. 1 Content ............................................ 1 UNIBUS DESCRIPTION ................................................................ 1 Architecture ........................................ 2 Unibus Transmission Medium ........................ 2 Bus Terminator ..................................... 2 Bus Segment ....................................... 3 Bus Repeater ....................................... 3 Bus Master ........................................ 3 Bus Slave .......................................... 3 Bus Arbitrator ...................................... 3 Bus Request ....................................... 3 Bus Grant ......................................... 3 Processor .......................................... 4 Interrupt Fielding Processor ......................... -
SAE J1850 PWM Y VPW
AGRADECIMIENTOS En primer lugar, quiero dar las gracias a todos aquellos que han hecho posible que hoy en día esté estudiando esta carrera, mi familia. Sin ellos no hubiera llegado tan lejos en la vida y no sería la persona que hoy soy. Pero especialmente quiero agradecer a mi hermana el que me haya dado todo su apoyo en todo momento. En segundo lugar, también agradecer a mis amigos y amigas, compañeros y compañeras del Grado en Ingeniería de Tecnologías de Telecomunicación (GITT), que me han acompañado en todo momento. Además, agradecer a todos los profesores que me han impartido clase a lo largo de estos años por todos los conocimientos que me han enseñado. Y especialmente, quiero dar las gracias a mis directores César Sánchez Meléndez y Raúl Alcaraz Martínez por su gran ayuda, dedicación y por darme la oportunidad de tenerles en este gran proyecto. INDICE RESUMEN .............................................................................................................................................. 1 ABSTRACT .............................................................................................................................................. 3 PARTE I: MEMORIA ................................................................................................................................ 5 INTRODUCCIÓN ..................................................................................................................................... 6 MOTIVACIONES ........................................................................................................................................... -
CAN Outdoor Family Robust
Series 09 CAN Outdoor Family Robust. Durable. Reliable. www.eao.com Series 09 CAN Outdoor Keypad Family CAN Modules – Robust. Durable. Reliable. Designed for E1 applications with functional safety and Advantages. CAN bus integration – The robust control units with flexible Individual 4-segment and RGB halo ring illumination Designed for functional safety: ISO 26262 and ISO 13849 illumination are ideally suited for use in heavy duty and Intelligent HMIs with CAN bus integration Robust, innovative, ergonomic design sealed up to IP67 protection special vehicles applications. Interchangeable ISO 7000 range of symbols or customised symbols Series 09 CAN Outdoor Keypad Family offers high reliability: and robust clip-in or screw-in mounting allows easy, flexible Typical applications Ambient conditions The modules are designed for E1 applications and functional installation, either vertically or horizontally. These high- Special vehicles Operating temperature: – 40 °C … + 85 °C safety in accordance with ISO 26262 ASIL B and EN ISO quality devices also offer excellent tactile feedback, and including fire-fighting vehicles, road Storage temperature: – 40 °C … + 85 °C 13849 PLD as well as an intelligent control with CAN bus are clearly visible in daylight and at night thanks to the sweepers, cleaning vehicles, refuse integration. The robust, modular design with sealing levels powerful RGB LED halo and LED symbol illumination. trucks, snow removers and groomers Protection degree of up to IP67 and the ability to customise and interchange Attractive and configurable 4-segment halo button illumina- Heavy duty vehicles IP67 protection (front and rear side) the keypad legends make these high-quality devices ideally tion is integrated as standard. -
PCI/104-Express & Pcie/104 Specification
PCI/104-Express™ & PCIe/104™ Specification Including OneBank™ and Adoption on 104™, EPIC™, and EBX™ Form Factors Version 3.0 February 17, 2015 Please Note: This specification is subject to change without notice. While every effort has been made to ensure the accuracy of the material contained within this document, the PC/104 Consortium shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this specification. If errors are found, please notify the PC/104 Consortium. The PC/104 logo, PC/104, PC/104-Plus, PCI-104, PCIe/104, PCI/104-Express, 104, OneBank, EPIC and EBX are trademarks of the PC/104 Consortium. All other marks are the property of their respective companies. Copyright 2007 - 2015, PC/104 Consortium IMPORTANT INFORMATION AND DISCLAIMERS The PC/104 Consortium (“Consortium”) makes no warranties with regard to this PCI/104-Express and PCIe/104 Specifications (“Specifications”) and, in particular, neither warrant nor represent that these Specifications or any products made in conformance with them will work in the intended manner. Nor does the Consortium assume responsibility for any errors that the Specifications may contain or have any liabilities or obligations for damages including, but not limited to, special, incidental, indirect, punitive, or consequential damages whether arising from or in connection with the use of these Specifications in any way. This specification is subject to change without notice. While every effort has been made to ensure the accuracy of the material contained within this document, the publishers shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this specification. -
The System Bus
ELEC 379 : DESIGN OF DIGITAL AND MICROCOMPUTER SYSTEMS 1998/99 WINTER SESSION, TERM 1 The System Bus This lecture describes system buses. These are buses used to interface the CPU with memory and peripherals on separate PC cards. The ISA and PCI buses are used as examples. Introduction characteristics. We will look briefly at two examples of system To increase their flexibility, most general-purpose buses. The ISA (Industrial Standard Architecture) microcomputers include a system bus that allows bus is commonly used in IBM-PC compatibles and printed circuit boards (PCBs) containing memory or is one of the most widely-used system busses. The I/O devices to be connected to the CPU. This allows PCI (Peripheral Component Interconnect) bus is a microcomputer systems to be customized for differ- flexible high-performance peripheral bus that can ef- ent applications. The use of a standard bus also al- ficiently interconnect peripherals and processors of lows manufacturers to produce peripherals that will widely different speeds. work properly with other manufacturers’ computer systems. The system bus consists of a number of parallel Mechanical Characteristics conductors on a backplane or motherboard. There are a number of connectors or “slots” into which Low-cost consumer-grade buses use card-edge con- other PCBs containing memory and I/O devices can nectors to minimize the cost of the peripheral. The be plugged in. plug-in card has contact pads along the edges of the PCB. The motherboard has connectors on the moth- In most cases the system bus is very similar to the erboard that contact these pads. -
Final Program Pdf Version
2021 JOINT IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SIGNAL & POWER INTEGRITY, AND EMC EUROPE ENTER THE VIRTUAL PLATFORM AT: www.engagez.net/emc-sipi2021 CHAIRMAN’S MESSAGE TABLE OF CONTENTS A LETTER FROM 2021 GENERAL CHAIR, Chairman’s Message 2 ALISTAIR DUFFY & BRUCE ARCHAMBEAULT Message from the co-chairs Thank You to Our Sponsors 4 Twelve months ago, I think we all genuinely believed that we would have met up this year in either or Week 1 Schedule At A Glance 6 both of Raleigh and Glasgow. It was virtually inconceivable that we would be in the position of needing to move our two conferences this year to a virtual platform. For those who attended the virtual EMC Clayton R Paul Global University 7 Europe last year, who would have thought that they would not be heading to Glasgow with its rich history and culture? However, as the phrase goes, “we are where we are”. Week 2 Schedule At A Glance: 2-6 Aug 8 A “thank you” is needed to all the authors and presenters because rather than the Joint IEEE Technical Program 12 BRINGING International Symposium on EMC + SIPI and EMC Europe being a “poor relative” of the event that COMPATIBILITY had been planned, people have really risen to the challenge and delivered a program that is a Week 3 Schedule At A Glance: 9-13 Aug 58 TO ENGINEERING virtual landmark! Usually, a Chairman’s message might tell you what is in the program but we will Keynote Speaker Presentation 60 INNOVATIONS just ask you to browse through the flipbook final program and see for yourselves. -
AMD Processor Performance Evaluation Guide
AMD Processor Performance Evaluation Guide Mark W. Welker ADVANCED MICRO DEVICES One AMD Place Sunnyvale, CA 94088 Publication # 30579 Revision: 3.71 Issue Date: June 2005 © 2003 - 2005 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. (“AMD”) products. AMD makes no repre- sentations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or oth- erwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD’s product could create a situation where personal injury, death, or severe property or environ- mental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD Arrow logo, AMD Athlon, and combinations thereof, Cool’n’Quiet and 3DNow!, are trademarks of Advanced Micro Devices, Inc. -
The Computer Control System for the CESR B Factory C. R. Strohman, D
The Computer Control System for the CESR B Factory C. R. Strohman, D. H. Rice and S. B. Peck Laboratory of Nuclear Studies Cornell University Ithaca, New York 14853' Abstract the strengths and weaknesses of our system and the different needs of the new system. Part of this process was defining the B factories present unique requirements for controls and scope of the control system, instrumentation systems. High reliability is critical to achiev ing the integrated luminosity goals. The CESR-B upgrade at A. Boundaries of the Control System Cornell University will have a control system based on the architecture of the successful CESR control system, which uses For a large design project, well defined boundaries are a centralized database/message routing system in a multi- essential. At the boundaries, the needs of other people must be ported memory, and VAXstations for all high-level control taken into consideration, and the design process requires functions. The implementation of this architecture will address communication between the designers and the users of the the deficiencies in the current implementation while providing control system. Within the boundaries, the control system the required performance and reliability. designers can do whatever is needed. We have defined the scope of the control system by defining interfaces for applica- I. INTRODUCTION tion programmers, instrumentation designers, and operators. Application programmers must be provided a complete, CESR-B is an upgrade to the existing CESR facility.1 well documented, set of functions which meet their needs. The major part of the upgrade is the addition of a second Programmers are not allowed to bypass these functions by storage ring in the existing tunnel.