D-Band Frequency Tripler Module Using Anti-Parallel Diode Pair and Waveguide Transitions

electronics

Article D-Band Frequency Tripler Module Using Anti-Parallel Diode Pair and Waveguide Transitions

Jihoon Doo, Jongyoun Kim and Jinho Jeong * Department of Electronic Engineering, Sogang University, Seoul 04107, Korea; [email protected] (J.D.); [email protected] (J.K.) * Correspondence: [email protected]; Tel.: +82-2-705-8934

Received: 1 July 2020; Accepted: 24 July 2020; Published: 27 July 2020

Abstract: In this paper, D-band (110–170 GHz) frequency tripler module is presented using anti-parallel GaAs Schottky diode pair and waveguide-to-microstrip transitions. The anti-parallel diode pair is used as a nonlinear device generating harmonic components for Q-band input signal (33–50 GHz). The diode is zero-biased to eliminate the bias circuits and thus minimize the number of circuit components for low-cost hybrid fabrication. The anti-parallel connection of two identical diodes effectively suppresses DC and even harmonics in the output. Furthermore, the first and second harmonics of Q-band input signal are cut off by D-band rectangular waveguide. Input and output impedance matching networks are designed based on the optimum impedances determined by harmonic source- and load-pull simulations using the developed nonlinear diode model. Waveguide-to-microstrip transitions at Q- and D-bands are also designed using E-plane probe to package the frequency tripler in the waveguide module. The compensation circuit is added to reduce the impedance mismatches by bond-wires connecting two separate substrates. The fabricated frequency tripler module produces a maximum output power of 5.4 dBm at 123 GHz under input power of 20.5 dBm. A 3 dB bandwidth is as wide as 22.5% from 118.5 to 148.5 GHz at the input power of 15.0 dBm. This result corresponds to the excellent bandwidth performance with a conversion gain comparable to the previously reported frequency tripler operating at D-band.

Keywords: diode; frequency multiplier; millimeter-wave; transition; tripler; waveguide

1. Introduction Millimeter-wave frequency band ranging from 30 to 300 GHz ﬁnds a lot of commercial and military applications such as high-speed wireless communications and high-resolution radar sensors, since it allows for wide bandwidth and small wavelength (10–1 mm). It is essential to develop the semiconductor-based devices or circuits generating high purity and high power signals for millimeter-wave communication and radar applications. Fundamental oscillators operating at millimeter-wave above 100 GHz have been introduced in the form of integrated circuits (ICs) using silicon CMOS or compound semiconductor technologies [1–3]. However, the fundamental oscillator ICs exhibit very limited output power and phase noise performance at millimeter-wave frequencies. This is caused by the transistors of which output powers are inversely proportional to the frequency. Another approach to generating millimeter-wave signals is to design frequency multipliers which extract the wanted harmonic frequency component generated by the non-linear devices for high-purity and low-frequency input signal, while rejecting the other unwanted harmonic frequency components [4]. Frequency multipliers can be designed using nonlinear semiconductor devices such as diodes or transistors. In millimeter-wave frequency above 100 GHz, GaAs Schottky diodes are commonly used for frequency multipliers, since they exhibit very high cut-oﬀ frequency and high output powers. It has another advantage in that it can be fabricated in the form of low-cost hybrid circuits [5]. In the

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It has another advantage in that it can be fabricated in the form of low‐cost hybrid circuits [5]. In the Electronics 2020, 9, 1201 2 of 11 frequency multipliers, it is important to filter out the spurious signals generated by the nonlinear devices, while amplifying the wanted harmonic component. In the diode‐based frequency multipliers, thefrequency unwanted multipliers, harmonic it spurious is important can be to filtereffectively out the suppressed spurious signalsusing the generated special connection by the nonlinear of the diodes.devices, The while balanced amplifying type the multipliers wanted harmonic cancel out component. odd‐order In harmonic the diode-based frequency frequency components multipliers, at the outputthe unwanted by applying harmonic input spurious signals with can 180° be eff outectively of phase suppressed to the diodes using [6–9]. the special On the connection contrast, DC of and the evendiodes.‐order The harmonic balanced components type multipliers are cancelled cancel out out odd-order at the output harmonic of anti frequency‐parallel diode components pair which at the is thusoutput widely by applying applied inputfor the signals design with of millimeter 180◦ out of‐wave phase frequency to the diodes triplers [6– [10,11].9]. On theIn order contrast, to reject DC and the fundamentaleven-order harmonic component, components waveguide are cancelledor microstrip out at filters the output can be of placed anti-parallel at the diode input pair of the which anti is‐ parallelthus widely diode applied pair [12–14]. for the designPower ofcombiners millimeter-wave in the waveguide frequency triplersare often [10 employed,11]. In order to increase to reject the outputfundamental power component, at 3rd harmonic waveguide component or microstrip [15,16]. filters can be placed at the input of the anti-parallel diodeIn pair this [ 12work,–14]. we Power design combiners a D‐band in (110–170 the waveguide GHz) frequency are often tripler employed using to anti increase‐parallel the outputpair of powercommercial at 3rd GaAs harmonic Schottky component diodes. [15 We,16 ].develop the nonlinear diode model using the datasheet providedIn this by work, the wevendor design and a D-band electromagnetic (110–170 GHz)simulations. frequency Harmonic tripler using source anti-parallel‐ and load pair‐pull of simulationscommercial are GaAs performed Schottky using diodes. the develop We develop nonlinear the diode nonlinear model diode to find model the optimum using the impedances datasheet providedfor high conversion by the vendor gain. and Input electromagnetic and output matching simulations. circuits Harmonic are then source- designed and load-pull to produce simulations high 3rd harmonicare performed power using while the rejecting develop the nonlinear spurious diode signals. model The to frequency find the optimum tripler is impedances mounted inside for high the waveguideconversion gain.by designing Input and the output waveguide matching‐to‐microstrip circuits are transitions then designed at the to Q‐ produceand D‐band high using 3rd harmonic E‐plane powerprobes. while The compensation rejecting the spuriouscircuit is also signals. designed The frequency to minimize tripler impedance is mounted mismatches inside the caused waveguide by the bondby designing‐wires connecting the waveguide-to-microstrip the circuits in two separate transitions substrates at the with Q- and different D-band width using for E-plane Q‐ and D probes.‐band Thetransitions. compensation In Section circuit 2, the is also design designed of a D‐ toband minimize frequency impedance tripler mismatchesmodule is presented caused by including the bond-wires diode model,connecting impedance the circuits matching in two separate of frequency substrates tripler, with di ffwaveguideerent width fortransitions, Q- and D-band and transitions.bond‐wire compensationIn Section2, the circuit. design Measurement of a D-band frequencyresults are tripler given modulein Section is presented 3, together including with the diode performance model, comparisonimpedance matching with other of works. frequency tripler, waveguide transitions, and bond-wire compensation circuit. Measurement results are given in Section3, together with the performance comparison with other works. 2. Design of D‐Band Frequency Tripler Module 2. Design of D-Band Frequency Tripler Module 2.1. GaAs Schottky Diode 2.1. GaAs Schottky Diode We select GaAs Schottky diode (5VA30–13 by ACST) for the design of D‐band frequency tripler in whichWe select three GaAs anodes Schottky are connected diode (5VA30–13 in series by as ACST) illustrated for the in design Figure of 1 D-band [17]. Figure frequency 2a shows tripler the in which three anodes are connected in series as illustrated in Figure1[ 17]. Figure2a shows the equivalent equivalent circuit model of a single anode consisting of current source iD, junction capacitance Cj, circuit model of a single anode consisting of current source iD, junction capacitance Cj, junction leakage junction leakage conductance Gleak, and series resistance RS. The iD and Cj are dependent on diode conductance Gleak, and series resistance RS. The iD and Cj are dependent on diode voltage vD as given voltage vD as given in (1) and (2), where IS and n are a saturation current and ideality factor, in (1) and (2), where IS and n are a saturation current and ideality factor, respectively [6]. In (2), Cj0 and respectively [6]. In (2), Cj0 and Vj represent zero‐bias junction capacitance and built‐in voltage, V represent zero-bias junction capacitance and built-in voltage, respectively. The parameters of the respectively.j The parameters of the equivalent circuit are extracted using the datasheet and equivalent circuit are extracted using the datasheet and measurement data provided by the vendor. measurement data provided by the vendor.

Figure 1. GaAsGaAs Schottky diode (three (three-anodes‐anodes in series).

vD vD nVT iD = IS (enVT 1) (1)(1) iD = IS (e ‐ −1) r vD Cj = Cj0/ 1vD (2) Cj = Cj0/1‐− V j (2) Vj Figure2b shows the equivalent circuit of the three-anode diode including the parasitic series inductance LS and parallel capacitance Cp in each anode. The pad capacitance on both ends is Electronics 2020, 9, x FOR PEER REVIEW 3 of 11 Electronics 2020, 9, 1201 3 of 11 Figure 2b shows the equivalent circuit of the three‐anode diode including the parasitic series inductance LS and parallel capacitance Cp in each anode. The pad capacitance on both ends is represented by Cg [18]. These parasitic elements are extracted from the electromagnetic simulations represented by Cg [18]. These parasitic elements are extracted from the electromagnetic simulations andand combined combined with with the the developed developed single single diode diode model model to to complete complete three three-anode‐anode diode diode model shown in in FigureFigure2 2b.b. TableTable1 1 shows shows the the extracted extracted parametersparameters of the three three-anode‐anode diode diode which which are are used used for for the the designdesign of offrequency frequency tripler. tripler.

Anode

Anode RS

vD Cj iD Gleak

‐ Cathode

Cathode (a) (b)

FigureFigure 2. Equivalent 2. Equivalent circuit circuit model model of diode. of diode. (a) (Singlea) Single anode anode and and (b) ( bthree) three anodes anodes in series. in series.

TableTable 1. Equivalent 1. Equivalent circuit circuit parameters parameters of ofthree three-anode‐anode diode. diode.

IS [A] RS [Ω] Gleak [µS] n Cj0 [fF] Vj [V] Cg [fF] Cp [fF] Ls [pH] IS [A] RS [Ω] Gleak [μS] n Cj0 [fF] Vj [V] Cg [fF] Cp [fF] Ls [pH] 17 6.66 10 −17 5.9 0.0008 1.1 30 0.964 5.5 2.5 17 6.66× × −10 5.9 0.0008 1.1 30 0.964 5.5 2.5 17

2.2.2.2. Frequency Frequency Tripler Tripler Using Using Anti Anti-Parallel‐Parallel Diode Diode Pair Pair AntiAnti-parallel‐parallel diode diode pair pair shown shown in inFigure Figure 3 is3 isa good a good choice choice for for the the design design of ofodd odd-order‐order frequency frequency multipliers,multipliers, since since it allows it allows in‐ in-phasephase combining combining of ofodd odd-order‐order harmonic harmonic components components of ofinput input signal signal andand strongly strongly suppresses suppresses the the even even-order‐order harmonic harmonic components. components. The The diodes diodes can can be bereverse reverse-biased‐biased for for varactorvaractor-type‐type frequency frequency multipliers multipliers for for high high conversion conversion gain gain [19]. [19 In]. Inorder order to toapply apply the the reverse reverse bias bias to tothe the diodes, diodes, the the bias bias circuit circuit should should be be designed, designed, consisting consisting of ofthe the backside backside vias vias (or (or wire wire-bonding)‐bonding) forfor DC DC ground ground and and capacitors capacitors for for RF RF short. short. It can It can be beeasily easily designed designed and and fabricated fabricated in inICs ICs where where the the SchottkySchottky diodes diodes and and passive passive components components are are monolithically monolithically implemented implemented on on the the GaAs GaAs substrate substrate [15]. [15 ]. However,However, in inthe the hybrid hybrid circuits, circuits, these these additional additional off o‐chipff-chip circuit circuit components components introduce introduce large large parasitic parasitic effectseffects at at millimeter millimeter-wave‐wave frequencies, frequencies, which which can seriouslyseriously degrade degrade the the performance. performance. In In addition, addition, they theycan can make make overall overall circuit circuit large large and and complicated, complicated, leading leading to high to high fabrication fabrication cost. cost. Therefore, Therefore, in order in orderto alleviate to alleviate these these problems, problems, we we adopt adopt the the unbiased unbiased anti-parallel anti‐parallel diode diode pair pair for for the the design design of D-bandof D‐ bandfrequency frequency tripler tripler in the in the hybrid hybrid circuit circuit form form as shown as shown in Figure in Figure3. 3. In Inorder order to design to design the theinput input and andoutput output matching matching network network of the of anti the‐parallel anti-parallel diode diodepair, the pair, developedthe developed nonlinear nonlinear diode diode model model is used is used to determine to determine the theoptimum optimum impedance impedance at each at each harmonic harmonic frequency.frequency. For For this this purpose, purpose, we we perform perform harmonic harmonic source source-‐ and and load load-pull‐pull simulations simulations as asshown shown in in FigureFigure 3 3[20].[ 20 From]. From this this simulation, simulation, we we can can find find the the optimum optimum impedances impedances presenting presenting the the maximum maximum output power (P ) at 3rd harmonic frequency. Firstly, the load-pull simulation is performed to find output power (Pout3out) at3 3rd harmonic frequency. Firstly, the load‐pull simulation is performed to find load impedances Z and Z at fundamental (f ) and 3rd harmonic (3f ) frequencies, respectively, load impedances ZL1 andL1 ZL3 atL3 fundamental (f0) and0 3rd harmonic (3f0) frequencies,0 respectively, providing the highest P . In this simulation, it is found that the impedances at 2f and 4f show providing the highest Pout3out. In3 this simulation, it is found that the impedances at 2f0 and0 4f0 show0 almostalmost no no effect effect on onthe the performance performance thanks thanks to the to anti the‐ anti-parallelparallel connection connection of the of diodes. the diodes. Next, the Next, the source-pull simulation is performed to find source impedances Z and Z , with Z and Z source‐pull simulation is performed to find source impedances ZS1 and ZSS13, with ZS3L1 and ZL3L fixed1 to L3 thefixed values to thedetermined values determined by the load by‐pull the simulation. load-pull simulation. This process This is iterated process several is iterated times several until timesthe sourceuntil and the sourceload impedances and load impedances converge to converge optimum to values. optimum Figure values. 4 shows Figure the4 source shows‐ and the source-load–pull and load–pull contours at input power of 19.0 dBm at f = 45 GHz. The highest P of 6.6 dBm is obtained contours at input power of 19.0 dBm at f0 = 45 GHz. The0 highest Pout3 of 6.6 dBmout is3 obtained at 3f0 = 135 GHzat 3 forf 0 =the135 optimum GHz for source the optimum and load source impedances and load specified impedances in Table specified 2. in Table2.

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Figure 3. Source‐ and load‐pull simulations of anti‐parallel diode pair. Figure 3. SourceSource-‐ and and load load-pull‐pull simulations of anti anti-parallel‐parallel diode pair.

6.6 dBm 6.6 dBm 4.6 dBm 4.6 dBm

2.6 dBm 2.6 dBm 0.6 dBm 0.6 dBm ‐2.6 dBm ‐2.6 dBm ‐2.6 dBm 0.6 dBm ‐2.6 dBm 0.6 dBm 2.6 dBm 2.6 dBm 6.6 dBm 4.6 dBm 6.6 dBm 4.6 dBm

(a) (b) (a) (b)

Figure 4.4. ContoursContours for for 3rd 3rd harmonic harmonic power power with with step step of 2of dB 2 fordB inputfor input power power of 19.0 of dBm 19.0 atdBmf 0 = at45 f0 GHz. = 45 Figure 4. Contours for 3rd harmonic power with step of 2 dB for input power of 19.0 dBm at f0 = 45 (GHz.a) Source-pull (a) Source contours‐pull contours at f 0.( atb) f Load-pull0. (b) Load contours‐pull contours at 3f 0 .at 3f0. GHz. (a) Source‐pull contours at f0. (b) Load‐pull contours at 3f0. Table 2.2. Optimum impedances determined byby source-source‐ andand load-pullload‐pull simulation.simulation. Table 2. Optimum impedances determined by source‐ and load‐pull simulation. FrequencyFrequency Source Source Load Load Frequency Source Load 45 GHz(f 0) ZS1 = 26.9 + j35.8 Ω ZL1 = 0.3 j12.8 Ω 45 GHz(f0) ZS1 = 26.9 + j35.8 Ω ZL1 = 0.3 − − j12.8 Ω 13545 GHz( GHz(3ff) ) ZZS1 == 461.126.9 ++ j35.8j220.1 Ω Ω ZZL1 = 0.319.4 − j12.8j41.7 Ω Ω 00 S3 L3 − 135 GHz(3f0) ZS3 = 461.1 + j220.1 Ω ZL3 = 19.4 − j41.7 Ω 135 GHz(3f0) ZS3 = 461.1 + j220.1 Ω ZL3 = 19.4 − j41.7 Ω Based on the source- and load-pull simulation results, input and output matching circuits are Based on the source‐ and load‐pull simulation results, input and output matching circuits are designedBased in on a 5 the mil-thick source substrate‐ and load with‐pull dielectric simulation constant results, of 2.2 input (RT Duroid and output 5880 bymatching Rogers) circuits as depicted are designed in a 5 mil‐thick substrate with dielectric constant of 2.2 (RT Duroid 5880 by Rogers) as designedin Figure5 in. In a the5 mil input‐thick matching substrate network, with dielectric three quarter-wave constant of long 2.2 lines(RT Duroid at 3 f 0 (open 5880 stubsby Rogers) TL2 and as depicted in Figure 5. In the input matching network, three quarter‐wave long lines at 3f0 (open stubs TL3depicted and series in Figure line 5. TL4) In the are input employed matching to present network, high three source quarter impedance‐waveZ longS3 to lines the anti-parallel at 3f0 (open diodestubs TL2 and TL3 and series line TL4) are employed to present high source impedance ZS3 to the anti‐ pair.TL2 and Then, TL3 high-impedance and series line line TL4) TL1 are is usedemployed to provide to present the optimum high source source impedance impedance ZZS3 toat thef given anti‐ parallel diode pair. Then, high‐impedance line TL1 is used to provide the optimum sourceS1 impedance0 parallelin Table 2diode. Two pair. open Then, stubs high TL2‐impedance and TL3 also line do TL1 the is function used to of provide impedance the optimum matching source at f 0, impedance presenting ZS1 at f0 given in Table 2. Two open stubs TL2 and TL3 also do the function of impedance matching ZcapacitiveS1 at f0 given impedance. in Table Output2. Two open matching stubs circuit TL2 and is designed TL3 also to do provide the function slightly of capacitiveimpedance impedance matching at f0, presenting capacitive impedance. Output matching circuit is designed to provide slightly at ff0, andpresentingZL3 at 3 fcapacitive0 given in Tableimpedance.2. For thisOutput purpose, matching coupled circuit line is ﬁlter designed is designed to provide at 3 f 0 toslightly reject capacitive impedance at f0 and ZL3 at 3f0 given in Table 2. For this purpose, coupled line filter is capacitivethe fundamental impedance components at f0 and and ZL provide3 at 3f0 given the capacitive in Table impedance 2. For this at purpose,f 0 together coupled with transmissionline filter is designed at 3f0 to reject the fundamental components and provide the capacitive impedance at f0 designedlines (TL5 at and 3f0 TL6).to reject The the low fundamental and high impedance components lines, and TL5 provide and TL6, the capacitive respectively, impedance are designed at f0 together with transmission lines (TL5 and TL6). The low and high impedance lines, TL5 and TL6, togetherto present with the optimumtransmission impedance lines (TL5 at 3andf 0 as TL6). well. The The low source and impedancehigh impedance at f 0 and lines, load TL5 impedance and TL6, respectively, are designed to present the optimum impedance at 3f0 as well. The source impedance at 3respectively,f 0 of the designed are designed matching to present network the are optimum represented impedance by the at red 3f0 dots as well. in the The sourcesource andimpedance load-pull at f0 and load impedance 3f0 of the designed matching network are represented by the red dots in the fcontours0 and load in impedance Figure4, showing 3f0 of the that designed they are matching close to optimum network valuesare represented determined by bythe the red source- dots in and the source‐ and load‐pull contours in Figure 4, showing that they are close to optimum values determined sourceload-pull‐ and simulations. load‐pull contours in Figure 4, showing that they are close to optimum values determined by the source‐ and load‐pull simulations. by the source‐ and load‐pull simulations.

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Figure 5. Schematic of designed frequency tripler. FigureFigure 5.5. Schematic of designed frequency tripler.tripler. Figure 6 shows the simulated performance of the designed D‐band frequency tripler. Output powersFigureFigure at each6 6shows shows harmonic the the simulated frequencysimulated performance areperformance plotted of thein ofFigure designed the designed 6a at D-band input D frequency‐ bandpower frequency of tripler.19.0 dBm. Outputtripler. Maximum powersOutput Patpowersout each3 is 5.6 harmonic at dBm each at harmonic 138.9 frequency GHz, frequency are corresponding plotted are in plotted Figure to conversion in6a Figure at input 6again powerat inputof −13.4 of power 19.0 dB. dBm. A of 3 19.0 dB Maximum bandwidthdBm. MaximumPout is3 asis 5.6 dBm at 138.9 GHz, corresponding to conversion gain of 13.4 dB. A 3 dB bandwidth is as wide as widePout3 isas 5.6 22.9% dBm (119.1–150.0at 138.9 GHz, GHz). corresponding The fundamental to conversion power− gain is suppressedof −13.4 dB. byA 3more dB bandwidth than 13.7 isdB as compared22.9%wide (119.1–150.0as 22.9% to Pout3 (119.1–150.0 within GHz). the The 3 fundamental‐GHz).dB bandwidth. The fundamental power Note is suppressedthat powerit will be byis further moresuppressed than rejected 13.7 by dB bymore compared the thancut‐off 13.7 to ofP out3DdB‐ bandwithincompared waveguide, the 3-dB to Pout3 bandwidth. withinwhen the Note 3frequency‐dB that bandwidth. it will tripler be further Note is mounted that rejected it will byin be thethe further cut-off waveguide. ofrejected D-band Theby waveguide, the 5th cut harmonic‐off when of D ‐ componenttheband frequency waveguide, is triplersuppressed when is mounted bythe 26.8 frequency in dB the within waveguide. tripler the 3 ‐ TheisdB mounted bandwidth. 5th harmonic in theThe component waveguide.2nd and is 4th suppressed Theharmonic 5th byharmonic powers 26.8 dB within the 3-dB bandwidth. The 2nd and 4th harmonic powers are less than 99 dBm in the simulation, arecomponent less than −is99 suppressed dBm in the by simulation, 26.8 dB within so that the they 3‐dB are bandwidth. not included The in 2nd the− and figure. 4th harmonicFigure 6b powersshows Psoareout that3 andless they conversionthan are −99 not dBm included gain in dependingthe in simulation, the figure. on input Figure so that power6b they shows at are f0 P =notout 453 includedGHz.and conversion The in conversion the gainfigure. depending gain Figure is saturated 6b on shows input power at f = 45 GHz. The conversion gain is saturated at 13.6 dB at input power of 22.0 dBm. atP −out13.63 and dB conversion0 at input power gain depending of 22.0 dBm. on input power at f0− = 45 GHz. The conversion gain is saturated at −13.6 dB at input power of 22.0 dBm. 10 10 0 10 10 0 0 5 ‐5 (dB) 3f0 (dBm)

(dBm) 0 5 ‐5 (dB) 3f0 0 ‐10

‐10 gain

(dBm)

f0 0 ‐10

‐10 gain Power

Power

‐20 ‐5 ‐15 f0 Power Power

‐20 ‐5 ‐15 ‐30 5f0 ‐10 Output power ‐20 Output Output ‐30 5f0 ConversionOutput power gain Conversion ‐40 ‐10 ‐20 Output Output‐15 ‐25 Conversion gain Conversion 30 35 40 45 50 55 ‐40 ‐1510 12 14 16 18 20 22 ‐25 Input frequency (GHz) 30 35 40 45 50 55 10 12Input 14 power 16 (dBm) 18 20 22 Input frequency (GHz) Input power (dBm) (a) (b) (a) (b) FigureFigure 6. 6. SimulatedSimulated performance performance of of designed designed frequency frequency tripler. tripler. ( (aa)) Output Output power power versus versus frequency frequency withwithFigure input input 6. Simulated power power of of 19.0performance 19.0 dBm. dBm. ( (bb) ) ofOutput Output designed power power frequency and and conversion conversion tripler. ( again gain) Output versus versus power input input versus power power frequency at at input input frequencyfrequencywith input of of power 45 45 GHz. GHz. of 19.0 dBm. (b) Output power and conversion gain versus input power at input frequency of 45 GHz. 2.3.2.3. Waveguide Waveguide Transitions Transitions Using Using E E-Plane‐Plane Probe Probe 2.3. Waveguide Transitions Using E‐Plane Probe TheThe designed designed frequency frequency tripler tripler is is mounted mounted on on the the metal metal block block with with waveguide waveguide input input and and output. output. Therefore,Therefore,The designed waveguide waveguide-to-microstrip frequency‐to‐microstrip tripler transitions transitionsis mounted are are on required requiredthe metal at at block both both Q- with Q and‐ and waveguide D-band. D‐band. Both input Both transitions andtransitions output. are designed using E-plane probe which translates TE mode of the rectangular waveguide to quasi-TEM areTherefore, designed waveguide using E‐plane‐to‐microstrip probe which transitions translates are10 TE required10 mode atof boththe rectangular Q‐ and D‐band. waveguide Both transitions to quasi‐ mode of the microstrip line. Figure7a shows Q-band waveguide-to-microstrip transition in the same TEMare designed mode of usingthe microstrip E‐plane probeline. Figure which 7a translates shows Q TE‐band10 mode waveguide of the rectangular‐to‐microstrip waveguide transition to inquasi the ‐ samesubstrateTEM substratemode as usedof the as in microstripused the frequencyin the line. frequency tripler.Figure The7atripler. shows input The Q impedance‐ bandinput waveguide impedance and bandwidth‐to and‐microstrip bandwidth are mainly transition are determined mainly in the determinedbysame the substrate width by (W) the as and width used length (W)in the and (L) frequency of length the probe (L) tripler. of and the probe theThe distance input and the impedance (D) distance from the (D)and backshort from bandwidth the backshort [21]. are The mainly input [21]. Theimpedancedetermined input impedance of by the the designed width of the (W) probedesigned and length is matched probe (L) ofis to thematched 50 probeΩ by toand adding 50 the Ω distanceby quarter-wave adding (D) quarter from long the‐wave (λ backshort/4) impedance long (λ [21]./4) impedancetransformer.The input impedancetransformer. Figure8a of shows Figurethe designed the 8a simulatedshows probe the is resultssimulated matched of the resultsto 50 designed Ω ofby the adding Q-band designed quarter transition Q‐‐bandwave exhibiting transitionlong (λ/4) exhibitinginsertionimpedance loss insertion transformer. less than loss 0.1 less Figure dB than and 8a return0.1 shows dB lossand the better return simulated than loss 11.4 betterresults dB than at of full the 11.4 Q-band designed dB at (33–50 full Q ‐Qband GHz).‐band transition (33–50 GHz).exhibitingFigure insertion7b shows loss the designedless than 0.1 D-band dB and waveguide-to-microstrip return loss better than transition 11.4 dB at in full the Q same‐band way (33–50 as Q-bandGHz).Figure transition. 7b shows The the probe designed is designed D‐band to waveguide have a slightly‐to‐microstrip reactive transition impedance in and the thensame matched way as Q to‐ band50 Ω transition.Figureby using 7b highshows The impedanceprobe the designed is designed line. D The‐band to have simulated waveguide a slightly insertion‐to reactive‐microstrip loss impedance is less transition than and 0.2 in then dB the with same matched return way to as loss 50 Q ‐ Ω betterbandby usingtransition. than 16.4high dB Theimpedance across probe full is line. designed D-band The assimulated to shown have a in slightlyinsertion Figure 8reactiveb. loss is impedance less than 0.2 and dB then with matched return toloss 50 betterΩ by thanusing 16.4 high dB impedance across full Dline.‐band The as simulated shown in Figureinsertion 8b. loss is less than 0.2 dB with return loss better than 16.4 dB across full D‐band as shown in Figure 8b.

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(a) (b) (a) (b) Figure 7. Waveguide‐to‐microstrip transition using E‐plane probe. (a) Q‐band transition. (b) D‐band transition.FigureFigure 7. 7. Waveguide-to-microstripWaveguide‐to‐microstrip transition transition using using E‐plane E-plane probe. probe. (a) Q‐band (a) Q-bandtransition. transition. (b) D‐band (b)transition. D-band transition.

0 0 0 0 0 S21 0 0 S21 0 ‐5 ‐5 S21 ‐1 S21 ‐1 ‐5 ‐5 ‐10 ‐1 ‐10 ‐1 S11 ‐10 ‐2 (dB) ‐10 ‐2 (dB)

S (dB) 11 (dB) S 22 22 ‐15 ‐2 ‐15(dB) ‐2 22 S 21 (dB) 21

(dB) (dB) S

, S 22 22

S ‐15 ‐3 S ‐15 ‐3 , 22 11 S 21 21

11 S ‐20 ‐20, S

S ‐3 S ‐3 , S 11

11 ‐20 ‐20 ‐4 S ‐4 ‐25S ‐25 S22 ‐4 ‐4 ‐25 ‐25 S11 S22 ‐30 ‐5 ‐30 S11 ‐5 ‐3030 35 40 45 50 ‐5 110‐30 120 130 140 150 160 170 ‐5 30Frequency 35 (GHz) 40 45 50 110 120Frequency 130 140 (GHz) 150 160 170 Frequency (GHz) Frequency (GHz) (a) (b) (a) (b) FigureFigure 8. 8. SimulatedSimulated S‐parameters S-parameters of the of thedesigned designed waveguide waveguide transition. transition. (a) Q‐band (a) Q-band transition. transition. (b) D‐ Figure 8. Simulated S‐parameters of the designed waveguide transition. (a) Q‐band transition. (b) D‐ band(b) D-band transition. transition. band transition. 2.4.2.4. Compensation Compensation of of Bond Bond-Wire‐Wire Effect Effect 2.4. Compensation of Bond‐Wire Effect TransitionsTransitions and frequency frequency tripler tripler are are designed designed in in the the same same substrate. substrate. However, However, as as demonstrated demonstrated inin Figure FigureTransitions 99,, they are and implemented frequency using tripler two are separate designed substrates in the same with substrate. different di fferent However, width, width, one one as fordemonstrated for Q Q-band‐band transitiontransitionin Figure andand 9, frequency theyfrequency are implemented tripler tripler (wide (wide using substrate) substrate) two separate and theand other substrates the forother D-band with for differentD transition‐band width,transition (narrow one substrate). (narrowfor Q‐band substrate).Thistransition is because This and D-bandis frequency because transition Dtripler‐band should (widetransition have substrate) ashould small and widthhave the fora othersmall good for transitionwidth D‐band for performance goodtransition transition (narrow due performanceto thesubstrate). small size dueThis of to D-band isthe because small waveguide. sizeD‐band of D ‐ However,transitionband waveguide. itshould is a bit However,have difficult a small process it is awidth tobit precisely difficult for good cutprocess outtransition theto preciselysubstrateperformance cut with out non-square duethe substrateto the shape. small with Therefore, size non of‐square D‐ weband fabricateshape. waveguide. Therefore, the overall However, we circuits fabricate it in is two athe bit separate overall difficult circuits substrates process in to twoandprecisely separate then connect cut substrates out two the signal substrateand then lines withconnect using non bond-wires two‐square signal shape. aslines shown Therefore, using in bond Figure we‐wires fabricate9. (see as Figureshown the overall 12ain Figure as circuits well). 9. in (seeUnfortunately,two Figure separate 12a the assubstrates well). bond-wires Unfortunately, and exhibitthen connect high the parasiticbondtwo ‐signalwires eff ectlinesexhibit at using millimeter-wave high bond parasitic‐wires effect frequencies,as shown at millimeter in soFigure that‐ 9. waveit can(see frequencies, cause Figure severe 12a soas impedance thatwell). it canUnfortunately, mismatchescause severe andthe impedance bond performance‐wires mismatches exhibit degradation, high and parasiticperformance unless theyeffect degradation, are at properlymillimeter ‐ unlesscompensatedwave they frequencies, are for properly [22, 23so]. thatcompensated it can cause for severe [22,23]. impedance mismatches and performance degradation, unlessFigureFigure they 9 shows are properly the structure compensated forfor thethe simulation for [22,23]. of bond-wirebond‐wire eeffect.ffect. A A gold gold wire wire with with a a diameter diameter ofof 25 25 μµmmFigure is is used used 9 showsto to connect connect the structuretwo two 50 50 Ω Ω forsignalsignal the linessimulation lines with with the of the bondspacing spacing‐wire of of200effect. 200 μm. µAm. The gold The wires wire wires arewith are placed a placeddiameter 35 μ35mofµ higherm 25 higher μm from is fromused the to the substrate. connect substrate. two Three Three 50 Ω parallelsignal parallel wireslines wires with are are usedthe used spacing to to minimize minimize of 200 μthe them. parasitic The parasitic wires inductance. inductance. are placed 35 FigureFigureμm 10 higher10 shows shows from the the simulatedthe simulated substrate. S‐parametersS -parametersThree parallel of this of wires this structure. structure. are used Even Evento though minimize though three the three short parasitic short wires wires inductance.are used are inused parallel,Figure in parallel, 10 the shows insertion the the insertion simulated loss is losshigher S is‐parameters higher than 1.0 than dB of and 1.0 this dB returnstructure. and loss return Even is below loss though is 10 below dB three at 10 D short dB‐band, at wires D-band, as shown are used as inshown Figurein parallel, in 10a. Figure Thethe insertion10inputa. The impedance loss input is higher impedance is plotted than on1.0 is plotted SmithdB and chart onreturn Smith in Figureloss chart is below10b, in Figureshowing 10 dB 10 at thatb, D‐ showingband, bond as‐wires shown that producebond-wiresin Figure parasitic produce10a. The capacitive parasiticinput impedance component capacitive is componentatplotted D‐band on Smith(42.5 at D-band‐j36 chart Ω (42.5-j36atin portFigure 1 Ωand 10b,at port51 showing‐j33.5 1 and Ω that 51-j33.5at port bond 2,Ω‐ wiresatat 135portproduce GHz). 2, at 135 parasitic GHz). capacitive component at D‐band (42.5‐j36 Ω at port 1 and 51‐j33.5 Ω at port 2, at 135 GHz).

Electronics 2020, 9, x FOR PEER REVIEW 7 of 11 Electronics 2020, 9, x FOR PEER REVIEW 7 of 11 ElectronicsElectronics 20202020,, 99,, 1201x FOR PEER REVIEW 77 of 1111

(a) (b) (a) (b) Figure 9. Simulation(a) of bond‐wire effect. (a) Top view and (b) cross‐sectional(b) view. Figure 9. Simulation of bond‐wire effect. (a) Top view and (b) cross‐sectional view. Figure 9. Simulation of bond bond-wire‐wire eeffect.ﬀect. ( a) Top view and ((b)) cross-sectionalcross‐sectional view.view. 0 0 0 0 ‐5 0 ‐1 0 ‐5 ‐1 ‐10 ‐5 ‐1 S11‐10 ‐2 (dB) (dB) ‐15 ‐10 S11 S21 ‐2 21

11 ‐2 S (dB) (dB) ‐1511 S 21 ‐3 S S (dB) 21 (dB) ‐20 ‐15 11 S21

‐3 S S S

21 22 11 ‐20

‐3 S S ‐4 S ‐25 ‐20 S 22 ‐25 ‐4 S1122 ‐30 ‐25 ‐5 ‐4 S S 11 110120130140150160170‐30 ‐5 11 ‐30 ‐5 110120130140150160170Frequency (GHz) 110120130140150160170Frequency (GHz) Frequency (GHz) (a) (b) (a) (b) Figure 10. Simulated S‐(parametersa) of bond‐wires (a) in rectangular plot and (b()b on) Smith chart. FigureFigure 10. Simulated 10. SimulatedS-parameters S‐parameters of bond-wires of bond‐wires (a) in ( rectangulara) in rectangular plot and plot (b and) on ( Smithb) on Smith chart. chart. Figure 10. Simulated S‐parameters of bond‐wires (a) in rectangular plot and (b) on Smith chart. In order to compensate for the bond‐wire effect and thus recover the performance, we insert In orderIn order to compensate to compensate for the for bond-wire the bond eff‐wireect and effect thus and recover thus the recover performance, the performance, we insert highwe insert high impedanceIn order linesto compensate at both ports for (70 the Ω bondline ‐atwire port effect 1 and and 100 thus Ω line recover at port the 2) performance, as shown in Figurewe insert impedancehigh impedance lines at both lines ports at both (70 Ωportsline (70 at Ω portline 1 and at port 100 1Ω andline 100 at Ω portline 2) at as port shown 2) as in shown Figure in11 a.Figure 11a.high These impedance inductive lines lines at effectively both ports cancel (70 Ω outline theat port capacitive 1 and 100parts Ω generatedline at port by 2) theas shown bond‐ wires.in Figure These11a. inductive These lines inductive effectively lines cancel effectively out the cancel capacitive out the parts capacitive generated parts by the generated bond-wires. by the Figure bond 11‐bwires. Figure11a. 11b These shows inductive that the lines designed effectively circuit cancel effectively out the compensatescapacitive parts for generatedthe bond‐ wireby the effect bond and‐wires. showsFigure that the 11b designed shows circuitthat the eff ectivelydesigned compensates circuit effectively for the bond-wire compensates effect for and the reduces bond‐ impedancewire effect and reducesFigure impedance 11b shows mismatches, that the designed providing circuit insertion effectively loss less compensates than 0.6 dB andfor returnthe bond loss‐wire better effect than and mismatches,reduces providing impedance insertion mismatches, loss less providing than 0.6 insertion dB and return loss less loss than better 0.6 than dB 19.0and dBreturn at full loss D-band. better than 19.0reduces dB at full impedance D‐band. mismatches, providing insertion loss less than 0.6 dB and return loss better than 19.0 dB at full D‐band. 19.0 dB at full D‐band. 0 0 0 0 ‐5 0 S21 ‐1 0 ‐5 S21 ‐1 ‐10 ‐5 S21 ‐1 (dB) ‐10 ‐2 (dB) 22

‐15 ‐10 (dB) ‐2 S 21

(dB) (dB) ,

22 ‐2

‐15 ‐3 S 11 S S (dB) 22 21

‐20 ‐15 , S S

S ‐3 21

11 S

, 22

‐20 S

S ‐3 ‐2511 ‐20 S22 ‐4 S S ‐25 11 ‐4 ‐30 ‐25 S11 ‐5 ‐4 S11 110 120‐30 130 140 150 160 170 ‐5 ‐30 ‐5 110Frequency 120 130 (GHz) 140 150 160 170 110 120 130 140 150 160 170 Frequency (GHz) (a) Frequency(b) (GHz) (a) (b) FigureFigure 11. Bond 11. Bond-wire(‐awire) compensation compensation circuit. circuit. (a) Top (a) Top view view and and (b) simulated (b) simulated(b) results. results. Figure 11. Bond‐wire compensation circuit. (a) Top view and (b) simulated results. Figure 11. Bond‐wire compensation circuit. (a) Top view and (b) simulated results.

Electronics 2020, 9, 1201 8 of 11 Electronics 2020, 9, x FOR PEER REVIEW 8 of 11 Electronics 2020, 9, x FOR PEER REVIEW 8 of 11 3. Measurement and Comparison 3. 3.Measurement Measurement and and Comparison Comparison 3.1. Measurement Results 3.1.3.1. Measurement Measurement Results Results Figure 12 is a photograph of fabricated D-band frequency tripler module including Q- and D-band FigureFigure 12 12 is isa aphotograph photograph of of fabricated fabricated D ‐Dband‐band frequency frequency tripler tripler module module including including Q ‐ Qand‐ and D ‐D‐ transitions. Overall jig size is 50 mm 50 mm 50 mm. bandband transitions. transitions. Overall Overall jig jig size size is is50 ×50 mm mm × 50× 50× mm mm × 50× 50 mm. mm.

(a)( a) (b()b )

FigureFigure 12. 12. Fabricated Fabricated D D-band ‐Dband‐band frequency frequency tripler tripler module: module: ( a )( aInternal ) Internal view view and and (b ()b external) external view. view. The fabricated waveguide-based frequency tripler is measued using the setup shown in Figure 13. TheThe fabricated fabricated waveguide waveguide‐based‐based frequency frequency tripler tripler is ismeasued measued using using the the setup setup shown shown in in Figure Figure Q-band signal is produced by a signal generator (E8257D by Keysight) followed by power amplifier 13.13. Q ‐Qband‐band signal signal is isproduced produced by by a asignal signal generator generator (E8257D (E8257D by by Keysight) Keysight) followed followed by by power power (AMP-22-02070 by Millitech). D-band output power is measured by the power meter (PM5 by Erickson). amplifieramplifier (AMP (AMP‐22‐22‐02070‐02070 by by Millitech). Millitech). D ‐Dband‐band output output power power is ismeasured measured by by the the power power meter meter (PM5 (PM5 Q-band input power is also measured by power meter (E4410B by Agilent) and power sensor (N8487A byby Erickson). Erickson). Q ‐Qband‐band input input power power is isalso also measured measured by by power power meter meter (E4410B (E4410B by by Agilent) Agilent) and and power power by Agilent) through a 10 dB coupler (22–3000/10 by Aerowave). D-band waveguide has a cut-off sensorsensor (N8487A (N8487A by by Agilent) Agilent) through through a 10a 10 dB dB coupler coupler (22–3000/10 (22–3000/10 by by Aerowave). Aerowave). D ‐Dband‐band waveguide waveguide frequencyhas a cut of‐off 90.8 frequency GHz in the of dominant90.8 GHz TEin 10themode, dominant so that TE the10 mode, fundamental so that and the 2nd fundamental harmonic signalsand 2nd has a cut‐off frequency of 90.8 GHz in the dominant TE10 mode, so that the fundamental and 2nd below the cut-off are rejected by D-band waveguide and thus they are not included in the measured harmonicharmonic signals signals below below the the cut cut‐off‐off are are rejected rejected by by D ‐Dband‐band waveguide waveguide and and thus thus they they are are not not included included output power. inin the the measured measured output output power. power.

Directional Directional coupler coupler D‐band Power D‐band Power tripler meter tripler meter Signal generator Power Signal generator Power Power (250 kHz –67 GHz) amplifier Power (250 kHz –67 GHz) amplifier meter meter (a)( a)

(b()b )

FigureFigure 13. 13. Measurement Measurement set-upset set‐up‐up of of D-bandD ‐Dband‐band frequency frequency tripler. tripler. (a ))( a Block) Block diagram diagram and and ((b )()b photograph.photograph.) photograph.

FigureFigure 1414a 14aa shows shows the the measured measured output output power power versus versus output output frequency frequency at at input input powers powers of of 15.0, 15.0, 19.019.019.0 andand and 20.520.5 20.5 dBm.dBm. dBm. The The maximum maximum output output power power is is measured measured to to be be 5.4 5.4 dBm dBm at at 123 123 GHzGHz GHz underunder under input input powerpowerpower ofof of 20.520.5 20.5 dBm,dBm, dBm, correspondingcorresponding corresponding toto to thethe the conversionconversion conversion gaingain gain ofof of −15.1 −15.1 dB. dB. A A 3-dB3‐ 3dB‐dB bandwidth bandwidth is is 24.0 24.0 GHz GHz − fromfromfrom 118.5118.5 118.5 toto to 142.5 142.5 GHz GHz at at input input power power of of 20.5 20.5 dBm. dBm. The The upper upper frequency frequency of of the the bandwidth bandwidth is is limited limited tototo 142.5 142.5 GHz GHz due due to to the the driving driving capability capability of of the the Q Q-band ‐Qband‐band power power amplifier ampliﬁer amplifier in in the the measurement measurement setup. setup. AtAt the the input input power power of of 15.0 15.0 dBm, dBm, the the measured measured 3‐ 3dB‐dB bandwith bandwith is isas as wide wide as as 30.0 30.0 GHz GHz from from 118.5 118.5 to to 148.5148.5 GHz. GHz. Figure Figure 14b 14b shows shows the the measured measured output output power power and and conversion conversion gain gain versus versus input input power power

Electronics 2020, 9, 1201 9 of 11

At the input power of 15.0 dBm, the measured 3-dB bandwith is as wide as 30.0 GHz from 118.5 to Electronics 2020, 9, x FOR PEER REVIEW 9 of 11 148.5 GHz. Figure 14b shows the measured output power and conversion gain versus input power at f = 45 GHz. The maximum output power is 4.5 dBm at input power 21.5 dBm with conversion at f00 = 45 GHz. The maximum output power is 4.5 dBm at input power 21.5 dBm with conversion gain gain of 17.0 dB. The output power seems to be not satruated yet and is expected to increase at higher of −17.0− dB. The output power seems to be not satruated yet and is expected to increase at higher input power. Maximum conversion gain is measured to be 16.7 dB at input power of 19.5 dBm. input power. Maximum conversion gain is measured to be −16.7− dB at input power of 19.5 dBm. The Themeasurement measurement shows shows 1.8–3.3 1.8–3.3 dB lower dB lower output output power power and conversion and conversion gain than gain the than simulation, the simulation, which whichseems seemsto be caused to be caused by the bylosses the of losses Q‐ and of Q- D‐ andband D-band transitions transitions and inaccurate and inaccurate diode model. diode model.

10 10 0 Pin = 20.5 dBm 5 5 ‐5 (dB) 0 Pin = 19.0 dBm (dBm)

(dBm)

0 ‐10 gain

‐5 Pin =15.0dBm power

‐10 power ‐5 ‐15 ‐15 Pin = 19.0 dBm ‐10 ‐20 Output ‐20 Output Conversion ‐25 ‐15 ‐25 100110120130140150160170 10 12 14 16 18 20 22 Input power (dBm) Output frequency (GHz) (a) (b)

Figure 14. Measured output power and conversion gain (solid:(solid: measurement, dashed: simulation). (a) Output powerpower versusversus frequencyfrequency atat certaincertain inputinput powerspowers ((PPinin).). ( (b)) Conversion gain and output power versus input power at output frequency ofof 135135 GHz.GHz.

3.2. Performance Comparison Table3 3 comparescompares the the performance performance of of the the reported reported D‐ D-bandband frequency frequency tripler tripler modules modules using using anti‐ anti-parallelparallel GaAs GaAs Schottky Schottky diodes. diodes. They They are are all allmounted mounted in in the the rectangular rectangular wavguides. wavguides. The The frequency frequency triplers in in [14] [14 ]and and this this work work were were fabricated fabricated in the in form the formof hybrid of hybrid circuits circuits using zero using‐biased zero-biased diodes. diodes.In [15], Inthe [ 15diodes], the diodeswere reverse were reverse-biased‐biased for high for performance high performance in the in GaAs the GaAs integrated integrated circuit. circuit. The Thefrequency frequency tripler tripler module module in this in this work work shows shows a 3 a‐dB 3-dB fractional fractional bandwidth bandwidth of of 22.5% 22.5% which which is is larger than thosethose in in [ 14[14,15].,15]. It It exhibits exhibits a peaka peak output output power power of 5.4 of dBm5.4 dBm which which is comparable is comparable to the to zero-biased the zero‐ biasedfrequency frequency tripler intripler [14]. in [14].

Table 3. Reported D D-band‐band frequency tripler modules using GaAs Schottky diodes.

Diode FrequencyFrequency PinPin Pout,peakPout,peak ConversionConversion Gain 3 dB ReferenceReference StructureStructure Diode Bias 3 dB Bandwidth Bias (GHz)(GHz) (dBm)(dBm) (dBm)(dBm) (dB)Gain(dB) Bandwidth Anti-parallelAnti‐parallel 135.0–148.5135.0–148.5 GHz GHz [[14]14] ZeroZero bias bias 142.5142.5 18.518.5 4.5 4.5 −14.014.0 diodediode pair pair − (9.5%)(9.5%) Anti-parallelAnti‐parallel Reverse 101.5–119.5101.5–119.5 GHz GHz [[15]15] Reverse bias 116.0116.0 29.029.0 22.9 22.9 −6.1 6.1 diodediode pair pair bias − (16.3%)(16.3%) Anti-parallelAnti‐parallel 118.5–148.5118.5–148.5 GHz GHz ThisThis work work ZeroZero bias bias 123.0123.0 20.520.5 5.4 5.4 −15.115.1 diodediode pair pair − (22.5%)(22.5%)

4. Conclusions 4. Conclusions In this work, the D‐band frequency tripler module was presented using GaAs Schottky diodes In this work, the D-band frequency tripler module was presented using GaAs Schottky diodes and and waveguide transitions. Un‐biased anti‐parallel diode pair was well‐suited for the frequency waveguide transitions. Un-biased anti-parallel diode pair was well-suited for the frequency tripler with tripler with simple structure, since even harmonic components are strongly suppressed at the output. simple structure, since even harmonic components are strongly suppressed at the output. In addition, In addition, the fundamental component is cut‐off by the D‐band waveguide. Harmonic load‐pull the fundamental component is cut-oﬀ by the D-band waveguide. Harmonic load-pull simulations simulations were performed using the developed nonlinear diode model to find the optimum were performed using the developed nonlinear diode model to ﬁnd the optimum impedances impedances for high 3rd harmonic power. Bond‐wire compensation circuit was carefully designed for high 3rd harmonic power. Bond-wire compensation circuit was carefully designed based on based on full‐wave electromagnetic simulations. The measurement result showed the comparable performance to the previously reported D‐band frequency tripler modules with excellent bandwidth. Therefore, the fabricated frequency tripler module can be used for millimeter‐wave signal generation above 100 GHz.

Electronics 2020, 9, 1201 10 of 11 full-wave electromagnetic simulations. The measurement result showed the comparable performance to the previously reported D-band frequency tripler modules with excellent bandwidth. Therefore, the fabricated frequency tripler module can be used for millimeter-wave signal generation above 100 GHz.

Author Contributions: Conceptualization, J.D., J.K. and J.J.; methodology, J.D., J.K. and J.J.; software, J.D. and J.K.; validation, J.D.; formal analysis, J.D.; data curation, J.D.; writing—original draft preparation, J.J.; writing—review and editing, J.D. and J.J.; visualization, J.D.; supervision, J.J.; funding acquisition, J.J. All authors have read and agreed to the published version of the manuscript. Funding: This work was supported by the Institute for Information & Communications Technology Planning & Evaluation (IITP) grant, funded by the Korean government (MSIT) (No. 2016-0-00185, Development of ultra-wideband terahertz CW spectroscopic imaging systems based on electronic devices). Conﬂicts of Interest: The authors declare no conﬂict of interest.

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