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Inspection and Classification of Semiconductor Wafer Surface applied sciences Article Inspection and Classification of Semiconductor Wafer Surface Defects Using CNN Deep Learning Networks Jong-Chih Chien 1, Ming-Tao Wu 2 and Jiann-Der Lee 2,3,4,* 1 Degree Program of Digital Space and Product Design, Kainan University, Taoyuan 33587, Taiwan; [email protected] 2 Department of Electrial Engineering, Chang Gung University, Taoyuan 33302, Taiwan; [email protected] 3 Department of Neurosurgery, Chang Gung Memorial Hospital at Linkou, Taoyuan 33305, Taiwan 4 Department of Electrical Engineering, Ming Chi University of Technology, New Taipei City 24301, Taiwan * Correspondence: [email protected]; Tel.: +886-3-211-8800 (ext. 5316) Received: 16 July 2020; Accepted: 31 July 2020; Published: 2 August 2020 Featured Application: To detect and classify semiconductor wafer defects in order to help determine the cause(s) of the defects. Abstract: Due to advances in semiconductor processing technologies, each slice of a semiconductor is becoming denser and more complex, which can increase the number of surface defects. These defects should be caught early and correctly classified in order help identify the causes of these defects in the process and eventually help to improve the yield. In today’s semiconductor industry, visible surface defects are still being inspected manually, which may result in erroneous classification when the inspectors become tired or lose objectivity. This paper presents a vision-based machine-learning-based method to classify visible surface defects on semiconductor wafers. The proposed method uses deep learning convolutional neural networks to identify and classify four types of surface defects: center, local, random, and scrape. Experiments were performed to determine its accuracy. The experimental results showed that this method alone, without additional refinement, could reach a top accuracy in the range of 98% to 99%. Its performance in wafer-defect classification shows superior performance compared to other machine-learning methods investigated in the experiments. Keywords: deep learning; semiconductor wafer defects; convolution neural network; automatic inspection 1. Introduction In the progress of semiconductor design methodologies [1–5], more and more integrated circuit components can be patterned then etched onto semiconductor wafers. This is true especially in the DRAM (dynamic random access memory) industry, where, in addition to the demands of increasing the speeds of access and longer lifespans, there are other demands to be met: for example, each successive generation of the DRAM chips must become smaller and more compact, so that more memory can be fit into an even smaller space. But as the pressure for meeting these demands increases, the probabilities of manufacturing process-based defects appearing on the surface of the wafers also increases, and the yield becomes more likely to decrease. Since it appears that the defects are linked to fabrication steps in the process, the problem of identifying and classifying defect patterns on the wafers is inseparable from the problem of improving the manufacturing yields. The figure below, Figure1, show the basic-block diagrams of a semiconductor manufacturing process. The purposes of some of the basic blocks are: Appl. Sci. 2020, 10, 5340; doi:10.3390/app10155340 www.mdpi.com/journal/applsci Appl. Sci. 2020, 10, x FOR PEER REVIEW 2 of 13 patterns on the wafers is inseparable from the problem of improving the manufacturing yields. The figure below, Figure 1, show the basic-block diagrams of a semiconductor manufacturing process. Appl. Sci. 2020, 10, 5340 2 of 13 The purposes of some of the basic blocks are: • Thin-film processing: the use of physical or chemical means to perform vapor deposition of Thin-film processing: the use of physical or chemical means to perform vapor deposition of • crystals on thin film. • crystalsChemical-mechanical on thin film. polishing: the principle of polishing to flatten the even contours on the Chemical-mechanicalwafers. polishing: the principle of polishing to flatten the even contours on the wafers. • • Photolithography:Photolithography: using using photoresist photoresist for for exposure exposure and and development, development, so as so to as leave to leave the photo-masked the photo- • patternmasked on pattern the wafer. on the wafer. • Etching:Etching: to to remove remove materials materials from from the surfacethe surface of the of wafer the wafer by physical by physical or chemical or chemical means wherevermeans • thewherever surface isthe not surface protected is not by protected the photoresist. by the photoresist. • Diffusion and ion implantation: to use physical phenomena of heat diffusion to alter the Diffusion and ion implantation: to use physical phenomena of heat diffusion to alter the • semiconductor’s electrical conductivity, then ionize the surface substance, then control the semiconductor’s electrical conductivity, then ionize the surface substance, then control the electrical current magnitude to control the concentrations of ions. electrical current magnitude to control the concentrations of ions. • Oxidation: to reduce the damage that can occur during the ion implantation stage. Oxidation: to reduce the damage that can occur during the ion implantation stage. • • Metallization: mainly to perform the connections of metals. Metallization: mainly to perform the connections of metals. • The types of manufacturing processing problems that can occur could involve robot handoffs, contaminations,The types of manufacturingflow leakages, etc. processing Semiconductor problems engineers that can are occur able to could use the involve defect robot patterns hando onff s, contaminations,the wafers to locate flow problems leakages, in etc. the Semiconductor process, which engineers would then are become able to clues use the in helping defect patterns improveon the the wafersyield. to locate problems in the process, which would then become clues in helping improve the yield. Materials Cleanroom Production Plant Wafer Thin Film Processing Chemical-Mechanical (TFP) Polishing (CMP) Photomasking Photolithography Etching Diffusion & Oxidation & Metallization Design Ion Implantation Heat Treatment Bonding & Testing Packaging Final Testing FigureFigure 1. 1.The The semiconductorsemiconductor manufacturing manufacturing diagram. diagram. KaempfKaempf [6 [6]] identified, identified, in in general, general, thatthat manufacturingmanufacturing defects defects can can be be classified classified into into three three types: types: Type-A,Type-A, Type-B, Type-B, and and Type-C. Type-C. 1. 1. Type-AType-A defects defects are are evenly evenly randomrandom withwith a stable mean mean density. density. This This type type of of defect defect is isgenerated generated randomly,randomly, and and no no specific specific clustering clustering phenomenon phenomenon is is visible, visible, asasshown shown inin FigureFigure2 2a.a.The Thecause cause of thisof typethis type of defect of defect is complex is complex and and not fixednot fixed to particular to particular patterns. patterns. It is It di isffi difficultcult to find to find the causethe ofcause thistype of this of defect.type of Thisdefect. type This of type yield of abnormality yield abnormality can be can reduced be reduced by improving by improving the stability the andstability accuracy and ofaccuracy the process. of the process. 2. 2. Type-BType-B defects defects are are systematic systematic and and repeatable repeatable from from wafer wafer to wafer. to wafer. This This type oftype defect of defect has obvious has clusteringobvious clustering phenomenon, phenomenon, as shown as in shown Figure in2 b,c.Figure The 2b,c. cause The of cause this typeof this of type defect of defect can usually can usually be found by the distribution of defects on the wafer, which is used to find abnormalities be found by the distribution of defects on the wafer, which is used to find abnormalities in the process or machine, such as the misalignment of the mask position during photo development or excessive etching during the process, etc. 3. Type-C defects vary from wafer to wafer. This type of defect is the most common occurrence in semiconductor manufacturing. That is, it is a combination of Type-A defects and Type-B defects, Appl. Sci. 2020, 10, x FOR PEER REVIEW 3 of 13 Appl. Sci. 2020, 10, x FOR PEER REVIEW 3 of 13 in the process or machine, such as the misalignment of the mask position during photo Appl. Sci. 2020, 10, 5340 3 of 13 developmentin the process or excessiveor machine, etching such during as the the misa process,lignment etc. of the mask position during photo 3. Type-Cdevelopment defects or vary excessive from wafer etching to duringwafer. Thisthe process, type of defectetc. is the most common occurrence in 3. assemiconductorType-C shown defects in Figure manufacturing. vary2d. from In thiswafer That type to wafer. is, of it defect, is This a combination type it is of very defect of important Type-A is the most defects to eliminatecommon and Type-B occurrence thecauses defects, in for randomassemiconductor shown defects in Figure andmanufacturing. keep2d. In systemic this typeThat defects, is,of itdefect, is a so combination thatit is engineersvery important of Type-A can find todefects eliminate the causeand Type-B the of anomalies.causes defects, for randomas shown defects in Figure and keep 2d. In systemic this type defects, of defect, so th itat isengineers very important can find to the eliminate cause of theanomalies. causes
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