Steady-State Analysis of PWM Z-Bridge Source DC-DC Converter

A thesis submitted in the partial fulﬁllment of the requirements for the degree of Master of Science in Electrical Engineering

Lokesh Kathi B.Tech., Koneru Lakshmaiah University, Guntur, India, 2013

2015 Wright State University WRIGHT STATE UNIVERSITY GRADUATE SCHOOL

January 5, 2016

I HEREBY RECOMMEND THAT THE THESIS PREPARED UNDER MY SUPERVISION BY Lokesh Kathi ENTITLED Steady-State Analysis of PWM Z- Bridge Source DC-DC Converter BE ACCEPTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF Master of Science in Electrical Engineering.

‘ Marian K. Kazimierczuk, Ph.D.

Thesis Director

Brian Rigling, Ph.D.

Chair Department of Electrical Engineering College of Engineering and Computer Science Committee on Final Examination

Marian K. Kazimierczuk, Ph.D.

Yan Zhuang, Ph.D.

Lavern Alan Starman, Ph.D.

Robert E. W. Fyﬀe, Ph.D. Vice President for Research and Dean of the Graduate School Abstract

Lokesh, Kathi. M.S.E.E., Department of Electrical Engineering, Wright State Uni- versity, 2015. Steady-state analysis of pulse-width modulated (pwm) z-bridge source dc-dc converter.

A pwm z-bridge source dc-dc converter has a potential to play a prominent role in renewable energy applications, as it provides boosted and regulated output voltage and also behaves as an intermediate buffer between the source and the load. A complete circuit analysis of the z-bridge source converter is needed to understand the operation of this converter. Steady-state analysis of pulse-width modulated (pwm) z-bridge source dc-dc converter operating in continuous conduction mode (ccm) is given. Expressions describing waveforms of voltages across and currents through the all components of the pwm z-bridge source dc-dc converter to operate in steady- state condition are derived. The output-to-input voltage conversion ratio for ideal (lossless) and non-ideal (lossy) conditions are derived. Expressions for the minimum z-network inductance, the minimum filter inductance, and the minimum z-network capacitor are derived to operate converter in ccm. To determine the total power loss in pwm z-bridge source dc-dc converter, power loss expressions for each and every component and the overall efficiency of the pwm z-bridge source dc-dc converter are determined. Using power loss expressions, the efficiency analysis graphs are plotted using matlab to obtain the suitable operating region for the pwm z-bridge source dc-dc converter in terms of duty cycle, output current, and input voltage. An example of pwm z-bridge source dc-dc converter is considered and steady-state analysis is performed in saber. The simulation reults of designed pwm z-bridge source dc-dc converter are used to validate the theoretical results.Plant characteristics of pwm z-bridge source dc-dc converter are performed and the results are reported.

iii Contents

1 Introduction 2

1.1 Switching-Mode Voltage Regulators ...... 2

1.2ThesisObjectives ...... 3

1.3ThesisOutline...... 3

2 Overview of Z-Source Inverters 5

2.1OriginofZ-SourceNetwork ...... 5 2.2Z-SourceInverters...... 6

2.3 PWM Z-Source DC-DC Converter with a Simpliﬁed Circuit

Representation ...... 11 2.4 Transﬁguration of PWM Z-Source DC-DC Converter circuit to a

Circuit of Simpliﬁed Bridge Network Representation ...... 12

3 Steady-State Analysis of PWM Z-Bridge Source DC-DC Converter in CCM 14

3.1 Circuit description of a PWM Z-Bridge Source Converter ...... 14

3.2Assumptions...... 14 3.3 Shoot-Through State (Time Interval 0

3.4 Non Shoot-Through State (Time Interval DT

3.5 DC Voltage Transfer Function (MV DC )...... 25

4 Derivations of Expressions for Passive Components 27

4.1 Minimum Inductance of Z-Network Inductor to Operate in CCM.... 27

4.2 Minimum Inductance of Filter Inductor to Operate in CCM ...... 29

iv 4.3 Minimum Capacitance Values for Z-Network and Filter Capacitors in

CCM...... 31

4.3.1 Minimum Capacitance of Z-Network Capacitor in CCM at Shoot-Through State (0

4.3.2 Minimum Capacitance of Z-Network Capacitor in CCM at Non

Shoot-Through State (DT

4.4 Design Example and Simulation Results ...... 34 4.5 Eﬃciency, Power Losses, and DC Voltage Conversion Factor of

Z-BridgeSourceDC-DCConverter ...... 39

5 Plant Characteristics of PWM Z-Bridge Source DC-DC

Converter in CCM 44

5.1 PWM Z-Bridge Source DC-DC Converter with Varying Duty Cycle . . 44 5.2 PWM Z-Bridge Source DC-DC Converter With Varying Load Resistance 46

5.3 PWM Z-Bridge Source DC-DC Converter With Varying Input Voltage . 49

6 Conclusion 52

6.1Summary ...... 52

6.2FutureWork...... 53

6.3ThesisContributions ...... 53

7 Bibliography 55

v List of Figures

2.1 Circuit of a x-shaped z-source network. 5

2.2 Circuit of a z-source bridge network. 6

2.3 Circuit of Wheatstone bridge network. 7

2.4 Circuit of the basic framework of a z-source converter/inverter for all types of power conversions. (a) Circuit with the z-source x-shaped

network. (b) Circuit with the z-source bridge network. 8

2.5 Circuit of multi-level inverter with z-source bridge network at

shoot-through state. (a) Circuit, when the switch is on. (b)

Equivalent circuit, when the switch is on. 9

2.6 Circuit of multi-level inverter with the z-source bridge network at

non-shoot-through state.. (a) Circuit, when the switch is off. (b)

Equivalent circuit, when the switch is off. 11

2.7 Circuit of the pwm dc-dc converter with z-source x-shaped network. 12

2.8 Simpliﬁed circuit representation of pwm z-bridge source dc-dc

converter. 12

3.1 Circuit of a pwm z-bridge source dc-dc converter. 14

3.2 Circuit of the pwm z-bridge source dc-dc converter with identical z-network inductors and capacitors. 16

vi 3.3 Circuit of the pwm z-bridge source dc-dc converter, when switch is

on and diode is off. 16

3.4 pwm z-bridge source dc-dc converter at shoot-through state. (a)

Equivalent circuit with Kirchoﬀ current loops, when the switch is on

and diode is off. (b) Equivalent circuit with the ﬁlter circuit

replaced with dc current source iLf . (c) Equivalent circuit with the two z-network inductor L and capacitor C network are replaced with

two ac current sources iL 18

3.5 Circuit of the pwm z-bridge source dc-dc converter, when the switch

is off & the diode is on. 20

3.6 Simpliﬁed circuit of the pwm z-bridge source dc-dc converter with

Kirchoﬀ voltage loops, when the switch is off and the diode is on. 20

3.7 Equivalent circuit of the pwm z-bridge source dc-dc converter with

the ﬁlter circuit is replaced with a dc current source, when the switch

is off and the diode is on. 21

3.8 Circuit of the pwm z-bridge source dc-dc converter with Kirchoﬀ

current loops, when the switch is off and the diode is on. 21

3.9 Voltage waveforms of the z-bridge source dc-dc converter in ccm. 23

3.10 Current waveforms of the z-bridge source dc-dc converter in ccm. 24

4.1 ccm/dcm boundary of pwm z-bridge source dc-dc converter for

normalized load current with respect to z-network inductance as a function of duty cycle. 28

vii 4.2 ccm/dcm boundary of pwm z-bridge source dc-dc converter for

normalized load resistance with respect to z-network inductance as a

function of duty cycle. 28

4.3 ccm/dcm boundary of pwm z-bridge source dc-dc converter for

normalized load current with respect to ﬁlter inductance as a function of duty cycle. 30

4.4 ccm/dcm boundary of pwm z-bridge source dc-dc converter for

normalized load resistance with respect to ﬁlter inductance as a function of duty cycle. 30

4.5 ccm/dcm boundary of pwm z-bridge source dc-dc converter for normalized ﬁlter inductance with respect to z-network inductance as

a function of duty cycle. 31

4.6 Variation in eﬃciency η as a function of output current IO of z-bridge source dc-dc converter 35

4.7 Power and output voltage waveforms of pwm z-bridge source dc-dc

converter in ccm. 38

4.8 Current waveforms of z-network inductor and ﬁlter inductor of pwm z-bridge source dc-dc converter in ccm. 38

4.9 Variation in eﬃciency η as a function of input voltage VI of pwm z-bridge source dc-dc converter. 41

4.10 Variation in eﬃciency η as a function of load resistance RL of z-bridge source dc-dc converter. 41

viii 4.11 Variation in eﬃciency η as a function of to duty cycle D of z-bridge

source dc-dc converter. 42

4.12 Variation in dc voltage conversion factor MV DC as a function of duty cycle D of z-bridge source dc-dc converter. 42

4.13 Variation in duty cycle D as a function of output current IO of z-bridge source dc-dc converter. 43

4.14 Variation in eﬃciency η as a function of output current IO of z-bridge source dc-dc converter. 43

5.1 Circuit of the pwm z-bridge source dc-dc converter circuit with the varying duty cycle. 44

5.2 Gate-source voltage, output voltage, and power waveforms of the pwm z-bridge source dc-dc converter with the varying duty cycle. 45

5.3 Z-network capacitor voltage and output voltage waveforms of the pwm z-bridge source dc-dc converter with the varying duty cycle. 46

5.4 Circuit of the pwm z-bridge source dc-dc converter with the varying load resistance. 46

5.5 Z-network capacitor and output voltage waveforms of pwm z-bridge

source dc-dc converter with the varying load resistance. 47

5.6 Power and output voltage waveforms of pwm z-bridge source dc-dc

converter with varying load resistance. 48

5.7 Circuit of the pwm z-bridge source dc-dc converter with varying

input voltage. 49

ix 5.8 Power and output voltage waveforms of pwm z-bridge source dc-dc

converter with the varying input voltage. 50

5.9 Z-network capacitor and output voltage waveforms of pwm z-bridge

source dc-dc converter with the varying input voltage. 51

x Acknowledgement

I would like to thank all the people, who aided me all the way to complete my thesis.

In my whole graduate studies, the following people played a prominent role in my academic development and i am very pleased to show my utmost gratitude towards

them.

My thesis advisor, Dr. Marian K. Kazimierczuk timely wisdom, insightful advice and eﬀective feedback is the backbone for completion of my thesis. He is

always cheerful and, whenever i see him new energy ﬂows into me. His support and

assurance is always there through out my study. Dr. Yan Zhuang and Dr. Lavern Alan Starman as committee members in M.S. thesis defense and aiding their assistance through feedback for my research report.

Agasthya Ayachit, who tremendously supported and encouraged to built the conﬁdence in me. His expertise and knowledge guided me to complete my thesis.

Last but not least, Department of Electrical Engineering for their support and resources to complete my M.S. at Wright State University.

xi To my mother Lakshmi Kumari Kathi, my father Kathi. Srinivasa Rao , and my brother Vamsi Krishna Kathi

1 1 Introduction

1.1 Switching-Mode Voltage Regulators

Voltage regulators, when connected to an ac supply or a dc supply are used to obtain a more accurate constant dc output voltage by minimizing the ac ripple voltage. Voltage regulators are categorized as linear regulators and switching mode

voltage regulators. Linear regulators are bulky, low eﬃciency due to high conduction

losses. The transistors in them act as dependent current sources, which is useful for low power, and low voltage applications. When it comes to switching mode voltage

regulators, they are less bulky, highly eﬃcient due to low conduction losses. And the

transistors in them act as switches due to which they can be used in both high and low power applications.

Switching-mode voltage regulators are also classiﬁed into three topologies: pulse

width modulated (pwm) regulators, resonant regulators and switched-capacitor reg-

ulators. From, which the pulse width modulated (pwm) converter is the one that will be dealt with in this thesis. Pulse width modulated (pwm) converters generate

rectiﬁed and ﬁltered dc output voltage, which can be controlled by varying the duty

cycle of the switch. pwm dc-dc converters can buck or boost or both buck & boost the output voltage based on its design [13]. Impedance-source (z-source) dc-dc con-

verter is a pwm dc-dc converter derived from z-source inverter. ac-dc Traditionally, inverters are of two types: voltage source and current source inverters[1]. These inverters have their own drawbacks and limitations. Voltage source (ac-dc) inverters

is always a buck inverter because the input dc voltage always has to be greater than

that of ac output, whereas for the current source (ac-dc) inverter it is vice versa. It

can only be a boost inverter as the ac input voltage is always higher than dc voltage supply. Because of which the voltage source (dc-dc)converter and the current

source (dc-dc) converter will be boost and buck rectiﬁers respectively. Basically,

2 the voltage source and the current source inverters cannot perform both bucking and

boosting of the output voltage. So an impedance network or a z- network is employed

in inverters to obtain a buck-boost inverter, which is called Impedance fed inverter or Z-source inverter[1]-[10]. By using the same impedance network, a pwm z-source dc-dc converter can be designed. Other than the z-network, pwm z-source dc-dc converter consists of a switch, diode, load resistance and lc output ﬁlter.

1.2 Thesis Objectives

1. Derivation of voltage and current expressions of components for operating modes of z-bridge source dc-dc converter with its respective equivalent circuits.

2. Derivations of dc input-output voltage and current conversation factors.

3. Derivations of ccm/dcm boundary condition, minimum inductance and all other parameters that are required to design a ccm operating z-source dc-dc

converter.

4. To derive a formula, to calculate the minimum capacitance of the z-network

capacitor.

5. To justify theoretical analysis, empirical results are observed and noted.

1.3 Thesis Outline

The content of the thesis is documented as below:

1. Chapter 2: This chapter deals with the origin of the z-source network and

about its reconstructed topology.The necessity of z-network to compensate the drawbacks and constraints of voltage-source inverters (VSI) and current-source

inverters (CSI).

3 2. Chapter 3: This chapter deals with complete circuit evaluation and steady

state analysis of the re-framed pwm z-source dc-dc converter, and it provides

working of the pwm z-bridge source dc-dc converter with required equivalent circuits, persuasive current and voltage waveforms, and derivations for its diﬀer-

ent operating modes. Derive an expression of output voltage and input voltage,

to build up relation in terms of duty cycle.

3. Chapter 4: This chapter comprises of derivations and plots (by using MATLAB)

to analyze boundary condition between continuous conduction mode (CCM)

and discontinuous conduction mode (DCM), minimum inductances, minimum

capacitances, voltage and current stresses, and all other parameters that are required to design a CCM operating

4. Chapter 5: In this chapter, the design example of pwm z-bridge source dc-dc

converter with it’s theoretical and simulation results are shown.

4 2 Overview of Z-Source Inverters

2.1 Origin of Z-Source Network

Any circuit, any network, or any converter is invented based on certain requirements, or to cover up drawbacks/limitations, or to improve performance of any device. So,

here z-source network use in dc-dc or ac-ac or ac-dc or dc-ac power converters is triggered from an instinct, that how to compensate the barriers and constraints of the inverters. Before going into the further discussion about the limitations and barriers of inverters. A basic structural framework of z-source network is ﬁrst introduced.

Figure 2.1: Circuit of a x-shaped z-source network.

Figure 2.1 Z-source network is an impedance fed network in which two inductors

L1 and L2 are interconnected with two capacitors C1 and C2 to form an embedded x-shaped two-port network. For the better interpretation of the impedance-source

network, it is reconstructed into a bridge structure, which can be observed in Figure

2.2.

5 £

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Figure 2.2: Circuit of a z-source bridge network.

This bridge representation of a z-source network is a prototype of a lattice ﬁl- ter/phase equalizer invented by Otto Zobel, which is a modiﬁed form of Wheatstone bridge as seen in Figure 2.3 [15]and[16]. Resistors in Wheatstone bridge are replaced by the energy stored passive elements (i.e., two inductors and two capacitors) and thus, renamed as z-source bridge network.

2.2 Z-Source Inverters

Traditionally, inverters are of two types - voltage-source inverters VSI and current- source inverters CSI. As mentioned in introduction, [1], [11], and [12], these inverters have their own limitations based on their construction. For voltage-source inverter

(VSI) operating in linear modulation, dc-link voltage will be greater than ac voltage, which makes it a buck inverter. But for current-source inverter CSI it is reverse in case, because of which it acts a boost inverter. Whereas for the voltage-source

Figure 2.3: Circuit of Wheatstone bridge network. converter and the current-source converter it will be vice versa, i.e., they act as boost and buck converter respectively. From the above statements, we can say that either of converters can’t work as both buck and boost inverters(dc-ac) or converters(ac- dc). This can be sorted out by coupling the source and load with a z-source network. By using the impedance-source (z-source) bridge network, the input supply will be connected to both inductor and capacitor, which allows the circuit to be identical even with a voltage-source or a current-source as its supply [11].

A basic converter with the x-shaped z-source network is shown in Figure 2.4(a) with its implementations as a dc-dc, ac-ac, ac-dc, and dc-ac power convertor, whereas the same is depicted in Figure 2.4(b) by reframing the x-shaped z-source network to the z-source bridge network . Drawbacks in multilevel vsi can be eliminated and counteracted by using this z-source bridge network. Practically, in a multilevel vsi switches in the same leg cannot turn-on or turn-off consecutively. Due to natural or human error or by

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Figure 2.4: Circuit of the basic framework of a z-source converter/inverter for all types of power conversions. (a) Circuit with the z-source x-shaped network. (b) Circuit with the z-source bridge network. occurrence of electromagnetic interference EMI noise the switches in the same leg can be misgated and turned-on at same time, which is called shoot-through state.

This state will deeply aﬀects the reliability of the converter. Preventive measures such as usage of dead time to dodge this shoot-through state will leave its residue as waveform distortion, etc. This can be avoided by using z-source bridge network in vsi, which can be observed in below Figure 2.5 [11], [1], and [12].

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Figure 2.5: Circuit of multi-level inverter with z-source bridge network at shoot- through state. (a) Circuit, when the switch is on. (b) Equivalent circuit, when the switch is on.

Whenever the switch of single-level converter/inverter (or) switches of the same single leg of multi-level converter/inverter with the z-source bridge network is misgated or turned-on, then the supply will be disconnected from the load. The circuit survives this shoot through state, as the z-network is transformed into a two parallel lc networks connected in series forming a loop with input supply instead of forming

9 a shortcut path for input current in the circuit. This can be seen in the Figure 2.5(a)

and (b).

In multi-level current-fed inverters at least one upper switch and one lower switch has to be turned-on or else the current ﬂow will be stalled, which provides open circuit condition for dc inductor. This will lead to the reduction of converter reliability. To compensate this error, overlap time is added, which also leaves distortion of waveform as an aftertaste. This limitation can be superseded by using the z-source bridge network in CSI and the same can be depicted from Figure 2.6 [11], [1], and [12].

Whenever the switch of single-level converter/inverter (or) switches of the same single leg of multi-level converter/inverter is turned-off due to misgating, the circuit survives this non-shoot through state. As z-source network is a bridge network, it provides a path for the current from input to load. Thus by eliminating the open circuit condition, reliability is increased and wave distortion is nulliﬁed. This can be seen in the Figure 2.6(a) and (b).

Conceptually to obtain a boosted output at vsi, which in-turn increases the com- plexity and power losses. In csi, economical and high eﬃcient switches are inoperable

as the diode has to be connected in series to barricade the reverse voltage [11], [1], and [12].

By using the z-source bridge network in vsi or csi, open or short circuit condition

doesn’t have any eﬀect load side or switch side. They can be interchanged and can be boosted or bucked based on the design. The electronic magnetic interference (EMI)

eﬀect on the converter reliability is warded oﬀ. It is a novel power conversion circuit

for all power conversions [11], [1], and [12].

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Figure 2.6: Circuit of multi-level inverter with the z-source bridge network at non- shoot-through state.. (a) Circuit, when the switch is off. (b) Equivalent circuit, when the switch is off.

2.3 PWM Z-Source DC-DC Converter with a Simpliﬁed Cir- cuit Representation

Figure 2.7 is a pwm dc-dc converter circuit, which is derived from the basic circuit framework of z-source converter/inverter for dc-dc, ac-ac, ac-dc, and dc-ac power conversions and can be seen in Figure 2.4.

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9 0 ;

U R ' ' R U ; ; U U

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0 7

4 2 R R R R U 4 R4 U 12 7 R

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Figure 2.7: Circuit of the pwm dc-dc converter with z-source x-shaped network.

2.4 Transﬁguration of PWM Z-Source DC-DC Converter circuit to a Circuit of Simpliﬁed Bridge Network Represen- tation

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A 1 R R L

1 I K F U U 0 F

J 0 0 I ?@ U J R R

Figure 2.8: Simpliﬁed circuit representation of pwm z-bridge source dc-dc converter.

This segment discusses about the physical transﬁguration of pwm z-source x- shaped converter to a bridge network representation. The simpliﬁed circuit represen-

12 tation of z-source dc-dc converter can be seen in Figure 2.8. This simpliﬁed circuit is obtained by expanding the nodes ”Q” & ”S” such that the switch and lcr circuit can be embedded in the z-source network. The dotted lines in Figure 2.8 represents as single nodes in 2.7. Steady state analysis of this network is discussed in the following chapter.

13 3 Steady-State Analysis of PWM Z-Bridge Source DC-DC Converter in CCM

3.1 Circuit description of a PWM Z-Bridge Source Con- verter

Figure 3.1 shows the circuit of a pwm z-bridge source dc-dc converter, which consists

of three inductors L1, L2, and Lf , three capacitors C1, C2, and Cf , and a load

resistance RL. From which inductors L1 and L2 and capacitors C1, and C2 are

connected in a unique pattern such that a z-bridge source network can be formed. Lf and Cf acts as ﬁlter components that are connected to a switch, which is operating at

constant switching frequency fs. Load resistance RL is connected in parallel to ﬁlter capacitor Cf . The dc input voltage supply is connected in series with a diode, which are connected to the LC bridge (z-bridge source network) as depicted in Figure 3.1. The switch and diode are turned on and oﬀ based on the duty cycle D [2].

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Figure 3.1: Circuit of a pwm z-bridge source dc-dc converter.

3.2 Assumptions

The following assumptions have been considered based on the analysis in [2] and [13]

14 1. All the passive components like inductors, capacitors, and resistors are consid-

ered as linear, time-invariant and frequency-independent.

2. The off-state resistance of the transistor and the diode is inﬁnity respectively.

3. The diode is represented as the linear battery. The on-state resistance of the

transistor is linear and in the diode as forward resistance.

4. The diode junction capacitance, the output capacitance of the transistor, and the lead inductances are neglected, and therefore losses across the switch are

neglected.

5. Storage-time modulation of the transistor is neglected.

Estimating the inductors L1 and L2 are equal (L1 = L2 = L) and the capacitors

C1 and C2 are equal (C1 = C2 = C) forms a symmetrical impedance network. Due to the symmetry of an impedance network (z-network), the voltage across capacitors and the voltage across inductors are equal.

vC1 = vC2 = vC , (3.1)

vL1 = vL2 = vL, (3.2)

where vC , vC1 , and vC2 are voltages across the z-network capacitors (C, C1, and C2

respectively) and vL, vL1 , and vL2 are voltages across the z-network inductors (L, L1, and L2 respectively). Currents ﬂowing through z-network inductors will be same because the voltages across the inductors are same. Current ﬂow in the circuit is highlighted (in gray color).

iL1 = iL2 = iL, (3.3)

where iL, iL1 , and iL2 are the currents ﬂowing through the z-network inductors.

15 1

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a 0

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b 0 0 [\ U e R R

Figure 3.2: Circuit of the pwm z-bridge source dc-dc converter with identical z- network inductors and capacitors.

3.3 Shoot-Through State (Time Interval 0

Figure 3.3 shows the equivalent circuit of the pwm z-bridge source dc-dc converter, when the switch is in on state. Switch turns on at t = 0, which in turn creates a reverse bias condition for diode and isolates the load from the supply. By applying

hk k 0 1 U hk R g 1 U h R 0

1 m

h k

g g R U R f U 1 U U

j k

k h 0 l

U i R

1 1 R R h g R U 0 h

g QQ] U R

Figure 3.3: Circuit of the pwm z-bridge source dc-dc converter, when switch is on and diode is off.

16 Kirchhoﬀ current law in Figure 3.3, switch current can be given as

iS = 2iL − iLf (3.4)

Figure 3.3 is simpliﬁed for the better understanding of the equations that are to be derived and that circuit can be seen in Figure 3.4.

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^H_

Figure 3.4: pwm z-bridge source dc-dc converter at shoot-through state. (a) Equiv- alent circuit with Kirchoﬀ current loops, when the switch is on and diode is off. (b) Equivalent circuit with the ﬁlter circuit replaced with dc current source iLf . (c) Equivalent circuit with the two z-network inductor L and capacitor C network are replaced with two ac current sources iL

In shoot through state, the switch will be in on-state i.e., z-bridge source network is short circuited. This can be observed from Figure 3.3. Due to which z-network inductors and capacitors will form two parallel lc networks with a circulating currents in it, which can be observed from Figure 3.4. Voltage across the z-network inductor is di v = V = L L . (3.5) L C dt Current through z-network inductor is

t t 1 VC iL(t)= vLdt + iL(0) = 1dt + iL(0). (3.6) L Z0 L Z0 Peak current of z-network inductor occurs at t = DT i.e.,

V i (DT )= C (DT ) + i (0). (3.7) L L L

The peak-to-peak current of z-network inductor is formulated as

DVO ∆iL = iL(DT ) − iL(0) = , (3.8) fsL

18 where VO is the output voltage across the load resistor. Diode will be oﬀ in shoot-through state because it is in reverse bias. The voltage across the diode can be deduced by applying Kirchhoﬀ voltage law for the series loop of input voltage, the diode, and two parallel LC networks from Figure 3.4, which can be expressed as

vD = VI − 2VC , (3.9) where VI is the input dc voltage. An isolated parallel LCR/output ﬁlter network will be formed, whenever the switch is in on-state. Voltage across the ﬁlter inductor is

diL v = −V = −V = L f . (3.10) Lf C O f dt

Current through ﬁlter inductor is

t 1 VO iLf (t)= vLf dt + iLf (0) = − t + iLf (0). (3.11) Lf Z0 Lf The peak-to-peak current of ﬁlter inductor at t = DT is

DVO ∆iLf = iLf (DT ) − iLf (0) = . (3.12) fsLf

3.4 Non Shoot-Through State (Time Interval DT

Figure 3.5 represents the rearranged bridge circuit of pwm z-bridge source dc-dc converter, when the switch is in off-state. Switch turns off at t = DT , which in

turn creates a forward bias condition for the diode and the input voltage supply is now connected to the load resistor through z-network.

By using Kirchhoﬀ voltage law in the loop of input voltage supply, z-network

inductor and capacitor, we obtain voltage across the inductor in z-network as

di v = V − V = L L . (3.13) L I C dt

19 ' 1 R U

1 R U R ' 1' U I D 0 U U ' R

R 1 R U

U ~ 4 R R

U R

Figure 3.5: Circuit of the pwm z-bridge source dc-dc converter, when the switch is off & the diode is on. 1

1 U0 R 1 R U 0

R U

R U 1 Y1 1C V` U U 1`H%1

1 R R

R U QQ] 0 RV 1Q`@ QQ] U R

Figure 3.6: Simpliﬁed circuit of the pwm z-bridge source dc-dc converter with Kir- choﬀ voltage loops, when the switch is off and the diode is on.

Current through z-network inductor is

t 1 VI − VC iL(t)= vLdt + iL(0) = (t − DT ) + iL(DT ). (3.14) L ZDT L

U0 R 1 1 R U

0 1

U R R U U

1 Y1 U

1 R R 1 R U 0

U R

Figure 3.7: Equivalent circuit of the pwm z-bridge source dc-dc converter with the ﬁlter circuit is replaced with a dc current source, when the switch is off and the diode is on. 1

£ £

1 1

1 ¢

QQ] R

R U 1 Y1 U

£ 1 ¡ R U

QQ]

1 R

Figure 3.8: Circuit of the pwm z-bridge source dc-dc converter with Kirchoﬀ current loops, when the switch is off and the diode is on.

21 Peak current of z-network inductor occurs at t = T is

V − V i (T )= I C T (1 − D) + i (DT ). (3.15) L L L

The peak-to-peak current of z-network inductor is formulated as

V − V ∆i = i (T ) − i (DT )= I C T (1 − D). (3.16) L L L L

Applying KVL across the z-network inductor, capacitor, and switch in shoot- through state of this converter

di v = V − v = L L . (3.17) S C L dt

By substituting equation (3.13) in equation (3.17), the voltage across the switch can be given as

vS = 2VC − VI . (3.18)

From Figure3.8, the voltage across the switch is same as the voltage across the whole output/ﬁlter network and that relation can be depicted as

vS = VLf + VO. (3.19)

Using (3.18) in the above equation (3.19) can be transformed as

vLf = 2VC − (VI + VO). (3.20)

¨©

¥ ¦

« ®«

¥ ¦ ¦

« ® ±«

ª²

³ µ

±« ® « ® «

¬ ´

¥ ¦

® « ´

Figure 3.9: Voltage waveforms of the z-bridge source dc-dc converter in ccm.

Ä ÃÄ Ä Ç

Æ Å Æ

È È

ÀÁ

¼¸ ½¸

¹ ¾

ÀÁ

½ É ½ ½

Ä Ã Ä Ã Ä Ä ÇÇ

¹¿

¾ ¾

Æ Å

È È

Á ÀÁ

Figure 3.10: Current waveforms of the z-bridge source dc-dc converter in ccm.

Using (3.28) and (3.20), the voltage across the ﬁlter inductor can be given as

diL v = V − V = L f . (3.21) Lf O I f dt

Current through ﬁlter inductor by using equation (3.21) is

t 1 (VO − VI ) iLf (t)= vLf dt + iLf (0) = − (t − DT ) + iLf (DT ). (3.22) Lf Z0 Lf The peak-to-peak current of ﬁlter inductor at t = T is

(VO − VI ) ∆iLf = iLf (T ) − iLf (DT )= (1 − D). (3.23) fsLf

24 3.5 DC Voltage Transfer Function (MV DC)

As per Faraday’s law of electromagnetic induction, the voltage across an inductor can be formulated as di v = L L , L dt 1 t vLdt + iL(0) = iL(t), L Z0 At t = T , 1 T iL(T ) − iL(0) = vLdt. (3.24) L Z0

For steady state condition iL(T ) = iL(0)

T vLdt = 0. (3.25) Z0 By using volt-second balance as referred in equation (3.25) for an inductor, we can procure the DC voltage transfer function of the z-bridge source dc-dc converter.

From (3.5), (3.13), and (3.25) [2]

DT T vL(t)dt + vL(t)dt = 0, Z0 ZDT

VC T (D)+(VI − VC )T (1 − D) = 0, ′ VC 1 − D D = = ′ , (3.26) VI 1 − 2D D − D where D′ = 1 − D. The capacitor-input dc voltage transfer function of the pwm

z-bridge source dc-dc converter is given in the equation (3.26) from, which we can

derive the output-input dc voltage transfer function of thepwm z-bridge source dc- dc converter.

By applying Kirchhoff voltage law KVL to loop containing filter inductor Lf , z- network capacitor C, inductor L, and load resistor RL from figure 3.2, the relation between the z-network capacitor voltage VC and the output voltage VO is given by

VC − vLf − VO − vL = 0, (3.27)

25 since the average voltage across the inductors is zero i.e., vLf = 0 and vL = 0. By substituting these values in equation (3.27), we obtain

VC = VO. (3.28)

By substituting equation (3.28) in equation (3.26), the relation between output voltage and input voltage i.e., dc voltage transfer function of the pwm z-bridge source dc-dc converter can be depicted as is

′ VO 1 − D D MV DC = = = ′ . (3.29) VI 1 − 2D D − D

26 4 Derivations of Expressions for Passive Compo- nents

4.1 Minimum Inductance of Z-Network Inductor to Operate in CCM

To calculate the minimum inductance of z-network inductor, the boundary condition

at which iL(0) = 0 has to be considered. The input dc current is equal to dc current ﬂowing in z-network inductor [2] and i.e.,

δiL VOD IIB = ILB = = . (4.1) 2 2fsL

By considering the z-bridge source dc-dc converter as lossless converter, i.e.,

VI II = VOIO, a relation between input and output currents by using MV DC function from the equation (3.29) can be derived. The input-output current conversion ratio in terms of the duty cycle is

′ IO VI 1 − 2D D − D = = = ′ , (4.2) II VO 1 − D D where D′ = 1 − D.

Using equations (4.1) and (4.2), ccm/dcm boundary output current in terms of duty cycle is expressed as

D(1 − 2D)VO IOB = . (4.3) 2(1 − D)fsL For ccm/dcm boundary condition, load resistance in terms of duty cycle can be formulated as 2(1 − D)f L R = s . (4.4) LB D(1 − 2D)

Substituting IOBmax = IOmin = VO/RLmax in (4.3), the minimum inductance of z- network inductance to operate in ccm is expressed as

D(1 − 2D) RLmax L > Lmin = . (4.5) (1 − D) 2fs

27 X: 0.293 0.18 Y: 0.1716

0.16

0.14 CCM

0.12 )] f L s

f 0.1 DCM /(2 O V 0.08 /[ OB I 0.06

0.04

0.02

0 0 0.05 0.1 0.15 0.2 0.25 0.293 0.35 0.4 0.45 0.5 D

Figure 4.1: ccm/dcm boundary of pwm z-bridge source dc-dc converter for normalized load current with respect to z-network inductance as a function of duty cycle.

35 )

L 30 DCM s f 25 /(2 LB

R 20

10 X: 0.3 Y: 5.833 5 CCM

0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 D

Figure 4.2: ccm/dcm boundary of pwm z-bridge source dc-dc converter for normalized load resistance with respect to z-network inductance as a function of duty cycle.

28 4.2 Minimum Inductance of Filter Inductor to Operate in CCM

In equations (3.11) and (3.12), the inductor current at the initial state is zero iLf (0) = 0 at ccm/dcm boundary condition and they are rewritten as

DVO ∆iLf = iLf (DT )= , (4.6) fsLf

where δiLf is the peak-to-peak/peak current of ﬁlter inductor at t = DT . As the ﬁlter inductor dc current is equal to the output dc current, the output dc current is formulated as

∆iLf DVO ILf B = IOB = = . (4.7) 2 2fsLf Load resistance in terms of duty cycle and ﬁlter inductance can be expressed as

2f L R = s f . (4.8) LB D

As we know IOBmax = IOmin = VO/RLmax , by using it in the equation (4.7). For ccm operation, the minimum inductance of ﬁlter inductance is

DRLmax Lf > Lfmin = . (4.9) 2fs

From equations 4.3 and 4.7, the interpretation of ccm/dcm boundary condition in terms of z-network and ﬁlter inductance as a function of duty cycle can be formulated as L 1 − D f = . (4.10) L 1 − 2D

29 0.5

0.45

0.4

0.35 X: 0.3

)] Y: 0.3 f L

s 0.3 CCM f /(2

O 0.25 V

/[ 0.2 OB I 0.15

0.1 DCM

0.05

0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 D

Figure 4.3: ccm/dcm boundary of pwm z-bridge source dc-dc converter for normalized load current with respect to ﬁlter inductance as a function of duty cycle.

35 ) f 30

L DCM s f 25 /(2 LB

R 20

10 X: 0.3 Y: 3.333 5 CCM

0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 D

Figure 4.4: ccm/dcm boundary of pwm z-bridge source dc-dc converter for normalized load resistance with respect to ﬁlter inductance as a function of duty cycle.

30 102 min

L 1 / 10 CCM min f L

X: 0.3 Y: 1.75 DCM

100 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 D

Figure 4.5: ccm/dcm boundary of pwm z-bridge source dc-dc converter for normalized ﬁlter inductance with respect to z-network inductance as a function of duty cycle.

4.3 Minimum Capacitance Values for Z-Network and Filter Capacitors in CCM 4.3.1 Minimum Capacitance of Z-Network Capacitor in CCM at Shoot- Through State (0

Current ﬂowing through the z-network capacitor is

−iL(t), 0

∆i i = − L (t). (4.13) C DT

31 The voltage ripple across the z-network capacitor ESR is

vrC = −rC iC , (4.14)

substitute iC value from the (4.13) in (4.14), then ∆i v = r L (t). (4.15) rC C DT The voltage across the z-network capacitor is

t ′ 1 vC = iC dt + vC (0), (4.16) C Z0 by substituting (4.13), in the above equation (4.16) and by integrating it we get 1 ∆i t2 v′ = − L + v (0). (4.17) C C DT 2 C Total voltage across the z-network capacitor in shoot-through state is ∆i 1 ∆i t2 v = v + v′ = r L (t) − L . (4.18) C rC C C DT C DT 2 Considering the maximum voltage at the capacitor, which is at t = DT for 0 < t ≤

DT case. The derivative of z-network capacitance voltage with respect to time for 0

tmax = CrC , (4.20)

The maximum voltage at z-network occurs at t = DT . By substituting this in (4.19), we obtain

DT = CrC , (4.21)

The minimum capacitance value of the z-network capacitor, which can be obtained

from (4.21) is given as

Dmax Cmin(on) = . (4.22) fsrC

32 4.3.2 Minimum Capacitance of Z-Network Capacitor in CCM at Non Shoot-Through State (DT

In non shoot-through state i.e., DT

is given by

VC iC = −(iL − II )= − (t) − II , (4.23) L

from (3.7), iC in (4.23) can be written as

∆i ∆i i = L − L (t). (4.24) C 2 DT

Voltage ripple across the z-network capacitor esr is

vrC = rC iC , (4.25)

substitute iC value from the (4.23) in (4.24), then

1 t vrC = rC ∆iL − . (4.26) 2 DT Voltage across the z-network capacitor is

t ′ 1 vC = iC dt + vC (0), (4.27) C Z0 by substituting (4.24) in the above equation and integrating it, we obtain

2 ′ ∆iL t t vC = − + vC (0). (4.28) C 2 2DT !

The total voltage across the z-network capacitor is

2 ′ rC rC t t vC = vrC + vC =∆iL − t − − . (4.29) 2 DT 2C 2CDT !

Consider the minimum voltage at the capacitor, which is at t = T for DT

t ≤ T is

dvC rC 1 t =∆iL − − . (4.30) dt DT 2C CDT 33 Equating the above derivative to zero, time at which the minimum capacitor voltage

VC we obtain is DT t = Cr + . (4.31) max C 2 The minimum capacitance can be obtained when t = T is

(2 − Dmin) Cmin(off) = . (4.32) 2fsrC

The minimum value of z-network capacitance for 0

Dmax (2 − Dmin) C ≥ Cmin = max(Cmin(on),Cmin(off))= max , , (D< 0.5) (4.33) " fsrC 2fsrC # as D< 0.5 from ﬁgure 4.11, we can deduce Cmin from the above equation (4.33) as

(2 − D ) ≥ min C Cmin = Cmin(off) = . (4.34) 2fsrC

The minimum capacitance of the ﬁlter capacitor can be given as [2]

Dmax Cf ≥ Cfmin = . for (Dmin + Dmax) > 1 (4.35) 2fsrC and

1 − Dmin Cf ≥ Cfmin = . for (Dmin + Dmax) < 1 (4.36) 2fsrC

4.4 Design Example and Simulation Results

Consider a pwm z-bridge source dc-dc converter with the speciﬁcations VImin =

18 V, VInom = 20 V,VImax = 22 V, VO = 35 V,IOmin = 1 A,IOmax = 10 A, fs =

100 kHz, rC = 0.22 Ω, rCf = 0.02 Ω,Lf = 33 µH,Cf = 82 µF, and L1 = L2 = 33 µH are selected. which Cmin can be calculated from (4.33) as

34 56u

47u 56u

irf520 d

mbr10100 35 s 82u v_pulse 56u 20 initial:0

47u pulse:12 v_dc

Figure 4.6: Variation in eﬃciency η as a function of output current IO of z-bridge source dc-dc converter

The minimum and maximum output power values are

POmin = VOIOmin = 35 × 1 = 35 W (4.37)

and

POmax = VOIOmax = 35 × 10 = 350 W. (4.38)

The minimum and maximum resistances at load are

VO 35 RLmin = = = 3.5 Ω (4.39) IOmax 10 and

VO 35 RLmax = = = 35 Ω. (4.40) IOmin 1 The minimum, nominal, and maximum values of dc output-to-input voltage transfer function are

VO 35 MV DCmin = = = 1.59, (4.41) VImax 22

VO 35 MV DCnom = = = 1.75, (4.42) VInom 20

35 and

VO 35 MV DCmax = = = 1.94. (4.43) VImin 18 Assume that the converter eﬃciency η is 100%. Hence, the minimum, nominal, and maximum values of the duty cycle are

MV DCmin − η 1.59 − 1 Dmin = = = 0.271, (4.44) 2MV DCmin − η (2 × 1.59) − 1

MV DCnom − η 1.75 − 1 Dnom = = = 0.301, (4.45) 2MV DCnom − η (2 × 1.75) − 1 and

MV DCmax − η 1.94 − 1 Dmax = = = 0.327. (4.46) 2MV DCmax − η (2 × 1.94) − 1 The minimum z-network inductance that ccm operation is ensured at any duty cycle

RLmax 35 Lmin = 0.0858 = 0.0858 5 = 30 µH. (4.47) fs 10 Pick L = 33 µH.

The minimum ﬁlter inductance that ccm operation is ensured at any duty cycle

is L 1 − D f = . (4.48) L 1 − 2D The minimum ﬁlter inductance that ccm operation is ensured at any duty cycle is

DmaxRLmax 0.327 × 35 Lfmin = = 5 = 57.225 µH. (4.49) 2fs 2 × 10

Pick Lf = 68 µH. For the above range of duty cycle, the maximum value of z-network and ﬁlter

inductor ac ripple peak-to-peak current will be at Dnom = 0.3 and i.e.,

VODnom 35 × 0.3 ∆iLmax = = 5 − = 3.2 A. (4.50) fsL 10 × 33 × 10 6

VODnom 35 × 0.3 ∆iLfmax = = 5 − = 0.772 A. (4.51) 2fsLf 2 × 10 × 68 × 10 6

36 The voltage stresses of the mosfet and the diode are

VSMmax = 2VO − VImax = 2 × 35 − 22 = 48 V. (4.52)

VDMmax = VImax = 22 V. (4.53)

The current stresses of the mosfet and the diode are

DmaxIOmax ISMmax = +∆iLmax − ∆iLfmax /2 1 − 2Dmax 0.327 × 10 = + 3.2 − 0.386 (4.54) 1 − (2 × 0.327) = 12.265 A.

1 − Dmax IDMmax = IImax = IOmax 1 − 2Dmax 1 − 0.327 = 10 × (4.55) 1 − 2 × 0.327 = 19.45 A. The minimum z-network capacitance that ccm operation is ensured at any duty cycle is

2 − Dmin 2 − 0.1 Cmin = = 5 = 43.2 µF. (4.56) 2fsrC 2 × 10 × 0.22

Pick C ≥ Cmin = 56 µF. The minimum ﬁlter capacitance that ccm operation is ensured at any duty cycle is

1 − Dmin 1 − 0.1 Cfmin = = 5 = 182.3 µF. (4.57) 2fsrC 2 × 10 × 0.02

Pick C ≥ Cmin = 220 µF.

37 Voltage and power waveform of Z−source dc−dc converter

(W) : t(s)

33.5

Output power

33.4

Ave: 33.371 (W)

33.3

33.2

(W) : t(s)

100.0

Input power

Ave: −37.147

0.0 (W)

−100.0

−200.0

(V) : t(s)

34.25

Ave: 34.176 34.2 (V)

34.15

34.1

18.86m 18.88m 18.9m 18.92m

t(s)

Figure 4.7: Power and output voltage waveforms of pwm z-bridge source dc-dc converter in ccm.

Z−network and filter inductor currents of Z−source converter

(A) : t(s)

2.0

i(Lf)

1.0 (A)

0.0

Minimum: 0.18039

−1.0

(A) : t(s)

4.0

i(Lz)

3.0

2.0 (A)

1.0

Minimum: 0.80864

0.0

18.86m 18.88m 18.9m 18.92m

t(s)

Figure 4.8: Current waveforms of z-network inductor and ﬁlter inductor of pwm z-bridge source dc-dc converter in ccm.

38 4.5 Eﬃciency, Power Losses, and DC Voltage Conversion Factor of Z-Bridge Source DC-DC Converter

Equivalent circuit of pwm z-bridge source dc-dc converter of components with all

parasitic resitances is considered. The individual component power loss of pwm z- bridge source dc-dc converter is estimated below [2]

The conduction power loss at mosfet on-resistance is

2 2 IO PODrDS PrDS = IS(RMS)rDS = 2 DrDS = 2 . (4.58) (1 − 2D) (1 − 2D) RL

Converter switching loss with an assumption of linear output capacitance of mosfet is f C V 2 f C P R P = s f O = s f O L . (4.59) sw 2 2 Total power loss in the mosfet is

PODrDS fsCf PORL PFET = PrDS + Psw = 2 + . (4.60) (1 − 2D) RL 2

Power loss due to diode forward resistance is

3 3 2 (1 − D) 2 (1 − D) RF PRF = ID(RMS)RF = 2 IORF = 2 PO. (4.61) (1 − 2D) (1 − 2D) RL

Power loss due to diode forward voltage drop is

2 2 (1 − D) (1 − D) VF PV F = VF ID = 2 IO = 2 PO. (4.62) (1 − 2D) (1 − 2D) VO

Total power loss in diode is

3 2 (1 − D) RF (1 − D) VF PD = PRF + PV F = 2 PO + 2 PO. (4.63) (1 − 2D) RL (1 − 2D) VO

Power loss in z-network inductor is

2 2 2 (1 − D) (1 − D) VF PrL = 2IL(rms)rL = 2 2 IO = 2 2 PO. (4.64) (1 − 2D) (1 − 2D) VO

39 Power loss in z-network capacitor is

2 D(1 − D)rC PrC = 2IC(rms)rL = 2 2 PO. (4.65) (1 − 2D) RL

Power loss in ﬁlter inductor is

2 rLf PrLf = IO(rms)rLf = 2 PO. (4.66) RL

Power loss in ﬁlter capacitor is

2 2 2 (VO − Vf ) (1 − D) PrC f = ICf (rms)rCf = 2 2 PO. (4.67) 12fS Lf

Substituting (3.29) in (4.62), ﬁlter capacitor power loss in terms of MV DC can be seen below 2 2 (MV DC − 1) (1 − 2D) RLrCf PrC f = 2 2 PO. (4.68) 12fS Lf Adding (4.60), (4.63), (4.64), (4.65), (4.66), and (4.68), we obtain the total losses in

pwm z-bridge source dc-dc converter and i.e.,

Ploss = PFET + PD + Pr + Pr + Pr + Pr . (4.69) L C Lf Cf

By using (4.69), the eﬃciency of the pwm z-bridge source dc-dc converter with losses

is given by P V I 1 η = O = O O = . (4.70) P V I Ploss I I I 1+ PO By using losses, efficiency, and dc voltage transfer function equations, we obtain theoretical results i.e., figures (4.9 - 4.14) for efficiency variations as a function of input voltage, output current, and duty cycle.

40 0.9

0.8

0.7

0.6

0.5 η

0.4

0.3

0.2

0.1

0 0 5 10 15 20 25 V I (V)

Figure 4.9: Variation in eﬃciency η as a function of input voltage VI of pwm z-bridge source dc-dc converter.

0.9

0.8

0.7

0.6 η

0.5

0.4

0.3

0.2

0.1

0 0 20 40 60 80 100 120 140 160 180 200 R Ω L ( )

Figure 4.10: Variation in eﬃciency η as a function of load resistance RL of z-bridge source dc-dc converter.

41 1

0.9

0.8

0.7

0.6 η

0.5

0.4

0.3

0.2

0.1

0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 D

Figure 4.11: Variation in eﬃciency η as a function of to duty cycle D of z-bridge source dc-dc converter.

1.8

1.6

1.4

1.2

VDC 1 M 0.8

0.6

0.4

0.2

0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 D

Figure 4.12: Variation in dc voltage conversion factor MV DC as a function of duty cycle D of z-bridge source dc-dc converter.

42 0.48

0.46

0.44

0.42

D 0.4

0.38

0.36

0.34

0.32 0 5 10 15 I O (A)

Figure 4.13: Variation in duty cycle D as a function of output current IO of z-bridge source dc-dc converter.

0.9

0.8

0.7

0.6

0.5 η

0.4

0.3

0.2

0.1

0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 I 0 (A)

Figure 4.14: Variation in eﬃciency η as a function of output current IO of z-bridge source dc-dc converter.

43 5 Plant Characteristics of PWM Z-Bridge Source DC-DC Converter in CCM

5.1 PWM Z-Bridge Source DC-DC Converter with Varying Duty Cycle

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4 7 ÚÛ ÜÝÞßÚàáâ

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çãßããÛ ÜÝÚßåæáâ èÚÛ ÜÝÚßàæáâ àÚÛ ÜÝÚßàæá

Figure 5.1: Circuit of the pwm z-bridge source dc-dc converter circuit with the varying duty cycle.

The mosfet gate of pwm z-bridge source dc-dc converter as shown in Figure

3.1 is connected to a pulse width modulator. It consists of an op-amp (acts as comparator) with the variable pulse generator (as reference voltage) and the triangular wave generator at its input terminals. This pulse width modulator is isolated from the pwm z-bridge source dc-dc converter by using an isolation transformer between

44 Votage and power waveforms of Z−source dc−dc converter with varying duty cycle

(W) : t(s)

1.0k

Input power

0.0 (W)

Ave: −34.315 Ave: −26.339 Ave: −19.588

−1.0k

(W) : t(s)

30.0

Output power

Ave: 28.739

20.0

Ave: 22.843

Ave: 17.721 (W)

10.0

0.0

(V) : t(s)

20.0

V_GS

0.0 (V)

duty: 0.19102 duty: 0.2938 duty: 0.24495

−20.0

(V) : t(s)

40.0 Ave: 31.701

20.0 Ave: 28.278

Ave: 24.914 (V)

0.0

0.0 10.0m 20.0m 30.0m 40.0m 50.0m 60.0m

t(s)

Figure 5.2: Gate-source voltage, output voltage, and power waveforms of the pwm z-bridge source dc-dc converter with the varying duty cycle. them. The circuit of pwm z-bridge source converter with the varying duty cycle depicted in Figure 5.1.

From Figures 5.1, 5.2, and 5.3 as the Vref varies, duty cycle changes with respect to it. As the duty cycle varied, the output voltage varies accordingly. The output voltage and output power decreases as the duty cycle decreases and that can be seen in Figure 5.2. Voltage across the capacitance also changes with the duty cycle.

45 Z−network capacitor and output voltage waveforms

(V) : t(s)

40.0

Ave: 31.701

30.0

Ave: 28.29

Ave: 24.902 20.0 (V)

10.0

0.0

(V) : t(s)

40.0

Ave: 32.651

30.0

Ave: 29.049 (V)

Ave: 25.527

20.0

10.0

0.0 10.0m 20.0m 30.0m 40.0m 50.0m 60.0m

t(s)

Figure 5.3: Z-network capacitor voltage and output voltage waveforms of the pwm z-bridge source dc-dc converter with the varying duty cycle.

5.2 PWM Z-Bridge Source DC-DC Converter With Varying Load Resistance

§¨ ¨

U0 R

' § U R '

¥ § 4 1 §

§ R U ¡ 'I 1'D U U U 4 §

¢£

¨ ¨

R U &4 R ¦ ÿ

§ 1

§ 4 U ýþ 4_ R ýþ R R

Figure 5.4: Circuit of the pwm z-bridge source dc-dc converter with the varying load resistance.

46 An external resistance with a mosfet in series is connected parallel to the load resistance of the pwm z-bridge source dc-dc converter as shown in Figure 3.1 to obtain the circuit of pwm z-bridge source converter with the varying load resistance as depicted in Figure 5.4. Based on the external mosfet on and off, the load resistance can be increased or decreased. Thus the circuit will operate for the varying load resistance.

Z−network capacitor and output voltage waveforms of Z−source converter

(V) : t(s)

40.0

Ave: 38.924

35.0

Ave: 35.204 Ave: 35.179

30.0 (V)

25.0

20.0

(V) : t(s)

40.0

Ave: 38.646

35.0

Ave: 34.883 Ave: 34.908

30.0 (V)

25.0

20.0

0.0 25.0m 50.0m 75.0m 0.1 0.125

t(s)

Figure 5.5: Z-network capacitor and output voltage waveforms of pwm z-bridge source dc-dc converter with the varying load resistance.

47 Power and output voltage waveforms of Z−source converter with varying load resistance

(W) : t(s)

200.0

Input power

0.0

Ave: −38.909 Ave: −37.87 Ave: −38.923 (W)

−200.0

−400.0

(V*A) : t(s)

60.0

Output power

Ave: 34.557 Ave: 34.606

40.0

Ave: 33.188 20.0 (V*A)

0.0

(V) : t(s)

40.0

Ave: 38.646

30.0 Ave: 34.883 Ave: 34.908 (V)

20.0

10.0

0.0 25.0m 50.0m 75.0m 0.1 0.125

t(s)

Figure 5.6: Power and output voltage waveforms of pwm z-bridge source dc-dc converter with varying load resistance.

From Figures 5.6 and 5.5 are the respective simulated plots of input and output

′ power, output voltage, and z-network capacitor voltage waveforms. If the VGS is high, load resistance will be low and viceversa. If the load resistance changes, the output voltage will be varying accordingly. The output voltage increases and output power stays nearly same as load resistance decreases and that can be seen in Figure 5.6.

Voltage across the z-network capacitor also changes with load resistance.

48 5.3 PWM Z-Bridge Source DC-DC Converter With Varying Input Voltage

The input voltage of the pwm z-bridge source dc-dc converter as shown in Figure

3.1 is changed from the constant dc supply to the variable dc supply to obtain the circuit of pwm z-bridge source converter with the varying input voltage as depicted in Figure 5.7. Based on the variations in input voltage, variations in output voltage, output power, and etc. are observed and plotted.

U0 R

' U R ' 4 1

R U 'I 1'D U U U 4

&4 R

R R U R ' U R R 4 U

4 U ¤ R R

Figure 5.7: Circuit of the pwm z-bridge source dc-dc converter with varying input voltage.

From Figures 5.7, 5.8, and 5.9 are the circuit of pwm z-bridge source dc-dc

converter with varying input voltage and its respective simulated plots of output

voltage,z-network capacitor voltage, input and output power waveforms. If the VI is high, output voltage will also be high as it is a boost converter. If the input voltage changes, the output voltage will vary accordingly in terms of duty cycle as derived in dc voltage conversion factor. The output voltage and output power increases as the input voltage increases and viceversa, but the output voltage will not be less than input voltage, and that can be seen in Figure 5.8. The voltage across the z-network capacitor also linearly change with respect to input voltage.

49 Output waveforms of Z−source converter with varying input voltage

(W) : t(s)

500.0

Input power

Ave: −44.592

0.0 (W)

Ave: −101.29

−500.0

(W) : t(s)

100.0 Ave: 80.142

Output power

Ave: 35.12

50.0 (W)

0.0

(V) : t(s)

Ave: 52.962

60.0

Output voltage

40.0

(V) Ave: 35.06

20.0

0.0

0.0 50.0m 0.1 0.15

t(s)

Figure 5.8: Power and output voltage waveforms of pwm z-bridge source dc-dc converter with the varying input voltage.

50 Output and Z−network capacitor voltage waveforms of Z−source dc−dc converter

(V) : t(s)

50.0

Ave: 47.349

40.0

Ave: 31.332

30.0 (V) Ave: 31.511

20.0

10.0

(V) : t(s)

50.0

Ave: 48.736

40.0

Ave: 32.249 (V)

30.0

Ave: 32.434

20.0

0.0 25.0m 50.0m 75.0m 0.1 0.125

t(s)

Figure 5.9: Z-network capacitor and output voltage waveforms of pwm z-bridge source dc-dc converter with the varying input voltage.

51 6 Conclusion

6.1 Summary

1. Complete steady-state analysis of Z-source bridge dc-dc converter operating in ccm is elaborated.

2. DC voltage and current gain is derived and plotted in terms of duty cycle using

matlab.

3. Expressions and plots of z-network and ﬁlter inductor currents for the boundary

condition of ccm anddcm.

4. Minimum z-network and ﬁlter inductances and all other parameters that are required to design a ccm operating z-source bridge dc-dc converter.

5. By using boundary output current expressions, the relation between z-network

and ﬁlter inductances is established in terms of duty cycle.

6. Minimum capacitance of z-network capacitor is derived by using voltage and

current waveforms of z-network capacitor.

7. Based on the theoretical analysis, pwm z-source bridge dc-dc converter is designed and simulations are performed in saber.

8. The output voltage obtained in simulations are in good agreement with theo-

retical results.

9. By using power loss expressions of all z-source bridge dc-dc converter compo-

nents, plots for overall eﬃciency and dc voltage gain (lossy) in terms of duty

cycle are embedded in this thesis.

10. From the plots of eﬃciency and dc voltage gain, the optimum range of duty

cycle is observed between 0.1 and 0.35.

52 11. Plant characteristics of pwm z-source dc-dc converter i.e., simulations of pwm

z-source dc-dc converter with varying load, the varying input voltage and

varying duty cycle are performed and results are presented.

6.2 Future Work

Pwm z-source bridge dc-dc converter has a potential to play major in renewable energy applications and distributed power generation systems. There is a huge scope of improvement of this converter. Small signal analysis of pwm z-source bridge dc- dc converter can be done. Controller for this converter is also essential, which can also be designed. Multilevel pwm z-source bridge dc-dc converter topology is also possible with this converter.

6.3 Thesis Contributions

1. Complete steady-state analysis of z-source bridge dc-dc converter to operate

in ccm and it’s working is elucidated, using circuit analysis with reference to the current ﬂow in the circuit.

2. Expressions and plots of the ﬁlter and the z-network inductor currents for the boundary condition of ccm and dcm.

3. Derivation of Minimum Filter inductance and the relation between z-network and ﬁlter inductances is established in terms of the duty cycle.

4. The plot between normalized minimum ﬁlter inductance with respect to z-

network inductance as a function of duty cycle is plotted to determine the ccm/dcm boundary condition of z-source bridge dc-dc converter using mat-

lab.

5. Using voltage and current waveforms of z-network capacitor the minimum ca-

pacitance of the z-network capacitor is derived.

53 6. From the plots of eﬃciency and dc voltage gain, the optimum range of duty

cycle is observed between 0.1 and 0.35.

7. Plant characteristics of pwm z-source dc-dc converter i.e., simulations of pwm z-source dc-dc converter with varying load, varying input voltage and varying

duty cycle are performed and results are presented.

54 7 Bibliography References

[1] F. Z. Peng, “Z-Source Inverter,” in Proc. 37th IEEE Industrial Applications Con- ference, vol. 2, pp. 775-781, October 2002.

[2] V. P. Galigekere and M. K. Kazimierczuk, “Analysis of PWM Z-Source DC-DC

Converters,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 4, pp. 854-863, April 2012.

[3] V. P. Galigekere and M. K. Kazimierczuk, “Small-Signal Modeling Z-Source

Converter by Circuit-Averaging Technique,” IEEE Transactions on Power Elec- tronics, vol. 28, no. 3, pp. 1286-1296, March 2013.

[4] F. Z. Peng, “Z-Source Inverter,” IEEE Trans. Ind. Appl., vol. 39, no. 2, pp.

504-510, March/April 2003.

[5] F. Z. Peng, X. Yuan, X. Fang, and Z. Qian, “Z-Source Inverter for adjustable

speed drives,” IEEE Transactions on Power Electronics, vol. 1, no. 2, pp. 33-35,

June 2003.

[6] F. Z. Peng, A. Joseph, J. Wang, M. Sheng, L. Chen, Z. Pan, E. O. Rivera, and Y. Huang, “Z-Source Inverter for motor drives,” IEEE Transactions on Power

Electronics, vol. 20, no. 4, pp. 857-863, July 2005.

[7] Y. P. Siwakoti, F. Z. Peng, F. Blaabjerg, P. C. Loh, and G. E. Town, “Impedance- Source Networks for Electric Power Conversion Part I: A Topological Review,”

IEEE Transactions on Power Electronics, vol. 30, no. 2, pp. 699-716, February

2015.

55 [8] Y. P. Siwakoti, F. Z. Peng, F. Blaabjerg, P. C. Loh, G. E. Town, and S. Yang,

“Impedance-Source Networks for Electric Power Conversion Part II: Review of

Control and Modulation Techniques,” IEEE Transactions on Power Electronics, vol. 30, no. 4, pp. 1887-1906, April 2015.

[9] Jie Zhang and Jing Ge, “Analysis of PWM Z-Source DC-DC Converter in

Discontinuous conduction mode,” Power and Energy Engineering Conference (APPEEC), 2010 Asia-Paciﬁc, pp. 1-4, March 2010.

[10] Yushan Liu, Haitham Abu-Rub, and Baoming Ge, “Z-Source/Quasi-Z-Source

Inverters,” IEEE Industrial Electronics Magazine, pp. 32-44, December 2014.

[11] L. L. Fang and Hong Ye, Advanced DC/AC Inverters: Applications in Renewable Energy. CRC Press,2013, 322 pages,hardback, ISBN-13:978-1-4665-1135-4

[12] Y. Tang, S. Xie, and C. Zhang, “New Structure and Topological Derivation of

Z-Source Converters,” in Proc. 4th IEEE Conference Industrial Electronics and Applications (ICIEA), pp. 788-793, May 2009.

[13] M. K. Kazimierczuk, Pulse-Width Modulated DC-DC Power Converters. 2nd Edi-

tion, John Wiley and Sons: UK, 2016.

[14] M. K. Kazimierczuk, Radio-Frequency Power Ampliﬁers. 2nd Edition, John Wiley

and Sons: West Sussex, UK, 2015.

[15] O. J. Zobel, Phase-shifting network. US patent 1 792 523, ﬁled 12 March 1927, issued 17 Feb 1931.

[16] O. J. Zobel, Distortion Compensator. US patent 1 701 552, ﬁled 26 June 1924,

issued 12 Feb 1929.

56 [17] S. Wang, X. Wei, and H. Dai, “Optimization Design and Power Regulation of

Vehicle-Mounted Wireless Power Transfer System”, IEEE Transactions on Power

Electronics, vol. 27, no. 6, pp. 2947-2957, March 2013.