Atlantic Scup Trawl Fishery MSC Fishery Assessment Report
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Hardware Configuration with Dynamically-Queried Formal Models
Master’s Thesis Nr. 180 Systems Group, Department of Computer Science, ETH Zurich Hardware Configuration With Dynamically-Queried Formal Models by Daniel Schwyn Supervised by Reto Acherman Dr. David Cock Prof. Dr. Timothy Roscoe April 2017 – October 2017 Abstract Hardware is getting increasingly complex and heterogeneous. With different compo- nents having different views of the system, the traditional assumption of unique phys- ical addresses has become an illusion. To adapt to such hardware, an operating system (OS) needs to understand the complex address translation chains and be able to handle the presence of multiple address spaces. This thesis takes a recently proposed model that formally captures these aspects and applies it to hardware configuration in the Barrelfish OS. To this end, I present Sockeye, a domain specific language that uses the model to de- scribe hardware. I then show, that code relying on knowledge about the address spaces in a system can be statically generated from these specifications. Furthermore, the model is successfully applied to device management, showing that it can also be used to configure hardware at runtime. The implementation presented here does not rely on any platform specific code and it reduced the amount of such code in Barrelfish’s device manager by over 30%. Applying the model to further hardware configuration tasks is expected to have similar effects. i Acknowledgements First of all, I want to thank my advisers Timothy Roscoe, David Cock and Reto Acher- mann for their guidance and support. Their feedback and critical questions were a valuable contribution to this thesis. I’d also like to thank the rest of the Barrelfish team and other members of the Systems Group at ETH for the interesting discussions during meetings and coffee breaks. -
Message Passing for Programming Languages and Operating Systems
Master’s Thesis Nr. 141 Systems Group, Department of Computer Science, ETH Zurich Message Passing for Programming Languages and Operating Systems by Martynas Pumputis Supervised by Prof. Dr. Timothy Roscoe, Dr. Antonios Kornilios Kourtis, Dr. David Cock October 7, 2015 Abstract Message passing as a mean of communication has been gaining popu- larity within domains of concurrent programming languages and oper- ating systems. In this thesis, we discuss how message passing languages can be ap- plied in the context of operating systems which are heavily based on this form of communication. In particular, we port the Go program- ming language to the Barrelfish OS and integrate the Go communi- cation channels with the messaging infrastructure of Barrelfish. We show that the outcome of the porting and the integration allows us to implement OS services that can take advantage of the easy-to-use concurrency model of Go. Our evaluation based on LevelDB benchmarks shows comparable per- formance to the Linux port. Meanwhile, the overhead of the messag- ing integration causes the poor performance when compared to the native messaging of Barrelfish, but exposes an easier to use interface, as shown by the example code. i Acknowledgments First of all, I would like to thank Timothy Roscoe, Antonios Kornilios Kourtis and David Cock for giving the opportunity to work on the Barrelfish OS project, their supervision, inspirational thoughts and critique. Next, I would like to thank the Barrelfish team for the discussions and the help. In addition, I would like to thank Sebastian Wicki for the conversations we had during the entire period of my Master’s studies. -
COMMON NAME SCIENTIFIC NAME BYCATCH UNIT CV FOOTNOTE(S) Mid-Atlantic Bottom Longline American Lobster Homarus Americanus 35.43 P
TABLE 3.4.2a GREATER ATLANTIC REGION FISH BYCATCH BY FISHERY (2015) Fishery bycatch ratio = bycatch / (bycatch + landings). These fisheries include numerous species with bycatch estimates of 0.00; these 0.00 species are listed in Annexes 1-3 for Table 3.4.2a. All estimates are live weights. 1, 4 COMMON NAME SCIENTIFIC NAME BYCATCH UNIT CV FOOTNOTE(S) Mid-Atlantic Bottom Longline American lobster Homarus americanus 35.43 POUND 1.41 t Gadiformes, other Gadiformes 2,003.72 POUND .51 o, t Jonah crab Cancer borealis 223.42 POUND .67 t Monkfish Lophius americanus 309.83 POUND .49 e, f Night shark Carcharhinus signatus 593.28 POUND .7 t Offshore hake Merluccius albidus 273.33 POUND 1.41 Ray-finned fishes, other (demersal) Actinopterygii 764.63 POUND .64 o, t Red hake Urophycis chuss 313.85 POUND 1.39 k Scorpionfishes, other Scorpaeniformes 10.12 POUND 1.41 o, t Shark, unc Chondrichthyes 508.53 POUND .7 o, t Skate Complex Rajidae 27,670.53 POUND .34 n, o Smooth dogfish Mustelus canis 63,484.98 POUND .68 t Spiny dogfish Squalus acanthias 32,369.85 POUND 1.12 Tilefish Lopholatilus chamaeleonticeps 65.80 POUND 1.41 White hake Urophycis tenuis 51.63 POUND .85 TOTAL FISHERY BYCATCH 129,654.74 POUND TOTAL FISHERY LANDINGS 954,635.64 POUND TOTAL CATCH (Bycatch + Landings) 1,084,290.38 POUND FISHERY BYCATCH RATIO (Bycatch/Total Catch) 0.12 Mid-Atlantic Clam/Quahog Dredge American lobster Homarus americanus 4,853.05 POUND .95 t Atlantic angel shark Squatina dumeril 5,313.55 POUND .96 t Atlantic surfclam Spisula solidissima 184,454.52 POUND .93 Benthic -
Proceedings of the Helminthological Society of Washington 38(2) 1971
i~rl&'-->¥J:,'\±" •• • :•> ' .- fec?^VIS3; Volufrie/r38 '$ .4,^ July--! 97.1' Number 2 The Helmintholog^ ri ' ^V seibionjpua/ /ourriq/ of research devoted fo 1 ^' {HelminiholQQy arid all branches, of Parasitol&gy in :; i~ ^ ; g / Brdytpn H.. Ransom Memorial /Trust Fjund x ; ;;, '' ''''•'".''.''/ .'.^'rv'"^.' 7'' ';';< • ''-,."' •.! :."•"'•'-- ^. ! •• - , '• ';;/- - '*.-. ' • •' ' '//Y'- •' ; ;' -'/V.- " y, ? Subscription $9.00 a ,VpIurne; Fpreign, $9.50 '^ ^ / ' ; \ ^ ;> v £ ^','ilfnl ''$$** ^ CONTENTS;V ^v^^,;^;--.^- ;, '••1,J,>; V- ALI, S, MEHDI, M. V. SuRYAWANSHi, AND K. ZAkitrDDiN GHISTY. ^Rogertis rosae , r/ sp..ri.\(Nematoda: jGylindrolaimiriae ) from Marathwada, India .-.-.-,-.,.lr... 193 BECKERDlTE, FRED W., GROV^R' C. 'IVllLliER, AND REINARD HAR«3EMA. ; Obser- •*"— '••,'' vatioris on "the Life Cycle ofi Pharyngostomoides !spp. and the Description ' ;pf P. adenp'eeplidla sp. -ri.' (Strigeoidea: DijilostOmatidae ) -from 'the ,Rac-,'x • >:'' .coon, Proctjon lotor (L. ) ______ ^-_-_L^-J..-^-—r.— ,-.l.^--^^_L.^.,-^ _____-,.^.lj.^: ; ;149 CQLGLAZIER, 'M. L., .K. Q. KATES, A^D ,F.. D. ENZIE. ( Activity , of LevamisoleP i" "Pyrantel rTartrate., and :Rafoxanide Against T\vo 'Tiiiahendazole-tolerant Iso- ^ ,'Jate s 6i'<H,aeinbnclws /contortus, and 'T\v'o Species of 'Ti'ichdstrorigylus^m DOUVRES, FRANK W. AND FKANCIS G. TROMBA. Comparative , Development of ^ " \ ' . Ascpris$w,iin in Rabbits, Guinea "Pigs,' Mice;, arid Swine in I'l "Days •-. ,.-_— ^\ 246 , JQHN V.,<G. TRUMAN FINCHER, AND : 'T, BONNER STEWART. \Eimeria ' •, 'pat/neisp.n.J, Protozoa:' Eimeriidae) rfrom tiie Gopher ^Tortoise, 'Gflphenis > Polyphemus J__^^-l_r-..r-_-l-__J^:l.u--— _. _____ L_ rrl— ~- ..— -—.-----^--- - l-----A---i---^-t:. '- ..'223 !:,, JACOB H, AND J.,D. THOMAS. - Some Hemiuricl Trematodes of Marine Fishes^from Ghana ._.-1::...^.._-JJ— 1..L _____:.„;... ^:l..-:-.^-.^.:-lL_-_. -
The Barrelfish Multi- Kernel: an Interview with Timothy Roscoe
INCREASING CPU PERFORMANCE WITH faster clock speeds and ever more complex RIK FARROW hardware for pipelining and memory ac- cess has hit the brick walls of power and the Barrelfish multi- bandwidth. Multicore CPUs provide the way forward but also present obstacles to using kernel: an interview existing operating systems design as they with Timothy Roscoe scale upwards. Barrelfish represents an ex- perimental operating system design where Timothy Roscoe is part of the ETH Zürich Computer early versions run faster than Linux on the Science Department’s Systems Group. His main research areas are operating systems, distributed same hardware, with a design that should systems, and networking, with some critical theory on the side. scale well to systems with many cores and [email protected] even different CPU architectures. Barrelfish explores the design of a multikernel Rik Farrow is the Editor of ;login:. operating system, one designed to run non-shared [email protected] copies of key kernel data structures. Popular cur- rent operating systems, such as Windows and Linux, use a single, shared operating system image even when running on multiple-core CPUs as well as on motherboard designs with multiple CPUs. These monolithic kernels rely on cache coherency to protect shared data. Multikernels each have their own copy of key data structures and use message passing to maintain the correctness of each copy. In their SOSP 2009 paper [1], Baumann et al. describe their experiences in building and bench- marking Barrelfish on a variety of Intel and AMD systems ranging from four to 32 cores. When these systems run Linux or Windows, they rely on cache coherency mechanisms to maintain a single image of the operating system. -
Message Passing and Bulk Transport on Heterogeneous Multiprocessors
Master’s Thesis Nr. 118 Systems Group, Department of Computer Science, ETH Zurich Message Passing and Bulk Transport on Heterogeneous Multiprocessors by Reto Achermann Supervised by Prof. Timothy Roscoe, Dr. Kornilios Kourtis October 17, 2014 Abstract The decade of symmetric multiprocessors is about to end. Due to physical limitations, individual cores cannot be made any faster and adding cores won’t work anymore (dark silicon). Operating systems face the next big paradigm shift: systems are getting faster by exploiting specialized hardware leading to the era of asymmetric processors and heterogeneous systems. An ever growing count and the diversity of cores yields new challenges regarding scheduling and resource management. Multiple physical address spaces within single machines let them appear as a cluster-like system. Today’s commodity operating systems are not well designed to deal with het- erogeneity and asymmetric processors. Many attempts have been made to tackle the challenges of heterogeneous hardware, most of which treat avail- able co-processors like devices or independent execution environments rather than equivalent processors. Thus, true support of a multi-architecture system is rarely seen, despite the fact that such hardware already exists. Examples are, systems like the OMAP44xx SoC or Intel’s Xeon Phi co-processor. In this thesis we will elaborate the arising challenges introduced by heteroge- neous system architectures. We ported the Barrelfish research operating system to the Xeon Phi execution environment and explored the impact on perfor- mance and system design imposed by the emerging hardware characteristics such as different instruction set architectures, multiple physical address spaces and asymmetric cores. -
Spawner-Recruit Relationships of Demersal Marine Fishes: Prior Distribution of Steepness for Possible Use in SEDAR Stock Assessments
SEDAR 24−AW−06 Spawner-recruit relationships of demersal marine fishes: Prior distribution of steepness for possible use in SEDAR stock assessments SEDAR 24−AW−06 June, 2010 Sustainable Fisheries Branch NMFS−Southeast Fisheries Science Center Beaufort, NC 28516 1 SEDAR 24−AW−06 Introduction In many stock assessments, steepness is a key parameter of the spawner-recruit model. Steepness controls the response of stock productivity to changes in spawning biomass, and thus it heavily influences estimates of management quantities, such as MSY-based benchmarks and related proxies (Brooks et al., 2010). Steepness is also notoriously difficult to estimate (Conn et al., 2010). One approach to improve estimation is to specify a prior distribution of steepness (Myers et al., 2002). Such distributions have been based on evolutionary principles (He et al., 2006), fluctuation or uncertainty in life-history parameters (Mangel et al., 2010), and meta-analysis of ecologically similar species (Dorn et al, 2002; Forrest et al., In press). This study takes the meta- analytic approach to develop a prior distribution of steepness, intended for possible use in stock assessment of reef fishes in the southeast U.S. (Atlantic and Gulf of Mexico waters). It draws together information on steepness from several sources, including Rose et al. (2001), Forrest et al. (In press), and relevant SEDAR assessments. Steepness Steepness (h) is conventionally defined as the proportion of unfished recruitment (R 0) produced by 20% of unfished population fecundity or spawning biomass (S 0). In the Beverton −Holt spawner-recruit formulation, recruitment (R) is computed from spawning biomass (S), 8.0 R hS R = 0 (1) 2.0 Φ 0 R0 1( − h) + (h − )2.0 S where Φ0 describes the unfished spawning biomass per recruit. -
A Tool for Modeling, Viewing, and Checking Distributed System
;login FALL 2016 VOL. 41, NO. 3 : & POSIX: The Old, the New, and the Missing Vaggelis Atlidakis, Jeremy Andrus, Roxana Geambasu, Dimitris Mitropoulos, and Jason Nieh & Runway: A Tool for Modeling, Viewing, and Checking Distributed Systems Diego Ongaro & Create a Threat Model for Your Organization Bruce Potter & Eliminating Toil Betsy Beyer, Brendan Gleason, Dave O’Connor, and Vivek Rau Columns Separating Protocol Implementations from Transport in Python David Beazley Shutting Down Go Servers with Manners Kelsey Hightower Using Consul for Distributed Key-Value Stores David N. Blank-Edelman Monitoring Paging Trauma Dave Josephsen Making Security into a Science Dan Geer Distributed Systems Robert G. Ferrell UPCOMING EVENTS OSDI ’16: 12th USENIX Symposium on Operating Enigma 2017 Systems Design and Implementation January 30–February 1, 2017, Oakland, CA, USA Sponsored by USENIX in cooperation with ACM SIGOPS enigma.usenix.org November 2–4, 2016, Savannah, GA, USA www.usenix.org/osdi16 FAST ’17: 15th USENIX Conference on File and Co-located with OSDI ’16 Storage Technologies INFLOW ’16: 4th Workshop on Interactions of NVM/Flash Sponsored by USENIX in cooperation with ACM SIGOPS with Operating Systems and Workloads February 27–March 2, 2017, Santa Clara, CA, USA November 1, 2016 Submissions due September 27, 2016 www.usenix.org/inflow16 www.usenix.org/fast17 LISA16 SREcon17 December 4–9, 2016, Boston, MA, USA March 13–14, 2017, San Francisco, CA, USA www.usenix.org/lisa16 Co-located with LISA16 NSDI ’17: 14th USENIX Symposium on Networked SESA -
Customized OS Kernel for Data-Processing on Modern Hardware
Imperial College London MEng Computing Individual Project Customized OS kernel for data-processing on modern hardware Author: Supervisor: Daniel Grumberg Dr. Jana Giceva An Individual Project Report submitted in fulfillment of the requirements for the degree of MEng Computing in the Department of Computing June 18, 2018 iii Abstract Daniel Grumberg Customized OS kernel for data-processing on modern hardware The end of Moore’s Law shows that traditional processor design has hit its peak and that it cannot yield new major performance improvements. As an answer, computer architecture is turning towards domain-specific solutions in which the hardware’s properties are tailored to specific workloads. An example of this new trend is the Xeon Phi accelerator card which aims to bridge the gap between modern CPUs and GPUs. Commodity operating systems are not well equipped to leverage these ad- vancements. Most systems treat accelerators as they would an I/O device, or as an entirely separate system. Developers need to craft their algorithms to target the new device and to leverage its properties. However, transferring data between compu- tational devices is very costly, so programmers must also carefully specify all the individual memory transfers between the different execution environments to avoid unnecessary costs. This proves to be a complex task and software engineers often need to specialise and complicate their code in order to implement optimal memory transfer patterns. This project analyses the features of main-memory hash join algorithms, that are used in relational databases for join operations. Specifically, we explore the relation- ship between the main hash join algorithms and the hardware properties of Xeon Phi cards. -
Baumann: the Multikernel: a New OS Architecture for Scalable Multicore
The Multikernel: A new OS architecture for scalable multicore systems Andrew Baumann,∗ Paul Barham,y Pierre-Evariste Dagand,z Tim Harris,y Rebecca Isaacs,y Simon Peter,∗ Timothy Roscoe,∗ Adrian Schüpbach,∗ and Akhilesh Singhania∗ ∗Systems Group, ETH Zurich yMicrosoft Research, Cambridge zENS Cachan Bretagne Abstract App App App App Commodity computer systems contain more and more OS node OS node OS node OS node processor cores and exhibit increasingly diverse archi- Agreement algorithms State State State Async messages State tectural tradeoffs, including memory hierarchies, inter- replica replica replica replica connects, instruction sets and variants, and IO configu- Arch-specific code rations. Previous high-performance computing systems have scaled in specific cases, but the dynamic nature of Heterogeneous x86 x64 ARM GPU modern client and server workloads, coupled with the cores impossibility of statically optimizing an OS for all work- Interconnect loads and hardware variants pose serious challenges for operating system structures. Figure 1: The multikernel model. We argue that the challenge of future multicore hard- ware is best met by embracing the networked nature of the machine, rethinking OS architecture using ideas from Such hardware, while in some regards similar to ear- distributed systems. We investigate a new OS structure, lier parallel systems, is new in the general-purpose com- the multikernel, that treats the machine as a network of puting domain. We increasingly find multicore systems independent cores, assumes no inter-core sharing at the in a variety of environments ranging from personal com- lowest level, and moves traditional OS functionality to puting platforms to data centers, with workloads that are a distributed system of processes that communicate via less predictable, and often more OS-intensive, than tradi- message-passing. -
Cherios: Designing an Untrusted Single-Address-Space Capability Operating System Utilising Capability Hardware and a Minimal Hypervisor
CheriOS: Designing an untrusted single-address-space capability operating system utilising capability hardware and a minimal hypervisor Lawrence G. Esswood University of Cambridge Computer Laboratory Churchill College July 2020 This thesis is submitted for the degree of Doctor of Philosophy Declaration This thesis is the result of my own work and includes nothing which is the outcome of work done in collaboration except as declared in the Preface and specified in the text. I further state that no substantial part of my thesis has already been submitted, or, is being concurrently submitted for any such degree, diploma or other qualification at the University of Cambridge or any other University or similar institution except as declared in the Preface and specified in the text. It does not exceed the prescribed word limit for the relevant Degree Committee. Lawrence G. Esswood July 2020 iii Abstract CheriOS: Designing an untrusted single-address-space capability operating system utilising capability hardware and a minimal hypervisor Lawrence G. Esswood This thesis presents the design, implementation, and evaluation of a novel capability operating system: CheriOS. The guiding motivation behind CheriOS is to provide strong security guarantees to programmers, even allowing them to continue to program in fast, but typically unsafe, languages such as C. Furthermore, it does this in the presence of an extremely strong adversarial model: in CheriOS, every compartment – and even the operating system itself – is considered actively malicious. Building on top of the architecturally enforced capabilities offered by the CHERI microprocessor, I show that only a few more capability types and enforcement checks are required to provide a strong compartmentalisation model that can facilitate mutual distrust. -
The Multikernel: a New OS Architecture for Scalable Multicore Systems
The Multikernel: A new OS architecture for scalable multicore systems Andrew Baumann,∗ Paul Barham,y Pierre-Evariste Dagand,z Tim Harris,y Rebecca Isaacs,y Simon Peter,∗ Timothy Roscoe,∗ Adrian Schüpbach,∗ and Akhilesh Singhania∗ ∗ y z Systems Group, ETH Zurich Microsoft Research, Cambridge ENS Cachan Bretagne ABSTRACT App App App App Commodity computer systems contain more and more processor cores and exhibit increasingly diverse architectural tradeoffs, in- OS node OS node OS node OS node Agreement cluding memory hierarchies, interconnects, instruction sets and algorithms State State State Async messages State variants, and IO configurations. Previous high-performance com- replica replica replica replica puting systems have scaled in specific cases, but the dynamic nature Arch-specific of modern client and server workloads, coupled with the impossi- code bility of statically optimizing an OS for all workloads and hardware Heterogeneous variants pose serious challenges for operating system structures. x86 x64 ARM GPU cores We argue that the challenge of future multicore hardware is best met by embracing the networked nature of the machine, rethinking Interconnect OS architecture using ideas from distributed systems. We investi- gate a new OS structure, the multikernel, that treats the machine as a Figure 1: The multikernel model. network of independent cores, assumes no inter-core sharing at the lowest level, and moves traditional OS functionality to a distributed system of processes that communicate via message-passing. Such hardware, while in some regards similar to earlier paral- We have implemented a multikernel OS to show that the ap- lel systems, is new in the general-purpose computing domain.