Diode in Electronic Circuits Anode Cathode (+) (-) Id
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Diode in electronic circuits Symbolic representation of a Diode in circuits Anode Cathode (+) (-) iD • An ideal diode conducts the current only in one direction • “Arrow” shows direction of the current in circuit • Positive polarity of the voltage at an anode and negative one at a cathode correspond to a forward bias condition • Minus at the anode and plus at the cathode correspond to reverse biasing Diode as a non-linear resistor Current-Voltage (I-V) Characteristics I-V of a LINEAR RESISTOR i(A) R=v/i v(V) I-V of an IDEALIZED DIODE i(A) R → 0 v(V) R →∞ I-V Characteristic of an Ideal Diode qV /kT JJ=−S ()e 1 i(A) ~ exp(qV/kT) v(V) • At room temperature T=300K the thermal voltage kT/q = 26 meV • For a Si diode the typical value of the saturation current -10 2 JS ~ 10 A/cm JJ≈ eqV /kT For a high forward bias V >> 26 mV: S • The forward current shows an exponential dependence For a high reverse bias V <0, V< < -26 mV: J ≈ −J S • Reverse current of diodes is quite small I-V Characteristic of a Diode in semilogarithmic scale J(A/cm2) non-exp 102 increase 10-2 saturation slope -1 region 10-6 q/nkT~ 20-40 V |J | S 10-10 -10 10 20 30 qV/kT • The slop in logarithmic scale can be used to define the non-ideality factor n • The intersection of lgI-V characteristic with vertical axis gives the value of saturation current JS • The current increase differs from exponential at high forward bias voltage I-V Characteristic of a Real Diode A Silicon (Si) Diode i(A) v(V) 0.7 V • The typical voltage drop across a Si diode at forward bias is 0.7V A Germanium (Ge) Diode i(A) v(V) 0.4 V Diode at High Direct Current • At high current I-V characteristic become to be linear i(A) slope RS=dv/di v > 0.7 V • Series Resistance RS describes the experimental I-V characteristic Ideal Diode RS Breakdown of a Diode at Reverse Voltage • The reverse current starts to increase rapidly at some high voltage VB i(A) VB slope v(V) Rdiff=dv/di • This caused by avalanche or tunnel breakdown th • The breakdown voltage VB can be as high as 100 Volts or can be purposely made a small down to 3-5V • Zener diode can be used as a voltage reference source • Differential resistance RD is an important device parameter Point-by-point measurements of I-V characteristics using DMM Rs < 0.01 Ω DC source 0…+15V D V V1 DMM Floating Source (No ground) R 300 Ω A Rint ~ 0.01 Ω • Accurate measurements of current and voltage using two-display DMM require a floating voltage source • Make sure that the ground clip on the power supply is disconnected! Metal-semiconductor junction Work function Φ characterizes minimum energy that has to be transferred to the electron in order to remove it from the material Metal Semiconductor VACUUM LEVEL q ⋅χ - electron affinity q ⋅ΦMETAL q ⋅ΦSEMICONDUCTOR EC EF_SEMICONDUCTOR EF_METAL EV (EC - EF ) ΦAl = 4.28 , eV Φ = 4.01 + , eV Si q After Metal and Semiconductor are brought in contact the Fermi energy should be constant throughout the system in thermal equilibrium chottky barrier and built-in potential barrier When ΦMETAL > ΦSEMICONDUCTOR electrons from semiconductor will flow into lower energy states in metal q ⋅ΦS q ⋅ΦM q ⋅χ q ⋅Vbi q ⋅ΦB0 EC EC − EF EF Metal EV Semiconductor When electrons move from metal to When electrons in CB move from semiconductor they are stopped by semiconductor to metal they are Schottky barrier stopped by built-in potential barrier ΦB0 = ΦM − χ Vbi = ΦM − ΦS = ΦB0 − (EC − EF ) Depletion region When electrons are moved away from the metal- semiconductor interface they leave charge of the q ⋅V ionized donors uncompensated. q ⋅Φ bi B0 E + C E F - Metal EV Semiconductor + Positive charge of the ionized donors Negative charge of the W – width of depletion region extra electrons Depletion region charge is N *W. Electric Field D x 2⋅ε ⋅ε ⋅V W W = 0 bi q ⋅ ND Lecture 07/08 Reverse bias Positive voltage is applied to n-semiconductor side q ⋅ΦB0 q ⋅(Vbi + V) Depletion region width increases E F E + C E 2⋅ε ⋅ε ⋅(V + V) Metal F W = 0 bi q ⋅ ND EV Semiconductor Barrier for electron motion from metal to semiconductor remains unchanged and if high enough no current increase will flow through the structure Reversely biased Schottky diode can be seen as a parallel plate capacitor with plate separation equal to depletion region width. q ⋅ε ⋅ε ⋅ N C = 0 D 2⋅()Vbi + V Forward bias Negative voltage is applied to n-semiconductor side Barrier for electron motion from semiconductor to metal decreases q ⋅(Vbi − V) EC q ⋅ΦB0 EF EF Electrons with kinetic energies E > q ⋅(V − V) Metal bi EV can overcome barrier and flow to metal, hence, conduct current through the structure Semiconductor I Rectifier * 2 ⎛ q ⋅ΦB0 ⎞ ⎡ ⎛ q ⋅V ⎞ ⎤ J = A ⋅T ⋅exp⎜− ⎟⋅ ⎢exp⎜ ⎟ −1⎥ ⎝ k ⋅T ⎠ ⎣ ⎝ k ⋅T ⎠ ⎦ 4⋅ π ⋅q ⋅m* ⋅k 2 A* = n - Richardson constant h3 V Lecture 09/03 n- and p-semiconductors at distance n-Semiconductor p-Semiconductor VACUUM LEVEL q ⋅χ - electron affinity q ⋅ΦSn q ⋅ΦSp EC EC ++++++++++++ EFn EFp ------------ EV EV Due to difference in work functions between n- and p-type semiconductors the electrons can lower their energy if they move from n- to p-semiconductor. Gedanken experiment n-Semiconductor p-Semiconductor Large gradients of electrons and n ≈ N holes at the pn-interface 0n D (metallurgical junction) will drive holes p0p ≈ NA from p- to n-semiconductor and electrons from n- to p-semiconductor. Electrons coming from n- to p- n 2 2 n ≈ i semiconductor will encounter large ni 0p p0n ≈ NA number of holes and recombine with N D them (same with holes from p- semiconductor) EC ++++++++++++ E The uncompensated charge of Fn Donors (n-side) and Acceptors (p- side) will build internal electric field EFp ------------ that will stop diffusion of electrons EV and holes. pn-junction and built-in potential n-Semiconductor p-Semiconductor ND NA n0n ≈ ND Built-in potential p0p ≈ NA 2 k ⋅T ⎛ N ⋅ N ⎞ 2 n D A n n ≈ i Vbi = ⋅ln⎜ ⎟ p ≈ i 0p ⎜ 2 ⎟ 0n NA q ⎝ ni ⎠ ND + - E C The built-in potential maintains q ⋅V bi equilibrium (compensates for ++++++++++++++ diffusion currents) so no net EF -------------- current is produced by Vbi. EV q ⋅Vbi Depletion region E - x n x p Equations: dE ρ(x) ⎧q ⋅ ND , - x n < x < 0 = , ρ()x = ⎨ q ⋅ N , 0 < x < x dx ε ⋅ε0 ⎩ A p + q ⋅ ND - q ⋅ NA x n x p x n ⋅ ND = x p ⋅ NA + - EC W = x n + x p = ? ++++++++++++++ E -------------- F Solution: E V 1 ⎛ 2⋅ε ⋅ε ⋅V ⎡ 1 1 ⎤⎞ 2 ⎜ 0 bi ⎟ W = ⎜ ⋅ ⎢ + ⎥⎟ n-Semiconductor p-Semiconductor ⎝ q ⎣ ND NA ⎦⎠ pn-junction reverse bias Zero bias Reverse bias (“+” to n, “-” to p) EC EC q ⋅Vbi q ⋅(Vbi + V ) ++++++++++++++ E E -------------- F -------------- F ++++++++++++++ EV EV q ⋅Vbi q ⋅(Vbi + V ) - x n x p - (x n + dx n ) (x p + dx p ) 1 1 ⎛ 2⋅ε ⋅ε ⋅V ⎡ 1 1 ⎤⎞ 2 ⎛ 2⋅ε ⋅ε ⋅()V + V ⎡ 1 1 ⎤⎞ 2 ⎜ 0 bi ⎟ ⎜ 0 bi ⎟ W = ⎜ ⋅ ⎢ + ⎥⎟ W = ⎜ ⋅ ⎢ + ⎥⎟ ⎝ q ⎣ ND NA ⎦⎠ ⎝ q ⎣ ND NA ⎦⎠ Under reverse bias both the depletion region width and electric field at metallurgical junction increase Reverse bias Zero bias Reverse bias (“+” to n, “-” to p) EC EC q ⋅Vbi q ⋅(Vbi + V ) ++++++++++++++ E E -------------- F -------------- F ++++++++++++++ EV EV q ⋅Vbi q ⋅(Vbi + V ) - x n x p 1 - (x + dx ) (x + dx ) ⎛ ⎞ 2 n n p p 2⋅ε ⋅ε0 ⋅Vbi ⎡ 1 1 ⎤ W = ⎜ ⋅ ⎢ + ⎥⎟ ⎜ q N N ⎟ ⎝ ⎣ D A ⎦⎠ 1 ⎛ 2⋅ε ⋅ε ⋅ V + V ⎡ ⎤⎞ 2 ⎜ 0 ()bi 1 1 ⎟ W = ⎜ ⋅ ⎢ + ⎥⎟ Under reverse bias both the depletion ⎝ q ⎣ ND NA ⎦⎠ region width and electric field at 1 metallurgical junction increase. ⎛ q ⋅ε ⋅ε ⋅ N ⋅ N ⎞ 2 ⎜ 0 D A ⎟ C'= ⎜ ⎟ Depletion layer capacitance decrease. ⎝ 2⋅()Vbi + V ⋅()ND + NA ⎠ Forward bias Forward bias (“-” to n, “+” to p) Energy barrier (built-in potential) is lowered and diffusion currents of E minority electron and holes will flow. q ⋅()Vbi − V C ⎛ q ⋅V ⎞ ++++++++++++++ ⎛ ⎞ J = JS ⋅⎜exp⎜ ⎟ −1⎟ E ⎝ ⎝ k ⋅T ⎠ ⎠ -------------- F E ⎛ q ⋅D ⋅p q ⋅D ⋅n ⎞ V J = ⎜ p 0n + n 0p ⎟ q ⋅(V − V) S ⎜ ⎟ bi ⎝ Lp Ln ⎠ J Rectifier n p (x) pn ()x L J L n S p n 2 n 2 n ≈ i p ≈ i 0p V 0n - x n x p NA ND.