The Von Neumann Architecture Has Following Specialties :- 1

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University of Babylon Undergraduate : third class College of computer technology Department of software Computer architecture Von Neumann & Harvard *********************************************************

Introduction :- There are two computer architectures, which are different in the way of accessing memories: von Neumann Architecture (also names “Princeton Architecture”) and Harvard Architecture.

First von Neumann architecture Computer architecture:- In a von Neumann architecture , programs and data are stored in the same memory and managed by the same information-handling subsystem. In the Harvard architecture program and data are stored and handled by different subsystems. This is the essential difference between these two architectures.

Second Harvard architecture uses physically separate memories for their instructions and data, requiring dedicated buses for each of them. Instructions and operands can therefore be fetched simultaneously.

In the original "Harvard computer", built in 1944 and after which the architecture is named, the program-handling task and the data-handling task were sufficiently different to result in two different storage technologies. Today, the vast majority of computers are von Neumann architecture because of the efficiency of design, implementation, and operation of one memory system instead of two. . Under certain conditions, a Harvard computer can be much faster than a von Neumann computer because data and program do not contend for the same information pathway, and storing the program in an immutable read-only memory can result in vast reliability improvements.

The von Neumann Architecture has following specialties :- 1. Instructions and Data are stored in the same memory. 2. Instructions and Data share one memory system. (The Length of bit, the same form of address)

Fig(von Neumann architecture)

And the Harvard Architecture has following factors :- 1. Physically separates storage and signal pathway for instructions and data. 2. Generally, the bit of Instructions is wider than Data. 3. For some computers, the Instruction memory is read-only. 4. In cases without caches, the Harvard Architecture is more efficient than von-Neumann. Bus structures of the two are also different: Harvard architecture has separate data and instruction busses, allowing transfers simultaneously on both busses. Von Neumann architecture has only one bus which is used for both data transfers and instruction fetches, and therefore data transfers and instruction fetches must be scheduled – they cannot be performed at the same time.

Fig(Harvard architecture)

Compare of the two in -running programs By reason of the wider bit of instructions, Harvard Architecture supports more instructions with less hardware requiring. For example, the ARM9 processor has 24-bit instruction length, so that it could have =16777216 instructions, which are much more than 16-bit processors have (65536). So, with uniform bus width which von Neumann architecture has, the processor has to take more requirement of hardware in data length, if it wants to have 24-bit instruction width. Secondly, two buses accessing memory synchronously provides more CPU time. The von Neumann processor has to perform a command in 2 steps (first read an instruction, and then read the data that the instruction requires. It has shown the process of reading instructions and their data.). But the Harvard architecture can read both instruction and its data at the same time (shows that 2 buses 2work synchronically). Evidently, the parallel method is faster and more efficiently, because it only takes one step for each command.

-Memory details In a Harvard architecture, there is no need to make the two memories share characteristics. In particular, the word width, timing, implementation technology, and memory address structure can differ. Instruction memory is often wider than data memory. In some systems, instructions can be stored in read-only memory while data memory generally requires read-write memory. In some systems, there is much more instruction memory than data memory so instruction addresses are much wider than data addresses. Contrast with other computer architectures In a computer with the contrasting von Neumann architecture (and no cache), the CPU can be either reading an instruction or reading/writing data from/to the memory. Both cannot occur at the same time since the instructions and data use the same bus system. In a computer using the Harvard architecture, the CPU can both read an instruction and perform a data memory access at the same time, even without a cache. A Harvard architecture computer can thus be faster for a given circuit complexity because instruction fetches and data access do not contend for a single memory pathway.

As a result, Harvard architecture is especially powerful in digital signal process. Because most commands in DSP require data memory access, the 2-bus-architecture saves much more CPU time

Problem of Harvard Architecture :- Instruction memory is read-only. If it used completely separated memory and isolated instruction-data memory, the On-line Debug and Self Modify would be impossible . for example in the case of self modifying code, or, if the debugger is used, to set software breakpoints in memory. If there are two completely separate, isolated memory systems, this is not possible. As result, using a simple, unified memory system is inefficient. (Unless make data into both buses. But this way is no better than a von-Neumann architecture computer.)