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TDA2E SPRT714 –OCTOBER 2015 TDA2E SoC Processor for Advanced Driver Assist Systems (ADAS) Technical Brief

1 Device Overview

1.1 Features

1 • Architecture Designed for ADAS Applications • General-Purpose (GPMC) • Video, Image, and Graphics Processing Support • Enhanced (EDMA) – Full-HD Video (1920 × 1080p, 60 fps) Controller – Multiple Video Input and Video Output • 2-Port Gigabit Ethernet (GMAC) • ARM® Cortex®-A15 Microprocessor Subsystem – Up to Two External Ports, One Internal • C66x Floating-Point VLIW DSP • Sixteen 32-Bit General-Purpose Timers – Fully Object-Code Compatible With C67x and • 32-Bit MPU Watchdog Timer C64x+ • Six High-Speed Inter-Integrated Circuit (I2C) Ports – Up to Thirty-two 16 x 16-Bit Fixed-Point • Ten Configurable UART/IrDA/CIR Modules Multiplies per Cycle • Four Multichannel Serial Peripheral Interfaces • Up to 512KB of On-Chip L3 RAM (MCSPIs) • Level 3 (L3) and Level 4 (L4) Interconnects • Quad SPI Interface (QSPI) • DDR3/DDR3L Memory Interface (EMIF) Module • SATA Interface – Supports up to DDR3-1333 (667MHz) • Multichannel Audio Serial Port (MCASP) – Up to 4GB Across Two Chip Selects • SuperSpeed USB 3.0 Dual-Role Device • Two ARM Dual Cortex-M4 Image Processing Units • High Speed USB 2.0 Dual-Role Device (IPUs) • High Speed USB 2.0 On-The-Go • IVA-HD Subsystem • PCI Express® 2.0 Port With Integrated PHY • Display Subsystem – One 2-lane Gen2-Compliant Port – Display Controller With DMA Engine and up to – or Two 1-lane Gen2-Compliant Ports Three Pipelines • Dual Controller Area Network (DCAN) Modules – HDMI Encoder: HDMI 1.4a and DVI 1.0 – CAN 2.0B Protocol Compliant • Up to 215 General-Purpose I/O (GPIO) Pins • Single-Core PowerVR™ SGX544 3D GPU • Real-Time Clock Subsystem (RTCSS) • 2D-Graphics Accelerator (BB2D) Subsystem • Power, Reset, and Clock Management – Vivante® GC320 Core

• On-Chip Debug With CTools Technology PRODUCTPREVIEW • Video Processing Engine (VPE) • 28-nm CMOS Technology • One Video Input Port (VIP) Module • 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA – Support for up to 4 Multiplexed Input Ports (ABC)

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCT PREVIEW Information. Product in design phase of development. Subject to change or discontinuance without notice. a C of an fixed more single views, s a Lidar ’ multiple a interface Incorporated including family www.ti.com TI enabling Assistance Cortex-A15 on including of LVDS-based virtual by mm integrating facilitate or mix by Instruments 23.0 decoding SIZE ARM Driver Ultrasonic, scalable to DSP, fusion a × debugging peripherals for a Texas mm rendering and BODY and of aims core, automobile Ethernet Radar, and 2015, for sensor 23.0 s ’ includes © that host Advanced ARM automobiles a and that today Vision, accelerator enable optimized the fusion – Copyright in standard. generation fusion to view leading scheduling, for accelerator video data processing highly of data a integrates Fusion and a (DSP) CSI-2) tools of architecture surround Object Raw technology AEC-Q100 also graphics are analytics entry-to-mid-range Sensor sensors – – TDA2E Feedback the s ’ with SoC to vision • AVB. assist, scalable including (760) vision Links: processor integration requirements (SoCs) programming today Information development along park PACKAGE the The serial Folder FCBGA of TDA2Ex ADAS Ethernet signal Documentation according embedded simplify targets the and set Device and meet to Product network, experience. GigB including Submit to digital heterogeneous, And family qualified and a AVB processors. power system-on-chips parallel is driving complete execution. optimizer low sophisticated a (both designed View displays applications TDA2Eco Ethernet code experience. processor an TMS320C66x (TDA2Eco) incorporates enables The assembly collision-free provides ADAS dual-Cortex-M4 source Surround over systems, performance, interfaces SoC viewing SoC of ADAS TI view and DSP processors detection of into and Detection a NUMBER TDA2Ex 3D 2015 view (ADAS). TDA2Ex assist ™ mix a range streams Overview Recording Ethernet tracking object PART floating-point new TDA2Ex TDA2Ex TDA2Ex surround visibility or s ’ OCTOBER – Device for The enable multi-camera surround Additionally, compilers, broad architecture. The and MPCore video TI automotive Systems optimal autonomous The Parking Pedestrian Lane Drive 3D Rear Description Applications – – – – LVDS – – 2 1.3 1.2 • TDA2E SPRT714

PRODUCTPREVIEW TDA2E www.ti.com SPRT714 –OCTOBER 2015

1.4 Functional Block Diagram Figure 1-1 is functional block diagram for the device. TDA2Ex

MPU IVA HD CAL CSI2 x2 (1x ARM 1080p Video Cortex–A15) Co-Processor

IPU 1 Display Subsystem GPU (Dual Cortex–M4) (1x SGX544 3D) IPU 2 1x GFX Pipeline LCD1 (Dual Cortex–M4) LCD2 3x Video Pipeline DSP BB2D LCD3 (C66x Co-Processor) (GC320 2D) Blend / Scale HDMI 1.4a

EDMA JTAG MMU x2 VIP x1 VPE

High-Speed Interconnect

System Connectivity Spinlock Timers x16 RTC SS 1x USB 3.0 Dual Mode FS/HS/SS PCIe SS x2 Mailbox x13 WDT SDMA w/ PHY GPIO x8 PWM SS x3 2x USB 2.0 Dual Mode FS/HS GMAC AVB 1x PHY, 1x ULPI

Program/Data Storage Serial Interfaces SATA UART x10 QSPI GPMC / ELM EMIF 512-KB PRODUCTPREVIEW 1x 32-bit RAM (NAND/NOR/ Async) DDR3/3L W/ECC McSPI x4 McASP x8 256-KB ROM MMC / SD x4 DCAN x2 I2C x6 OCMC DMM

intro-001 Copyright © 2016, Texas Instruments Incorporated Figure 1-1. TDA2Ex Block Diagram 1.5 Trademarks ARM, Cortex are registered trademarks of ARM Limited. PowerVR is a trademark of Imagination Technologies Limited. PCI Express is a registered trademark of PCI-SIG. Vivante is a registered trademark of Vivante Corporation. All other trademarks are the property of their respective owners.

Copyright © 2015, Texas Instruments Incorporated Device Overview 3 Submit Documentation Feedback Product Folder Links: TDA2E PACKAGE OPTION ADDENDUM

www.ti.com 15-Feb-2021

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TDA2EGADQABCQ1 ACTIVE FCBGA ABC 760 60 RoHS & Green Call TI | SNAGCU Level-3-250C-168 HR -40 to 125 TDA2EGADQABCQ1 JACINTO 784 784 ABC TDA2EGADQABCRQ1 PREVIEW FCBGA ABC 760 250 RoHS & Green Call TI | SNAGCU Level-3-250C-168 HR -40 to 125 TDA2EGADQABCQ1 784 784 ABC TDA2EGAHQABCQ1 ACTIVE FCBGA ABC 760 60 RoHS & Green Call TI | SNAGCU Level-3-250C-168 HR -40 to 125 TDA2EGAHQABCQ1 784 784 ABC TDA2EGAHQABCRQ1 ACTIVE FCBGA ABC 760 250 RoHS & Green Call TI | SNAGCU Level-3-250C-168 HR -40 to 125 TDA2EGAHQABCQ1 784 784 ABC

(1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1 PACKAGE OPTION ADDENDUM

www.ti.com 15-Feb-2021

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width.

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