USB Technical Overview Brad Saunders – USB-IF/USB PG Chair (Sponsored by Corporation)

USB Developer Days 2017 Taipei, Taiwan October 24 – 25, 2017

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 1 • System Level Overview • USB 3.2 Topic Agenda • USB Type-C™ • The Rest of the Story

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 2 Some Words of Caution … • Only design to official released versions of USB specifications • Developer presentations are intended to help familiarize you with the general characteristics of these specifications and provide design guidance • These presentations are not technically complete and should not be used as the sole basis for product designs

• USB technology has evolved into highly complex and challenging designs • Always make use of certified product suppliers – silicon, connectors, etc. • Proper materials and manufacturing processes are increasingly more critical to making successful products • Submit your products for USB certification

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 3 Performance Power Delivers up to 10 Gbps x 2 – Delivers up to 100W – supporting all of your SuperSpeed USB Power power and charging for data transfer needs all your devices USB Delivery

USB Type-C™ Cable & Connector

Convenience Robust, slim connector with reversible plug orientation and cable direction

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 4 Major Components of USB Devices

USB 2.0 USB 2.0 USB 2.0 xHCI USB 2.0 USB 2.0

C USB PD

- USB 3.2 USB 3.2 USB 3.2 USB PD USB Device USB PD USB PD Type-C Device USB Class USB PD Type-C Drivers USB USB

USB Type USB USB PD Type-C Type-C USB Type-C Device HUB HOST HUB USB Type-C Charger

USB 2.0 xHCI USB 2.0 Device USB 3.1 USB 2.0 USB 2.0 USB 2.0 Device USB 3.1 USB 2.0 Class USB 3.1 Device HUB Drivers HUB BC 1.2 Charger

Legacy Connectors Legacy HOST

SuperSpeed USB USB 2.0 only USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 5 Base Specifications

Enabling Specifications

Applications

Note: this illustration is not comprehensive of all USB specs.

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 6 USB Device Class Specifications Major Application Classes Others • Audio  renewed focus • Billboard • • Content Security Communications • Debug • MBIM (Mobile Broadband) • Device Firmware Upgrade • Display  renewed focus • IrDA • HID (Human Interface Device) • Media Transport Protocol • PID (Physical Interface Device) • Monitor Control • Image • Personal Health Care • Mass Storage • Power • Printer • Smart Card • Test & Measurement • Video • USB Type-C Bridge

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 7 • System Level Overview • USB 3.2 Topic Agenda • USB Type-C™ • The Rest of the Story

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 8 USB 3.1 – Significant Updates since last year • U1 Minimum Residency Time • 3 µs specified to allow a port sufficient time to complete entry into U1 and get ready for U1 exit • 60 µs LFPS EI Timer not required in certain exit conditions for a SuperSpeedPlus port when switching to SS operation • Allows SSP ports to be more tolerant of some popular but non-compliant legacy devices • Appendix E (Re-timer) Update • Added Warm Reset, defined Cascaded and Sequential Bit-Level Re-timing, added jitter transfer function requirements, other general clean-up • Receiver AC Coupling Capacitor Option • Useful for ESD/EOS protection and removing undesired bias level on Rx side

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 9 Introducing USB 3.2

• Enables SuperSpeed USB to fully utilize USB Type-C cable plug/wires • Doubles performance with dual-lane operation

• Same signaling rates (5 Gbps / 10 Gbps) and View into the plug encoding allows use of existing cables

• USB 3.2 supersedes USB 3.1 • USB 3.2 single-lane operation equates to USB 3.1 Lane 1 Lane 0 • USB 3.1 Legacy Cable and Connector Dual-lane operation specifications extracted and published separately

Note: Related branding, certification logos and icons will be announced when available

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 10 USB 3.2 – Targeted Applications

10 Gbps performance at Over 2 GB/sec 5 Gbps cable lengths transfer rates Longer Storage Reach

Hubs & Display 10 Gbps x 2 enabling 8K60/4K120 with DSC, Docks multiple 5 and 10 Gbps 4K60 w/o DSC downstream ports

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 11 USB 3.2 – Approach • USB 3.2 updates focus on link layer definition of USB as needed to establish the x2 operation • PHY design reuse was a high priority – both 5 Gbps and 10 Gbps rates supported • Minimal impact to the other layers – Protocol, Framework, Hub, etc. • Significant buffer size impact to Hub implementations • x2 operation only applies to USB Type-C cables and connectors • Just works with existing software (OS/drivers) • Beyond doubling bandwidth through lane bonding, the solution targeted maintaining parity with regard to USB 3.1 error performance, channel and power efficiency

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 12 USB 3.2 – Dual-lane Requirements Summary (1 of 2) • Configuration Lane (Lane 0) • Established by USB Type-C CC decoding • All LFPS/LBPM signaling/messaging only transits over this lane • Ux Exit functionality only required in the Configuration Lane’s receiver • Data Striping • Applies to data blocks but control blocks are duplicated • Transmission of packets and link commands may be initiated on either lane • Data Scrambling • Operates on a per lane basis with different required seed values by lane

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 13 USB 3.2 – Dual-lane Requirements Summary (2 of 2) • Ordered Sets • Transmitted simultaneously on each lane within skew constraints • TS1 and TS2 transmit/receive sequences proceed in sync across both lanes • Clock offset compensation using SKP performed on a per lane basis • Lane-to-Lane Skew • Maximum Skew of 6400 ps allowed at Receiver input • Compliance Patterns • Transmitted independently on each negotiated lane • Pattern advances in sync on both lanes when Ping.LFPS received • Receiver Detect • Required only on the Configuration Lane • Receiver Loopback • Done on a per lane basis

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 14 USB 3.2 – Gen and Multi-lane Interoperability • USB SuperSpeed Data Rates – Gen 1 (5 Gbps) and Gen 2 (10 Gbps) • Lane count – Single lane (x1) and Dual lane (x2)

USB 3.13.2 DFP

Gen 1x1Gen Gen1 1x2 Gen 2x1Gen Gen2 2x2

Gen 1x1 Gen 1x1 Gen 1x1 Gen 1x1 Gen 1x1 Gen 1 Gen 1 Gen 1 Gen 1x2 Gen 1x1 Gen 1x2 Gen 1x1 Gen 1x2 USB 3.13.2 UFP Gen 2x1 Gen 1x1 Gen 1x1 Gen 2x1 Gen 2x1 Gen 2 Gen 1 Gen 2 Gen 2x2 Gen 1x1 Gen 1x2 Gen 2x1 Gen 2x2

Fallback Order USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 15 USB 3.2 – Physical Layer Updates (Chapter 6) • Lane Polarity inversion is done on a per lane basis • Multi-lane Requirements • Lane Numbering, Data Striping, etc. • Updated SuperSpeed USB Electrical Test Points definitions • Improved consistency with similar high-speed specifications • New or updated figures and tables

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 16 USB 3.2 – Link Layer Updates (Chapter 7) • Most significant areas of change in LTSSM: • Polling (PortMatch, PortConfig, Active, Configuration) • Recovery (Active, Configuration) • Error Types and Recovery updated to comprehend lane count • Gen 2x2 Block Header Errors • Single-bit error correction option available if PHY associates block headers • PHY LBPM Definition • Adjusted to comprehend lane count • Rx Header Buffer Credits • Increased to seven for Gen 2x2 to sustain burst performance

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 17 USB 3.2 – Protocol Layer Updates (Chapter 8) • LDM (Link Delay Measurement) Link Delay • LDM transmission time varies by speed and lane count • Enhanced SuperSpeed Isochronous Transactions • Host ability to accept and send DPs per service vary by speed and lane count • Host Flexibility in Performing SuperSpeed Isochronous Transactions • Now aligned with SuperSpeedPlus – any size burst within the Max Burst Size of endpoints

• Deprecated features and fields (now Reserved) • Bus Interval Adjustment Message • Bus Interval Adjustment Control field deprecated in Isochronous Transaction Packet • Smart Isochronous Scheduling Protocol • SSI, WPA, DBI, NBI fields deprecated in ACK Transaction Packet

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 18 USB 3.2 – Device Framework Updates (Chapter 9) • Bit 7 now reserved for all new USB base spec Descriptor Type definitions • SuperSpeedPlus Isochronous Endpoint Companion Descriptor • Bytes per Interval value varies by speed and lane count

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 19 USB 3.2 – Hub and Port Specifications (Chapter 10) • Downstream Flow Buffering • Buffering size varies by speed and lane count • Self-powered Hubs can now be powered via USB PD or USB Type-C Current • Port power rules updated • Added port labeling and positioning recommendations for hubs

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 20 USB 3.2 – Bus Power Requirement (Chapter 11) • Now differentiated by single-lane or dual-lane operation

Minimum Maximum Parameter Symbol Units (Single/Dual lane) (Single/Dual lane) Supply Voltage:

Port (downstream connector) VBUS 4.75 5.50 V

Port (upstream connector) VBUS 4.0 V

Supply Current:

High-power Hub Port (out) ICCPRT 900 / 1500 mA

Low-power Hub Port (out) ICCUPT 150 / 250 mA Dependent on lane

High-power Peripheral Device (in) ICCHPF 900 / 1500 mA count operation

Low-power Peripheral Device (in) ICCLPF 150 / 250 mA Unconfigured Device (in) ICCINIT 150 mA Independent of Suspended High-power Device ICCS 2.5 mA lane count

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 21 USB 3.2 – Re-Timer Specifications (Appendix E) • Updated for dual-lane operation • LFPS Timeout timer rules updated • SKP OS rules unique to Gen 1x2 defined • Re-timer LTSSM updates • SRIS re-timers applicable to both single and dual-lane operation • Bit-level re-timer only applicable to Gen 1x1 • Re-timer Presence Announcement • Needed to determine number of re-timers in the path – SKP OS adjustment

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 22 • System Level Overview • USB 3.2 Topic Agenda • USB Type-C™ • The Rest of the Story

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 23 USB Type-C Specification 1. Normative References • USB 2.0 Specification • USB 3.2 Specification • USB Power Delivery Specification, Revision 3.0 (2.0) These specs are the foundation • USB Billboard Device Class Specification, Revision 1.2 on which USB Type-C is defined • USB Battery Charging Specification, Revision 1.2 2. Overview • Informative functional overview 3. Mechanical Requirements • Connector and cable definitions • Includes electro-mechanical performance requirements Appendices 4. Functional Requirements A. Audio Adapter Accessory Mode • Pin and signal requirements B. Debug Accessory Mode • Configuration channel requirements C. USB Type-C Digital Audio • Power requirements D. Active Cable Thermal Guidelines 5. Functional Extensions • Alternate Modes • Active Cables  New ECN covers active cable definition up to 5 meters based on USB 3.2 Appendix E

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 24 USB Type-C – Summary Characteristics

Mechanical specifications • 24-pin receptacle – ~8.3 mm x ~2.5 mm – 10,000 cycle durability • Flip-able, reversible plugs/cables • Standard USB 3.2 / USB 2.0 cables and Legacy Adapters • Improved EMI/RFI mitigation features • Current ratings: • 3 A for standard cables • 5 A for connectors Functional capabilities • USB 2.0: LS/FS/HS • USB 3.2: Gen1 (5 Gbps) / Gen2 (10 Gbps) Single or dual-lane operation • Electronically-Marked Cables enabled via USB PD • Alternate Mode capabilities enabled via USB PD • Enhanced power options: Extended 5 V current ranges plus USB PD

Rendering courtesy of Foxconn USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 25 USB Type-C Functional Highlights • Flipping and swapping • Both plug and cable orientation no longer keyed • Hosts and devices require logic to resolve their roles for proper USB bus operation • “Dual-role” products capable of host and device roles supported • Lots of pins (24 versus 9 for USB 3.0 Standard-A) • Required to enable plug orientation flipping and dual-lane operation • Offers path to higher performance and extensibility • Two power sources • VBUS – definition expanded with USB Type-C Current • VCONN – a dedicated source for powering cable electronics • Functional Extensions • A USB-defined methods for enabling innovation in the form of Alternate Modes and Accessory Modes • Active cables defined – initially only up to 5 m, longer cables forthcoming

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 26 USB Type-C Plug and Receptacle

2.56 mm Implementation Example Implementation Example

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 27 USB Type-C Standard Cable Assemblies • Two USB Type-C to Type-C cables defined

USB 3.2 Type-C to Type-C Cable Assembly

15 wires† or

USB 2.0 Type-C to Type-C Cable Assembly

5 wires†

† Artist rendering courtesy of Foxconn Minimum number, count may differ depending on power/ground/shielding approach USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 28 Robustness and EMI Performance Optional hold • Metal re-enforced tongue and tight tolerance/fit down strap between plug and receptacle shells Deep-drawn or • Durability cycle: 10,000 min formed shell Mating force: 5 N to 20 N Un-mating force: 8 N to 20 N • Plug wrenching strength testing is mandatory • EMI Shielding and Normative Effectiveness Testing • Internal EMC springs in plug • EMC pad in receptacle, optional external springs/bumps Side (Retention) Latch in plug • Mounting footprint shielding defined

Recess on receptacle tongue

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 29 Cable Assembly Insertion Loss Requirements

• USB 3.2 Gen 2 Type-C to Type-C cable assembly is allocated with −5.8 dB loss at 5 GHz, supporting a cable about 1-meter long • Control the loss at 10 GHz (20 GHz) to be ≤ −11 dB for future scalability • USB 3.2 Gen 1 Type-C to Type-C cable assembly is allocated with −7 dB loss at 2.5 GHz, supporting a cable about 2-meter long Insertion loss

−5.8 dB

Raw cable may be coax or twisted pairs

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 30 Other High Speed Requirements • All SuperSpeed TDR impedance and S-parameters specs are informative, except for Differential-to-Common-Mode Conversion • The normative spec is the integrated S-parameters meet certain thresholds

Informative Informative

Differential Differential Return Loss NEXT

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 31 Low Speed Signal Requirements Pay attention to cable wire bundle design! • Low speed signals include CC, SBU and VBUS • Impedance for CC is from 32 – 93 ohms, SBU is from 32 – 53 ohms • CC / SBU propagation delay and SBU SE insertion loss defined  new requirements • The VBUS line loop inductance is 900 nH max to manage load release • Couplings between low speed signals are specified

Requirement for Differential Coupling between CC and D+/D− Requirement for Differential Coupling between VBUS and D+/D−

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 32 Notable Release 1.3 Updates for Chapter 3 (Mechanical) • USB 2.0 Type-C Receptacle defined • Power-Only Plug defined • Only for Sink applications • Cable Assembly Grounding • Requires all grounds and shields to be common • VBUS Coupling • Replaced maximum mutual inductance coupling (k) spec with maximum mutual inductance (M) spec – a more appropriate requirement • USB 2.0 D+/D− DC Resistance defined • Adapter Assembly Shielding Effectiveness specs updated • Added USB Type-C to USB 3.1 Standard-A Receptacle Adapter Assembly spec • Plug Overmold Length changed to a REF dimension

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 33 Latest Release 1.3 ECNs for Chapter 3 (Mechanical) • Metal Bull Nose definition • No plastic tips are permissible on the plug • Increases probability of ground touch being first • Increases structural integrity Metal Bull Nose

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 34 USB Type-C Signal Summary Signal Group Signal Description SSTXp1, SSTXn1 SuperSpeed USB serial data interface: one transmit SSRXp1, SSRXn1 USB 3.2 diff pair and one receive diff pair per lane SSTXp2, SSTXn2 Two pin sets to enable x2 operation SSRXp2, SSRXn2 Dp1, Dn1 USB 2.0 serial data interface USB 2.0 Dp2, Dn2 Two pin sets, one wire set to enable plug flipping CC1, CC2 (receptacle) CC channel in the plug used for connection detect, Configuration CC (plug) interface configuration, and USB PD comm channel Auxiliary signals SBU1, SBU2 Sideband Use

VBUS USB cable bus power USB plug power from Source via the “unused” CC1 Power VCONN (plug) or CC2 receptacle pin GND USB cable return current path

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 35 USB Type-C Configuration Channel (CC)  Detect attach of USB ports  Establish Source and Sink roles between two attached ports • Initially synonymous with Host and Device roles  Discover and configure VBUS  Discover and configure VCONN  Resolve cable orientation and twist connections to establish USB data bus routing • Also establishes Configuration Lane / Lane 0 for USB 3.2  Discover and configure optional Alternate and Accessory modes

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 36 USB Type-C – Functional Model • USB 3.2 data bus • Two sets of TX/RX pin pairs, Looking into the product receptacle: supports SuperSpeed USB x1 and x2 operation • USB 2.0 data bus • Two pin sets on host, one set on device – strapped together within the host and device • Two power buses • VBUS and VCONN Looking into the cable or product plug: • Two sideband pins (SBU1/SBU2) • CC – Configuration Channel • Two CC pins in connector • One CC wire in cable USB 3.2 USB 3.2 Lane 1 Configuration Lane / Lane 0

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 37 USB Type-C – Functional Model • USB Type-C Full-Featured Cable supports all USB operating modes

USB Type-C Implementation without Switch Full-Featured Cable1 Implementation with Switch

SSTX1 SSTX1   MUX SSRX1 SSRX1

CC wire Device CC1 CC1 USB Host USB D+/− USB D+/− USB CC Logic CC2 CC2 CC & VCONN Switch Logic

SSTX2 SSTX2   MUX SSRX2 SSRX2

USB Type-C Plugs

Note: 1. Required VBUS and Ground wires not shown in this illustration USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 38 USB 3.2 over USB Type-C Full-Featured Cable • Lane 0 (Plug A2/A3 + B11/B10)  Configuration Lane • Single-lane operation uses Lane 0 for backward compatibility

Configuration Lane

SSTX1 Lane 0 SSTX1   SSRX1 SSRX1

CC wire CC1 CC1 Host USB D+/− USB D+/− Device USB USB CC Logic CC2 CC2 CC & VCONN Switch Logic Lane 1 SSTX2 SSTX2   SSRX2 SSRX2

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 39 Direct Connect Functional Model

Implementation without Switch “Thumb Drive” x1 Implementation “Thumb Drive” x2 Implementation

Lane 0 Lane 0

SSTX1 SSRX SSTX1

SSRX1 SSTX SSRX1 Device USB CC1 CC CC Host USB D+/− USB D+/− USB D+/− Device USB USB CC Logic CC2 & VCONN Switch SSTX2 USB Type-C SSTX2 SSRX2 Plug SSRX2 Lane 1

• Platform implementation impact varies based on capabilities chosen and level of integration

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 40 Understanding USB Type-C port behaviors • Power roles: • Source – typical of Standard-A host or hub ports • Sink – typical of Standard-B or Micro-B device ports • Dual-Role Power (DRP) – can be either a Source or a Sink • Data roles: • DFP-mode only – typical of Standard-A host or hub ports • UFP-mode only – typical of Standard-B or Micro-B device ports • Dual-Role Data – typical of “on-the-go” ports

• Roles can be dynamically swapped using USB PD • Power role swap, data role swap, VCONN swap

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 41 USB Type-C – Pull-Up/Pull-Down CC Model

• Host side can substitute current sources for Rp • Powered cables and accessories introduce Ra at the “unwired” CC pins which are used to indicate the need for VCONN

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 42 USB Type-C – Source (Host) Detected Connection States

No device attached  Not flipped Device attached  Flipped

Device attached  Not flipped w/VCONN  Flipped

The CC pins magic decoder ring from the Source perspective

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 43 Source-Only Meets Sink-Only

Full-Featured Cable Source (showing CC and power only) Sink

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 44 DRP Functional Model for CC1/CC2

• DRP = Source + Sink • Aligns to correct role based on whatever gets attached

• For discovery, toggles between presenting as a Source or Sink • Cycles 10 – 20 times per second

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 45 Source-Only meets DRP  DRP resolves to Sink

Full-Featured Cable Source (showing CC and power only) DRP

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 46 DRP meets Sink-Only  DRP resolves to Source

Full-Featured Cable DRP (showing CC and power only) Sink

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 47 DRP meets DRP • Interesting situation  • The final result depends on multiple factors: • Randomness within the toggle protocol • Product configuration • User preferences dcSRC.DRP ∙ tDRP tDRPTransition Expose as Source

Expose as Sink tDRPTransition tDRP

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 48 DRP meets DRP  DRPs resolving to opposites

Full-Featured Cable DRP as a Source (showing CC and power only) DRP as a Sink

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 49 USB Type-C Swaps • Initial USB Type-C connect • Rp  VBUS and VCONN Source and Downstream Facing Port (USB Host) • Rd  VBUS Sink and Upstream Facing Port (USB Device) • Try.SRC and Try.SNK role swaps • Available even when USB PD is not present • Enable simple devices to exchange Rp and Rd at connect only • USB PD enabled role swaps • Power Role Swap • Data Role Swap • VCONN Source Swap

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 50 USB Host Supporting USB PD Source/Sink

• Supports USB PD data and power role swaps

• Normally Rp is presented • If the USB Host requires power to operate (e.g. dead battery case), present Rd and subsequently use USB PD to swap data roles

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 51 USB Device Supporting USB PD Sink/Source

• Supports USB PD data and power role swaps

• Normally Rd is presented • If the USB Device is able to charge a Host with dead battery, it periodically presents Rp

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 52 Adapting for Legacy Devices

Source Legacy Device Adapter

Standard-B

Micro-B

Represents the Mini-B legacy device

Standard-A receptacle

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 53 Adapting for Legacy Hosts/Chargers

Legacy Host Adapter Sink

Standard-A

Represents the legacy host as a USB Default power source Micro-B receptacle

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 54 USB Type-C Power • All solutions required to support Default USB Power appropriate to product – as defined by USB 2.0 and USB 3.2

Precedence Mode of Operation Nominal Voltage Maximum Current Highest USB PD Configurable 5 A USB Type-C Current @ 3.0 A 5 V 3.0 A USB Type-C Current @ 1.5 A 5 V 1.5 A ↓ USB BC 1.2 5 V Up to 1.5 A USB 3.2 x2 operation 5 V 1,500 mA* Default USB USB 3.2 x1 operation 5 V 900 mA* Power Lowest USB 2.0 5 V 500 mA* * Current available depends on device and bus operating state, e.g. unconfigured, low power, high power, suspend.

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 55 USB Type-C Current Sink Power • Source advertises level of USB Type-C Sub-States Current available • Sink may optionally draw higher current at 5 V when available and shall return to lower draw levels when Source advertises less

Source sets Rp value to set advertisement Cable Sink monitors for + current advertisement

Rp CC Rd

Rp Rd

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 56 Rp, Rd and Ra Termination Requirements • Value and interpretations ranges were impacted by USB Type-C Current and USB PD operating over CC

Source CC Termination (Rp) Requirements:

Sink CC Termination (Rd) Requirements:

Powered Cable Termination (Ra) Requirements:

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 57 Electronically Marked Cables

Required for: Source Sink • Cables that include SuperSpeed wires • Cables with a current rating greater than 3 A

• Electronic marking mechanism defined in USB PD • Cable info includes vendor information and cable features/ratings • Electronically marked cable limited to drawing 70 mW from VCONN

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 58 Active Cables

• An active cable is defined as an electronically marked cable with data bus signal conditioning circuits – typically used for implementing longer cables • Communicating with managed active cables defined in USB PD • VCONN power: up to 1 W for x1, up to 1.5 W for x2 operation

Attend Tuesday afternoon Track One sessions to learn more about Re-timers and Active Cables

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 59 Notable Release 1.3 Updates for Chapter 4 (Functional) • Various Connection State updates • Clarifications and fixes in Disabled, ErrorRecovery, AttachWait.SNK, Attached.SNK, AttachWait.SRC, Attached.SRC, and Try.SRC • UnattachedWait.SRC state added to allow time for turning off and discharging Vconn • tTryTimeout defined to resolve potential Try.SRC indefinite looping issue • User notification requirements in Unsupported.Accessory state • Requirements for USB Type-C chargers • Minimum power: 1.5 A @ 5 V and USB D+/D− shorting termination (emulates BC 1.2) • Clarify Rp advertisement timing • Multi-port Chargers: Assured and Shared Capacity chargers defined including behaviors and labeling • Proprietary Charging Methods no longer allowed • Source behaviors clarified for USB PD based on Explicit Contract state • When not in an Explicit Contract, make Rp track USB PD capability based on PDP • When in an Explicit Contract, clarify Rp behavior consistent with version of USB PD (2.0 versus 3.0) • VCONN-powered USB Devices defined • Enables USB Type-C digital headsets to operate on VCONN (wider range of voltage) • VCONN Requirements updated significantly • Source power required now based on Source features/states (USB 2.0 vs. SuperSpeed USB, VPD support, suspend state) • Updated/defined Cable and VCONN-powered Accessories/Devices Sink Characteristics • Cable state machine added to clarify power behaviors • USB 2.0-only Type-C Hubs allowed

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 60 USB Type-C Functional Extensions • Alternate Modes – enabling OEM product differentiation • Use of USB PD Structured Vendor Defined Messages (VDMs) to extend the functionality a device exposes • Only a subset of the pins can be re-purposed depending on product type

Looking into the cable or product plug:

All USB Type-C ports are required to function as compliant USB ports when not operating in a recognized Alternate Mode

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 61 Vendor-Specific and Standard Alternate Modes • Vendor-Specific Alternate Modes are specific to a Vendor ID (VID) • Intended for docking and other vendor proprietary designs • Standard Alternate Modes are specific to a Standard ID (SID) • Intended for industry standards that have agreements to use USB Type-C • Three user-visible modes exist today: • DisplayPort Alt Mode on USB Type-C  spec by VESA • MHL Alt Mode on USB Type-C  spec by MHL Consortium • HDMI 1.4 Alt Mode on USB Type-C  spec by HDMI Founders • USB Billboard Device Class • Used to identify incompatible connections made by users • This interface will appear on the device’s USB 2.0 bus when Alternate Modes are unable to be negotiated between the Host and Device

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 62 Notable Release 1.3 Updates for Chapter 5 (Functional Extensions)

• Alternate Modes – Section 5.1 • Alternate Mode expanders/docks defined • Downstream USB Type-C port are required, as appropriate, to support USB 2.0 and SuperSpeed USB • Note that receiver AC coupling capacitors could be present in a USB Type-C port implementation • Managed Active Cable behavior clarifications – Section 5.2 • Superseded by the Active Cable ECR against this spec

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 63 Latest Release 1.3 ECNs for Chapter 5 (Functional Extensions)

• Direct-Connect Alternate Modes now allowed to reconfigure A6/A7 • In addition to B5, B6 and B7 • Billboard support still required prior to reconfiguring A6/A7 • Active Cables defined for up to 5 meter length • Section 5.2 completely revised • Appendix D – Thermal Design Guidelines for Active Cables

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 64 USB Type-C Digital Audio (TCDA)  Appendix C • Enables a transition away from 3.5 mm analog audio • USB Audio Class 3.0 recommended – compatible with UAC 1.0/2.0 • Updated Audio Core, Formats and Terminal Types with expanded definitions to include more recent audio specs and features • Power Domains for improved and more granular internal power management • Basic Audio Device Definition (BADD) for simplified discovery and configuration to enable simpler hosts • Two defined TCDA implementations • Device with USB Type-C receptacle, operates off VBUS • Device with captive USB Type-C cable, operates off VBUS or VCONN (VCONN-powered USB Device)

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 65 Basic USB Type-C System Implementation Model UCSI Product Functional Embedded Controller Alt Mode USB Type-C USB Data Port Interface Port Manager I2C

USB Type-C Power Power Alt Mode PMIC Port Controller Source Sink

SBU1/2 Port VCONN Termination USB 3.1 USB 2.0 CC1/2, SBU1/2

VBUS, GND Receptacle

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 66 Data Bus Interface Implementation UCSI Product Functional MultipleEmbedded Controllersolutions available to implement Alt Mode USB Type-C USB Data Port depending on interfaces supported Interface • USBPort Manager generally sourced by host and device functionalI2C silicon • SimilarUSB Type with-C Alt Mode functionalPower buses Power Alt Mode PMIC Port• AltController Mode switch can be eitherSource integratedSink or discrete

SBU1/2 • SiliconPort IP available toV enableCONN host and device SOCsTermination USB 3.1 USB 2.0 CC1/2, SBU1/2

VBUS, GND Receptacle

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 67 USB Type-C Port Controller USB Type-C Port Manager UCSI • Port Policy Engine Product Functional Embedded Controller • USB Power Delivery Alt Mode USB Type-C USB Data Port Protocol Interface Port Manager • Interface to system I2C software via UCSI USB Type-C Power Power Alt Mode PMIC Port Controller Source Sink

USB TypeSBU1/2-C Port Controller Port VCONN • Port Power Control for Termination Port Manager and Controller VBUSUSBand 3.1 VCONN USB 2.0 CC1/2, SBU1/2collectively implement the • USB Power Delivery PHY USB Type-C State Machines • CC Logic Function VBUS, GND Receptacle

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 68 OS Policy Manager PD System Policy Manager (optional)

PPM Interface

Platform Policy Manager USB Type-C Port Controller InterfacePD Device P(TCPCI)olicy Manager (for PD-capable ports) • Interface between the USB Type-C Port Manager and one or more USB Type-C Port Controllers TCPM Interface • A comprehensive set of TCPC Type-C Port Manager Policy Engine registers defined TCPC Interface • Device capabilities Protocol Layer I2C Master • Control and configuration TCPC Interface (TCPCI) for TCPC, CC roles, Power I2C Slave I2C Slave I2C Slave and Faults Tx/Rx Buffer Tx/Rx Buffer Tx/Rx Buffer • Status for CC roles, Power GoodCRC / Retry GoodCRC / Retry and Faults GoodCRC / Retry Physical Layer Physical Layer Physical Layer • Revision 2.0 aligns with Type-C CC Logic Type-C CC Logic Type-C CC Logic latest USB Type-C and Type-C Port Controller Type-C Port Controller Type-C Port Controller USB PD updates

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 69 • System Level Overview • USB 3.2 Topic Agenda • USB Type-C™ • The Rest of the Story

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 70 Base Specifications

Enabling Specifications

Applications

Note: this illustration is not comprehensive of all USB specs.

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 71 USB Power Delivery (USB PD) The Advanced Connection Manager for USB Type-C applications • Enables advanced voltage and current negotiation • Enables higher voltage / current in order to deliver power up to 100W • Limits to match cable capabilities and international safety requirements • Switchable source of power delivery without changing cable direction • Coexists with USB BC 1.2 and USB Type-C Current • USB PD 3.0 Revision 1.1 adds Required Fixed Voltages by PDP rating Fast Charging • Programmable Power Supply 5V 5 + 9V 5 + 9 + 15V offers Sink directed voltage and current modes (A) Current

• Also used in USB Type-C for

15W 27W 45W configuration management 7.5W

Source Power Rating (W)

USB Developer Days – October 24 – 25, 2017 September 12, 2017 USB Implementers Forum © 2017 72 USB Type-C Authentication Specification • Protocol for authenticating USB hosts, devices, cables and power sources • Implementation supported over: • Legacy or USB Type-C connectors for authentication via USB data bus • USB Type-C connectors for authentication via USB Power Delivery over CC • Products retains responsibility for the security policies that are implemented and enforced • Released April 2016

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 73 USB PD Firmware Update

• Defines a common method PDFU Initiator PDFU Responder USB Type-C cable to update the firmware in a Sink / Source Source / Sink USB PD-capable device • Examples: USB Type-C Charger, USB Type-C Alt

Mode device PDFU USB Type-C cable PD Port PDFU SOP’ PDFU SOP” Responder Responder • Secure method designed Initiator Partner to thwart installation of compromised firmware PDFU Responder USB

• Complements existing USB Type-C cable PDFU Initiator Hub Source/Sink USB DFU Class implementations USB data communication USB PD communications

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 74 USB Type-C Bridge Class Specification

• Method for a USB host to communicate USB Type-C with downstream USB Type-C receptacles Device • Bridge is an integral part of a Device Container Container USB Hub Logic (Hub, Dock, or Charge Through AM Adapter) or • Commands to bridge via USB 2.0 Control USB Device Logic endpoint • Issue resets, get capability/status info, and acknowledge asynchronous notifications USB Type-C Bridge • Responses/Notifications to host via USB 2.0 Interrupt IN endpoint USB PD Logic

• Responses notify host of Command completions Device Policy Manager (DPM) • Notifications notify host of asynchronous events

• Usages Policy Engine Policy Engine Policy Engine • Discover and communicate with USB PD Protocol Layer Protocol Layer Protocol Layer capabilities of downstream ports Physical Layer Physical Layer Physical Layer • Authentication of USB PD-based devices connected on DS ports USB Type-C USB Type-C USB Type-C • Can be used to expose Billboard Device Class

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 75 USB Display Class  on-going USB-IF DWG WG activity • Enable USB-based displays and display adapters • USB displays are for output only applications • Supporting multiple monitors, boot usages, scalable resolutions/frame rate • Capable of displaying protected content • Full operation through USB hubs

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 76 USB Developer Days – Technical Session Schedule Tuesday – Day 1 Wednesday – Day 2 Track One Track Two Track One Track Two  8:30 AM  Registration 8:45  9:00 AM  USB Power Delivery Welcome Keynote 9:15 9:30 Part 1  9:45 AM  Break  10:00 AM   10:15 AM  Break  10:30 AM  USB Technical Overview 10:45 11:00 USB Power Delivery (USB 3.2, USB Type-C™ and More) 11:15 Part 2 11:30 11:45  12:00 PM  12:15 12:30 Lunch / Showcase 12:45 Lunch / Showcase 1:00 1:15  1:30 PM  1:45 USB-C™ Bridge for PDUSB Hubs USB-C™ and Power Delivery 2:00 USB Type-C™ Charging 2:15 and Charge-Through USB 3.2 PHY, Link and Re-timers Architecture in Windows 10  2:30 PM  2:45 Designing USB Type-C™ and USB Type-C™ Authentication  3:00 PM  Break 3:15 Power Delivery Systems and Firmware Update  3:30 PM  Break Make the User Happy: 3:45 Break Interoperability Do’s and Don’ts  4:00 PM  4:15 USB Type-C™ Active Cables Nifty USB Type-C™ Features 4:30 The CTO Hour and Optimizations 4:45  5:00 PM 

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 77 Q&A

USB Developer Days – October 24 – 25, 2017 USB Implementers Forum © 2017 78