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Runtime Multicore Scheduling Techniques for Dispatching Parameterized Signal and Vision Dataflow Applications on Heterogeneous Mpsocs Julien Heulot

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Runtime Multicore Scheduling Techniques for Dispatching Parameterized Signal and Vision Dataflow Applications on Heterogeneous Mpsocs Julien Heulot Runtime multicore scheduling techniques for dispatching parameterized signal and vision dataflow applications on heterogeneous MPSoCs Julien Heulot To cite this version: Julien Heulot. Runtime multicore scheduling techniques for dispatching parameterized signal and vi- sion dataflow applications on heterogeneous MPSoCs. Signal and Image processing. INSA deRennes, 2015. English. NNT : 2015ISAR0023. tel-01301642 HAL Id: tel-01301642 https://tel.archives-ouvertes.fr/tel-01301642 Submitted on 12 Apr 2016 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. Résumé Abstract Thèse Une tendance importante dans le domaine de l’embarqué est l’intégration An important trend in embedded processing is the integration of de plus en plus d’éléments de calcul dans les systèmes multiprocesseurs increasingly more processing elements into Multiprocessor Systems- sur puce (MPSoC). Cette tendance est due en partie aux limitations des on-Chip (MPSoC). This trend is due in part to limitations in processing puissances individuelles de ces éléments causées par des considérations power of individual elements that are caused by power consumption de consommation d’énergie. Dans le même temps, en raison de leur considerations. At the same time, signal processing applications are sophistication croissante, les applications de traitement du signal ont becoming increasingly dynamic in terms of their hardware resource des besoins en puissance de calcul de plus en plus dynamique. Dans requirements due to the growing sophistication of algorithms to reach la conception et le développement d’applications de traitement de signal higher levels of performance. In design and implementation of multicore multicoeur, l’un des principaux déis consiste à répartir eficacement les signal processing systems, one of the main challenges is to dispatch différentes tâches sur les éléments de calcul disponibles, tout en tenant computational tasks eficiently onto the available processing elements compte des changements dynamiques des fonctionnalités de l’application while taking into account dynamic changes in application functionality and et des ressources disponibles. Une utilisation ineficace peut conduire à une resource requirements. An ineficient use can lead to longer processing 2015 durée de traitement plus longue et/ou une consommation d’énergie plus times and higher energy consumption, making multicore task scheduling élevée, ce qui fait de la répartition des tâches sur un système multicoeur a very dificult problem to solve. une tâche dificile à résoudre. Datalow process network Models of Computation (MoCs) are widely Les modèles de calcul (MoC) lux de données sont communément utilisés used in design of signal processing systems. It decomposes application dans la conception de systèmes de traitement du signal. Ils décomposent la functionality into actors that communicate data exclusively through fonctionnalité de l’application en acteurs qui communiquent exclusivement channels. The interconnection of actors and communication channels is par l’intermédiaire de canaux. L’interconnexion des acteurs et des canaux modeled and manipulated as a directed graph, called a datalow graph. de communication est modélisée et manipulée comme un graphe orienté, There are different datalow MoCs which offer different trade-off between appelé un graphique de lux de données. Il existe différents MoCs de predictability and expressiveness. These MoCs are widely used in design lux de données qui offrent différents compromis entre la prédictibilité et of signal processing systems l’expressivité. Ces modèles de calculs sont communément utilisés dans due to their analyzability and their natural parallel expressivity. la conception de systèmes de traitement du signal en raison de leur analysabilité et leur expressivité naturelle du parallélisme de l’application. In this thesis, we propose a novel scheduling method to address multicore scheduling challenge. This scheduling method determines scheduling Dans cette thèse, une nouvelle méthode de répartition de tâches est decisions strategically at runtime to optimize the overall execution time proposée ain de répondre au déi que propose la programmation of applications onto heterogeneous multicore processing resources. multicoeur. Cette méthode de répartition de tâches prend ses décisions en Applications are described using the Parameterized and Interfaced temps réel ain d’optimiser le temps d’exécution global de l’application. Les Synchronous DataFlow (PiSDF) MoC. The PiSDF model allows describing applications sont décrites en utilisant le modèle paramétrée et interfacé parameterized application, making possible changes in application’s lux de données (PiSDF). Ce modèle permet de décrire une application resource requirement at runtime. At each execution, the parameterized paramétrée en autorisant des changements dans ses besoins en datalow is then transformed into a locally static one used to eficiently ressources de calcul lors de l’exécution. A chaque exécution, le modèle de schedule the application with an a priori knowledge of its behavior. THESE INSA Rennes présentée par lux de données paramétré est déroulé en un modèle intermédiaire faisant The proposed scheduling method have been tested and benchmarked sous le sceau de l’Université européenne de Bretagne apparaitre toute les tâches de l’application ainsi que leurs dépendances. on multiple state-of-the-art applications from computer vision, signal pour obtenir le titre de Julien Heulot processing and multimedia domains. Ce modèle est ensuite utilisé pour répartir eficacement les tâches de DOCTEUR DE L’INSA DE RENNES ECOLE DOCTORALE : MATISSE l’application. La méthode proposé a été testée et validé sur plusieurs Spécialité : Traitement du Signal et de l’Image LABORATOIRE : IETR applications des domaines de la vision par ordinateur, du traitement du signal et du multimédia. Julien HEULOT Thèse soutenue le 24.11.2015 Runtime Multicore devant le jury composé de : Scheduling Techniques Alix MUNIER-KORDON Professeur au LIP6 Paris / Présidente for Dispatching Gilles SASSATELLI Directeur de Recherche au LIRMM, Montpellier / Rapporteur Alain GIRAULT Parameterized Directeur de Recherche à l’INRIA Grenoble / Rapporteur Johan LILIUS Signal and Vision Professeur à l’Abo Akademi (Finlande) / Examinateur John McALLISTER Datalow Applications Maitre de Conférence au Queen’s University of Belfast (UK) / Examinateur Slaheddine ARIDHI on Heterogeneous Docteur, Texas Instruments France / Encadrant Maxime PELCAT MPSoCs Maitre de Conférence à INSA Rennes / Encadrant Jean-François NEZAN N° d’ordre : 15ISAR 27 / D15 - 27 Professeur à l’INSA Rennes / Directeur de thèse Institut National des Sciences Appliquées de Rennes 20, Avenue des Buttes de Coësmes CS 70839 F-35708 Rennes Cedex 7 Tel : 02 23 23 82 00 - Fax : 02 23 23 83 96 Runtime Multicore Scheduling Techniques for Dispatching Parameterized Signal and Vision Dataflow Applications on Heterogeneous MPSoCs Julien Heulot Document protégé par les droits d’auteur Contents Acknowledgements 1 1 Introduction 3 1.1 General Context ................................. 3 1.1.1 Embedded Systems Constraints ..................... 3 1.1.2 Designing an Embedded Systems .................... 4 1.1.3 Embedded Parallel Systems ....................... 4 1.1.4 Dataflow Programming ......................... 5 1.2 Contributions of the Thesis ........................... 5 1.3 Outline ...................................... 5 I Background 7 2 Embedded Parallel Platforms 9 2.1 Introduction .................................... 9 2.2 Parallel Embedded System architecture .................... 10 2.2.1 What is an parallel embedded system ? . 10 2.2.2 Processing Element Types and Platform Heterogeneity . 11 2.2.3 Memory architecture of embedded systems . 12 2.2.3.1 Memory Organization: Shared or Distributed . 12 2.2.3.2 Memory Hierarchy ....................... 12 2.3 Parallel programming methods ......................... 13 2.3.1 Programming Styles ........................... 13 2.3.2 Granularity of Parallelism ........................ 14 2.3.3 Parallelism sources ............................ 15 2.3.4 Parallel Programming techniques .................... 16 2.3.4.1 Multicore scheduling ...................... 16 2.3.4.2 Scheduling approaches ..................... 17 2.3.4.3 An embedded programing runtime: the Open Event Machine 18 2.4 Conclusion ..................................... 19 i ii CONTENTS 3 Dataflow Models of Computation 21 3.1 Introduction .................................... 21 3.2 Dataflow Models of Computation (MoC): an Overview . 22 3.2.1 What is a Model of Computation (MoC) ? . 22 3.2.2 Dataflow MoC Definition ........................ 22 3.2.3 Dataflow MoC Properties ........................ 23 3.3 The Landscape of Dataflow MoCs ........................ 26 3.3.1 Static Dataflow MoCs .......................... 26 3.3.1.1 The Synchronous Dataflow (SDF) MoC . 26 3.3.1.1.1 Consistency and Schedulability of SDF . 27 3.3.1.1.2 A pre-scheduling transformation of SDF graphs . 28 3.3.1.2 The Cyclo-Static Dataflow
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