"How To" Build Custom Micro Controller Projects

Total Page:16

File Type:pdf, Size:1020Kb

" H o w t o " b u i l d c u s t o m m i c r o c o n t r o l l e r p r o j e c t s Texas Instruments MSP430 Microcontrollers Ross Smith PhD candidate Wearable Computer Lab University of South Australia O v e r v i e w Design/Building Process ●Why we use microcontrollers ●Circuit Design ●PCB Layout Software ●Building PCBs ●MSPGCC/Debugging ●Code Examples - simple ●Past Projects ●Problems http://r-smith.net/lca2007 2 W h y w e u s e M i c r o c o n t r o l l e r s ●Prototypes ●Small – Light weight ●Low power – MSP430x ●Wearable Computing ●Customisable for each problem domain ●Cheap – after setup costs http://r-smith.net/lca2007 3 M S P 4 3 0 F 1 2 3 2 - S p e c s Yes there are others... this one is low power ●Ultra Low Power Consumption 1.8-3.6 V ●200uA in active mode (3.3V) ●.1uA with RAM retention (3.3V) ●16-Bit RISC ●ADC 10bit 200 ksps ●UART Serial RS232 ●8KB Flash Memory ●256 bytes RAM ●22 GPIO pins ●http://en.wikipedia.org/wiki/MSP430 http://r-smith.net/lca2007 4 C i r c u i t D e s i g n ●I am not an electrical engineer ●There are many simple digital circuits DIY ●I/O pin access ●RS232 (Bluetooth) ●ADC http://r-smith.net/lca2007 5 C i r c u i t D e s i g n – I / O P i n s Input ●Buttons / communications ●Generally require a pull-up resistor Output ●Only for very small currents ●Driving low current LEDs ●Use a transistor if larger currents are required http://r-smith.net/lca2007 6 C i r c u i t D e s i g n - R S 2 3 2 ●Level shift required if talking to PC ●Often not needed when talking to other chips ●Max232 or other varieties MAX3232 etc. http://r-smith.net/lca2007 7 C i r c u i t D e s i g n - A D C ●Choose a voltage level to work with 0-1.5 1.5-3 ●Attach source to ADC pin ●Mainly a software problem from here (later on) ●Eg: Battery monitoring / Analogue position http://r-smith.net/lca2007 8 C i r c u i t D e s i g n - N o t e s ●SMD parts save space / but not too small ●SOP 50mil pin-pin OK ●SSOP 20mil pin-pin hard & magnification required ●SMD resistors/capacitors and diodes OK http://r-smith.net/lca2007 9 P C B S o f t w a r e ●Requirements – Schematic Layout and PCB layout ●Want to print transparent positives of PCB ●Protel – Used in the past ●Eagle – swapping to this* ●PCB – Recently trying out have to use third party schematic editor gEDA or xcircuit http://r-smith.net/lca2007 10 P C B S o f t w a r e – E a g l e ●Additional lib required for MSP430s ●Can make custom parts ●Freeware ●Limited Board size 100 x 80 mm ●Maximum double layer boards ●Only one schematic http://r-smith.net/lca2007 11 C o n s t r u c t i o n - E t c h i n g ●Set up a clean work area ●Prepare transparency ●Double sided example ●Two transparencies using double sided tape ●Print on the side touching the PCB http://r-smith.net/lca2007 12 C o n s t r u c t i o n ●Remove the protective plastic ●Expose using UV light box 6m30s per side http://r-smith.net/lca2007 13 C o n s t r u c t i o n ●Develop using DP-50 (Alkaline powder) ●Rinse in water before etching http://r-smith.net/lca2007 14 C o n s t r u c t i o n ●Etch using Ammonium Persulphate NH4 (ferric chloride FeCl3) ●Common Alternative ●Remains transparent while etching ●Watch for the edges of the board to disappear http://r-smith.net/lca2007 15 C o n s t r u c t i o n ●Hand Drill holes ●CNC Mill if you have it ●Solder components ●Add vias http://r-smith.net/lca2007 16 A c q u i r i n g P a r t s – F r e e S a m p l e s Texas instruments – go to http://ti.com ●MSP430's ●Voltage Regulators ●Level shifting chips Good for large quantities Maxim - http://www.maxim-ic.com Level shifting chips National Semiconductors - http://www.national.com ●3A H-Bridge chips - LMD18200 http://r-smith.net/lca2007 17 P r o g r a m m i n g M S P 4 3 0 s ●MSPGCC - http://mspgcc.sourceforge.net ●Provided notes I used while compiling and using mspgcc http://r-smith.net/lca2007 ●Extended commands with GDB ●Code Composer Essentials (Windows) eclipse based environment ●JTAG programming / runtime debugging http://r-smith.net/lca2007 18 D e b u g g i n g - M S P G D B - p r o x y ●erase – target flash memory ●puc – reset over jtag using Power Up Clear ●reset – hardware reset ●identify – the msp device information ●jtag - Report how JTAG is to be handled when a program is running ●vcc – report/define the current voltage ●dump – read out target registers monitor erase all load myProgram http://r-smith.net/lca2007 19 D e b u g g i n g JTAG – runtime debugging Serial – console debugging LEDS – watch for the flashing lights !! http://r-smith.net/lca2007 20 C o d e E x a m p l e s Controlling IO Pins (Flash P1.0) P1DIR = 0x01 int main(){ while(true) P1OUT = P1OUT ^ 0x01 delay(1000) } http://r-smith.net/lca2007 21 C o d e E x a m p l e s – A D C /*Disable the ADC to change the input channel*/ ADC10CTL0 &= ~ENC; /*Select the input channel P2.1*/ ADC10CTL1=INCH_11; /*Re-enable the ADC*/ ADC10CTL0 |= ENC; http://r-smith.net/lca2007 22 C o d e E x a m p l e s - A D C /*Request a sample from the ADC, this takes 6 clock cycles*/ ADC10CTL0 |= ADC10SC; /*Go into low power mode while we wait for a result the interrupt will wake up up when it is ready*/ // _BIS_SR(CPUOFF + GIE); or ADC10BUSY? while (ADC10CTL1 & ADC10BUSY); return ADC10MEM; http://r-smith.net/lca2007 23 P a s t P r o j e c t s ●Tinmith Glove Controller ●Detects button presses of fingers to thumb/palm ●Li Po Battery powered ●Monitors battery state ●Bluetooth communications ●Conductive fabric for wires in gloves ●Conductive material on finger tips for switch pads http://r-smith.net/lca2007 24 P a s t / C u r r e n t P r o j e c t s – T i m n i t h B a c k p a c k ●Controls simple tasks but makes our life easy :) ●Uses MSP430 to init hardware ●When power is applied it: ●pulses laptop, GPS and HMD to turn on http://r-smith.net/lca2007 25 P a s t / C u r r e n t P r o j e c t s – T i n m i t h B a c k p a c k Accepts RS232 (USB) commands allowing: ●GPS reset ●Temperature reading ●Encoder allows different configurations on start up (0-9) ●Software controllable status lights ●Laptop On/Off (Cut own throat) http://r-smith.net/lca2007 26 I n t e r e s t i n g P r o b l e m s / L i m i t a t i o n s ●RS232 heat issues using DCO ●Avoid using Jtag pins for I/O (they are used for runtime debugging) ●8Mhz can be a limitation depending on workload http://r-smith.net/lca2007 27 Q u e s t i o n s ? Links: http://r-smith.net/lca2007 My notes http://ti.com - Samples http://national.com - Samples http://maxim-ic.com - Samples http://www.cadsoft.de/freeware.htm - Eagle http://sourceforge.net/projects/pcb - PCB http://www.geda.seul.org - gEDA schematic http://opencircuitdesign.com/xcircuit http://r-smith.net/lca2007 28 C o s t o f P a r t s UV Box - $300 Kinsten PCB - $7 - $30 Etchant (Ammonium Persulphate 2.5Kg) - $24 Etching Tank / Heater / Pump - $108 Developer - $3.30 Soldering Iron - $30 Drill - $60 http://r-smith.net/lca2007 29.
Recommended publications
  • Amateur Radio Software Distributed with (X)Ubuntu LTS Serge Stroobandt, ON4AA
    Amateur Radio Software Distributed with (X)Ubuntu LTS Serge Stroobandt, ON4AA Copyright 2014–2018, licensed under Creative Commons BY-NC-SA Introduction Amateur radio (also called “ham radio”), is a technical hobby Many ham radio stations are highly integrated with computers. Radios are interfaced with com- puters to aid with contact logging, propagation prediction, station spotting, antenna steering, signal (de)modulation and filtering. For many years, amateur radio software has been a bastion of Windows™ ap- plications developed by However, with the advent of the Rasperry Pi, amateur radio hobbyists are slowly but surely discovering GNU/Linux. Most of the software for GNU/Linux is available through package repositories. Such package repositories come by default with the GNU/Linux distribution of your choice. Package management systems offer many benefits in the form of security (you know what you are getting from whom) and ease-of-use (packages are upgraded automatically). No longer does one need to wander the back corners of the internet to find wne or updated software, exposing oneself to the risk of catching a computer virus. A number of GNU/Linux distributions offer freely installable ham-related packages under the “Amateur Radio” section of their main repository. The largest collection of ham radio packages is offeredy b OpenSuse and De- bian-derived distributions like Xubuntu LTS and Linux Mint, to name but a few. Arch Linux may also have whole bunch of ham related software in the Arch User Repository (AUR). 1 Synaptic One way to find and tallins ham radio packages on Debian-derived distros is by using the Synaptic graphical package manager (see Figure 1).
    [Show full text]
  • Elementary Filter Circuits
    Modular Electronics Learning (ModEL) project * SPICE ckt v1 1 0 dc 12 v2 2 1 dc 15 r1 2 3 4700 r2 3 0 7100 .dc v1 12 12 1 .print dc v(2,3) .print dc i(v2) .end V = I R Elementary Filter Circuits c 2018-2021 by Tony R. Kuphaldt – under the terms and conditions of the Creative Commons Attribution 4.0 International Public License Last update = 13 September 2021 This is a copyrighted work, but licensed under the Creative Commons Attribution 4.0 International Public License. A copy of this license is found in the last Appendix of this document. Alternatively, you may visit http://creativecommons.org/licenses/by/4.0/ or send a letter to Creative Commons: 171 Second Street, Suite 300, San Francisco, California, 94105, USA. The terms and conditions of this license allow for free copying, distribution, and/or modification of all licensed works by the general public. ii Contents 1 Introduction 3 2 Case Tutorial 5 2.1 Example: RC filter design ................................. 6 3 Tutorial 9 3.1 Signal separation ...................................... 9 3.2 Reactive filtering ...................................... 10 3.3 Bode plots .......................................... 14 3.4 LC resonant filters ..................................... 15 3.5 Roll-off ........................................... 17 3.6 Mechanical-electrical filters ................................ 18 3.7 Summary .......................................... 20 4 Historical References 25 4.1 Wave screens ........................................ 26 5 Derivations and Technical References 29 5.1 Decibels ........................................... 30 6 Programming References 41 6.1 Programming in C++ ................................... 42 6.2 Programming in Python .................................. 46 6.3 Modeling low-pass filters using C++ ........................... 51 7 Questions 63 7.1 Conceptual reasoning ...................................
    [Show full text]
  • Getting Started in High Performance Electronic Design
    Getting started in high performance electronic design Wojtek Skulski Department of Physics and Astronomy University of Rochester Rochester, NY 14627-0171 skulski _at_ pas.rochester.edu First presented May/23/2002 Updated for the web July/03/2004 Wojtek Skulski May/2002 Department of Physics and Astronomy, University of Rochester Getting started with High performance electronic design • 3-hour class • Designing high performance surface mount and multilayer boards. • What tools and resources are available? • How to get my design manufactured and assembled? • Board design with OrCAD Capture and Layout. • When and where: • Thursday, May/23/2002, 9-12am, Bausch&Lomb room 106 (1st floor). • Slides updated for the web July/03/2004. • Reserve your handout. • Send e-mail to [email protected] if you plan to attend. • Walk-ins are invited, but there may be no handouts if you do not register. • See you there! Wojtek Skulski May/2002 Department of Physics and Astronomy, University of Rochester The goal and outline of this class • Goal: • Describe the tools available to us for designing high performance electronic instruments. • Outline • Why do we need surface mount and multilayer boards? • What tools and resources are available? • How to get my PCB manufactured? • How to get my board assembled? • Designing with OrCAD Capture and OrCAD Layout. • The audience • You know the basics of electronics. • … and you need to get going quickly with your design. Wojtek Skulski May/2002 Department of Physics and Astronomy, University of Rochester Disclaimer • I am describing tools and methods which work for me. • I do not claim that this information is complete.
    [Show full text]
  • Nanoelectronic Mixed-Signal System Design
    Nanoelectronic Mixed-Signal System Design Saraju P. Mohanty Saraju P. Mohanty University of North Texas, Denton. e-mail: [email protected] 1 Contents Nanoelectronic Mixed-Signal System Design ............................................... 1 Saraju P. Mohanty 1 Opportunities and Challenges of Nanoscale Technology and Systems ........................ 1 1 Introduction ..................................................................... 1 2 Mixed-Signal Circuits and Systems . .............................................. 3 2.1 Different Processors: Electrical to Mechanical ................................ 3 2.2 Analog Versus Digital Processors . .......................................... 4 2.3 Analog, Digital, Mixed-Signal Circuits and Systems . ........................ 4 2.4 Two Types of Mixed-Signal Systems . ..................................... 4 3 Nanoscale CMOS Circuit Technology . .............................................. 6 3.1 Developmental Trend . ................................................... 6 3.2 Nanoscale CMOS Alternative Device Options ................................ 6 3.3 Advantage and Disadvantages of Technology Scaling . ........................ 9 3.4 Challenges in Nanoscale Design . .......................................... 9 4 Power Consumption and Leakage Dissipation Issues in AMS-SoCs . ................... 10 4.1 Power Consumption in Various Components in AMS-SoCs . ................... 10 4.2 Power and Leakage Trend in Nanoscale Technology . ........................ 10 4.3 The Impact of Power Consumption
    [Show full text]
  • Pcb-20050609 an Interactive Printed Circuit Board Layout System for X11
    1 Pcb-20050609 an interactive printed circuit board layout system for X11 harry eaton i Table of Contents Copying ...................................... 1 History ....................................... 2 1 Overview .................................. 4 2 Introduction ............................... 5 2.1 Symbols .................................................... 5 2.2 Vias........................................................ 5 2.3 Elements ................................................... 5 2.4 Layers ...................................................... 7 2.5 Lines ....................................................... 8 2.6 Arcs........................................................ 9 2.7 Polygons ................................................... 9 2.8 Text ...................................................... 10 2.9 Nets....................................................... 10 3 Getting Started........................... 11 3.1 The Application Window ................................... 11 3.1.1 Menus ................................................ 11 3.1.2 The Status-line and Input-field ......................... 14 3.1.3 The Panner Control.................................... 14 3.1.4 The Layer Controls .................................... 15 3.1.5 The Tool Selectors ..................................... 16 3.1.6 Layout Area........................................... 18 3.2 Log Window ............................................... 18 3.3 Library Window ........................................... 18 3.4 Netlist Window
    [Show full text]
  • Ngspice User Manual
    Ngspice User’s Manual Version 35 plus (ngspice development version) Holger Vogt, Marcel Hendrix, Paolo Nenzi, Dietmar Warning September 27, 2021 2 Locations The project and download pages of ngspice may be found at Ngspice home page http://ngspice.sourceforge.net/ Project page at SourceForge http://sourceforge.net/projects/ngspice/ Download page at SourceForge https://sourceforge.net/projects/ngspice/files/ng-spice- rework/ Git source download https://sourceforge.net/p/ngspice/ngspice/ci/master/tree/ Status This manual is a work in progress. Some to-dos are listed in Chapt. 24.3. More is surely needed. You are invited to report bugs, missing items, wrongly described items, bad English style, etc. How to use this Manual The manual is a “work in progress.” It may accompany a specific ngspice release, e.g. ngspice-35 as manual version 35. If its name contains ‘Version xxplus’, it describes the actual code status, found at the date of issue in the Git Source Code Management (SCM) tool. This manual is intended to provide a complete description of ngspice’s functionality, features, commands, and procedures. This manual is not a book about learning SPICE usage, however the novice user may find some hints how to start using ngspice. Chapter 21.1 gives a short introduction how to set up and simulate a small circuit. Chapter 32 is about compiling and installing ngspice from a tarball or the actual Git source code, which you may find on the ngspice web pages. If you are running a specific Linux distribution, you may check if it provides ngspice as part of the package.
    [Show full text]
  • Hardware Description Language Modelling and Synthesis of Superconducting Digital Circuits
    Hardware Description Language Modelling and Synthesis of Superconducting Digital Circuits Nicasio Maguu Muchuka Dissertation presented for the Degree of Doctor of Philosophy in the Faculty of Engineering, at Stellenbosch University Supervisor: Prof. Coenrad J. Fourie March 2017 Stellenbosch University https://scholar.sun.ac.za Declaration By submitting this dissertation electronically, I declare that the entirety of the work contained therein is my own, original work, that I am the sole author thereof (save to the extent explicitly otherwise stated), that reproduction and publication thereof by Stellenbosch University will not infringe any third party rights and that I have not previously in its entirety or in part submitted it for obtaining any qualification. Signature: N. M. Muchuka Date: March 2017 Copyright © 2017 Stellenbosch University All rights reserved i Stellenbosch University https://scholar.sun.ac.za Acknowledgements I would like to thank all the people who gave me assistance of any kind during the period of my study. ii Stellenbosch University https://scholar.sun.ac.za Abstract The energy demands and computational speed in high performance computers threatens the smooth transition from petascale to exascale systems. Miniaturization has been the art used in CMOS (complementary metal oxide semiconductor) for decades, to handle these energy and speed issues, however the technology is facing physical constraints. Superconducting circuit technology is a suitable candidate for beyond CMOS technologies, but faces challenges on its design tools and design automation. In this study, methods to model single flux quantum (SFQ) based circuit using hardware description languages (HDL) are implemented and thereafter a synthesis method for Rapid SFQ circuits is carried out.
    [Show full text]
  • Release Notes Fedora Electronic Lab 12 'Constantine'
    Release Notes Fedora Electronic Lab 12 ’Constantine’ Revision October 3, 2009 Publication ID EDA-FEL-012/PP#01.00 Fedora Electronic Lab 12 ’Constantine’ 2009 - CONTENTS Contents 1 Overview 3 2 Collaborative Code review 4 3 Eclipse default IDE 6 4 Analog ASIC Design 8 5 Spice Simulation 11 6 Embedded Design 13 7 Digital Design 15 8 Circuit and PCB 18 9 Perl Scripts for Hardware design 21 10 EPEL-5 Repository 22 11 Submenu support on electronics-menu 24 12 Bugzilla Reports and Closed Tickets 25 2 Fedora Electronic Lab 12 ’Constantine’ 2009 - 1 OVERVIEW 1 Overview Revision History The following table shows the revision history for this document. Date Version ChangeLog Author 20/07/2009 0.1 Initial draft release Chitlesh Goorah 10/09/2009 0.1.1 Added PLA, Verilog & 8051 micro- Shakthi Kannan controller related content 15/09/2009 0.1.2 Added EPEL-5 content & Peer Chitlesh Goorah Review methodology 29/09/2009 0.1.3 Added geda, picprog and avra Chitlesh Goorah content 01/10/2009 0.1.4 Updated Toped content Krustev Svilen 03/10/2009 0.1.5 Draft freezed for release 12 Chitlesh Goorah Abstract These release notes present the latest information about Fedora Project’s high- end microelectronic design platform : Fedora Electronic Laboratory (FEL)[1] 12. The following section covers new design methodologies, new EDA software, software updates, stability on 64 bit architectures and multiple bug fixes to the existing platform. Notice The information provided by this document strictly applies to Fedora Project’s product Fedora 12 and the EPEL-5[2] repository.
    [Show full text]
  • Yuniel Freire Hernández.Pdf
    Universidad Central “Marta Abreu” de Las Villas Facultad de Ingeniería Eléctrica Departamento de Telecomunicaciones y Electrónica TRABAJO DE DIPLOMA Simulación de Circuitos Digitales con Software Libre Autor: Yuniel Freire Hernández Tutor: Ing. Erisbel Orozco Crespo Santa Clara 2012 Universidad Central “Marta Abreu” de Las Villas Facultad de Ingeniería Eléctrica Departamento de Telecomunicaciones y Electrónica TRABAJO DE DIPLOMA Simulación de Circuitos Digitales con Software Libre Autor: Yuniel Freire Hernández Tutor: Ing. Erisbel Orozco Crespo Profesor, Dpto. Telec. Y Electrónica Santa Clara 2012 Hago constar que el presente trabajo de diploma fue realizado en la Universidad Central “Marta Abreu” de Las Villas como parte de la culminación de estudios de la especialidad de Ingeniería en Telecomunicaciones y Electrónica, autorizando a que el mismo sea utilizado por la Institución, para los fines que estime conveniente, tanto de forma parcial como total y que además no podrá ser presentado en eventos, ni publicados sin autorización de la Universidad. Firma del Autor Los abajo firmantes certificamos que el presente trabajo ha sido realizado según acuerdo de la dirección de nuestro centro y el mismo cumple con los requisitos que debe tener un trabajo de esta envergadura referido a la temática señalada. Firma del Tutor Firma del Jefe de Departamento donde se defiende el trabajo Firma del Responsable de Información Científico-Técnica PENSAMIENTO No fracasé, sólo descubrí 999 maneras de cómo no hacer una bombilla. Thomas Alva Edison AGRADECIMIENTOS A todos los profesores que brindaron sus conocimientos para mi formación. A mi tutor por su paciencia, esmero y dedicación. A mis amigos y compañeros por resistirme.
    [Show full text]
  • FOSS) in Engineering 
    A SunCam online continuing education course Free Open-Source Software (FOSS) in Engineering By Raymond L. Barrett, Jr., PhD, PE CEO, American Research and Development, LLC Free Open-Source Software in Engineering A SunCam online continuing education course 1.0 Introduction to “Free Open-Source Software” (FOSS) This course introduces the engineer to the subject of “Free Open-Source Software” (FOSS). Quotes from various sources are included widely throughout the course. Each quote is indicated by the use of the italic fonts to set it off, as well as the quote marks used. Each quote is obtained, along with a “screen shot” of its source from the internet, as are the tools themselves. The spelling errors within the quotes are kept as in the source and not corrected or otherwise edited in any way. Although there is a rich history of free distribution of software, some commercial ventures have striven to eliminate the practice, providing proprietary commercial and often copyrighted software products as an alternative. Commercial software has its advantages with deep and wide support that is sometimes lacking in the open-source community. However, the price of commercial software is often a barrier-to-entry for emerging small and medium enterprise (SME). As a particular case exemplified in this course, the “Silicon Renaissance Initiative” was formed to address the high-cost of Engineering Design Automation (EDA) software tools and the design flow for that use is presented. As an alternative, the commercial tools often require hundreds of thousands of dollars investment to support the design effort. In the USA, with its copyright enforcement, the SME faces competition from foreign entities with “illegal” copies of commercial software and thus cannot compete.
    [Show full text]
  • An Open Source Approach for ASIC Design Flow Kesari Ananda Samhitha Y
    Journal of Interdisciplinary Cycle Research ISSN NO: 0022-1945 An Open Source approach for ASIC Design Flow Kesari Ananda Samhitha Y. David Solomon Raju M.Tech Associate Professor Holy Mary Institute of Technology Holy Mary Institute of Technology and ScienceAffiliated to JNTU, and Science Affiliated to JNTU, Hyderabad. Hyderabad. Email: [email protected] Email: davidsolomonraju.y@ gmail.com Abstract: In this paper, we are going to study In this paper, number of open-source and the process of implementation of ASIC freeware CAD tools are presented and design flow with the help of open source evaluated. Based on the objectives of the EDA tools. In order to design our own user, this paper furnishes guidelines that circuitry without any other expensive help in selecting the most appropriate licenced tools, we apt the open source open-source and freeware VLSI CAD tool tools. The design of electronic circuits can for teaching a VLSI design course. be achieved at many different refinement Keywords: VLSI, CAD Tools, Electric, levels from the most detailed layout to the Magic, Alliance, Comparative Study most abstract architectures. Introduction: Given the complexity of Very Large Scaled Integrated Circuits (VLSI) ASIC design flow is a very mature which is far beyond human ability, process in silicon turnkey design. The computers are increasingly used to aid in ASIC design flow and its various steps in the design and optimization processes. It is VLSI engineering that we describe below no longer efficient to use manual design are based on best practices and proven techniques, in which each layer is hand methodologies in ASIC chip designs.
    [Show full text]
  • La CAO Électronique Sous Linux
    LLaa CACAOO ÉÉlleecctrtrononiiqquuee ssououss LLiinnuuxx IT331: Linux embarqué Xavier NOURISSON Electronique Adrien ZANCAN Systèmes embarqués 14 janvier 2005 ENSEIRB La CAO Électronique sous Linux SOMMAIRE INDEX DES ILLUSTRATIONS....................................................3 INTRODUCTION......................................................................4 LES LOGICIELS DE CAO...........................................................5 I. CONCEPTION DE CIRCUITS 6 I.1. Bartels AutoEngineer® 6 I.2. CadSoft Eagle 7 I.3. gEDA et outils associés 7 I.4. Oregano 9 I.5. PCB 9 I.6. SoC GDS 9 I.7. TkGate 10 I.8. Xcircuit 11 II. CONCEPTION LOGICIELLE 11 II.1. AT51Programmer 11 II.2. Mprog 11 II.3. GCC 12 II.4. ICDPROG 12 II.5. GPUTILS + Tools 13 II.5.1. Assembleurs 13 II.5.2. Compilateurs 14 II.5.3. Simulateurs 15 II.5.4. Programmateurs 15 II.5.5. Librairies 16 II.5.6. Environnements de développement (IDEs) 16 II.6. YaPIDE 16 CONCLUSION.......................................................................17 GLOSSAIRE..........................................................................18 RÉFÉRENCES........................................................................19 ANNEXE – COMPARATIF DES LOGICIELS.................................20 2/20 Index des illustrations Index des illustrations INDEX DES ILLUSTRATIONS Illustration 1 - Bartels AUtoEngineer: Layout d'un circuit intégré 6 Illustration 2 - CadSoft Eagle: Routage 7 Illustration 3 - gEDA: Saisie de schémas 7 Illustration 4 - Oregano: Saisie de schéma et simulation 9 Illustration
    [Show full text]