2004 ACM Workshop on General-Purpose Computing on Graphics Processors

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2004 ACM Workshop on General-Purpose Computing on Graphics Processors \SIGGRAPH'03 2004 ACM Workshop on General-Purpose Computing on Graphics Processors Los Angeles, California August 7-8, 2004 Sponsored by ACM SIGGRAPH Supported by Army Research Office, ATI Technologies, NVIDIA, PEOSTRI, RDECOM, 3Dlabs, OpenGL ARB, and University of North Carolina at Chapel Hill Edited by A. Lastra, M. Lin, and D. Manocha GP2 2004 ACM Workshop on General-Purpose Computing on Graphics Processors Los Angeles, California, August 7-8, 2004 Organizing Co-Chairs Anselmo Lastra (UNC Chapel Hill) Ming C. Lin (UNC Chapel Hill) Dinesh Manocha (UNC Chapel Hill) Publicity Mark Harris (NVIDIA) Steering Committee Andrew Chien (University of California, San Diego) William Dally (Stanford University) Bob Graybill (Defense Advanced Research Projects Agency) Andrew Gruber (ATI Technologies, Inc.) Pat Hanrahan (Stanford University) Phil Heermann (Sandia National Lab) Ari Kaufmann (SUNY Stony Brooks) David Kirk (NVIDIA) Fred Kitson (HP Labs) Michael Macedonia (U.S. Army PEO STRI) Dominic Mallinson (Sony Computer Entertainment of America) William Pulleyblank (IBM) Dan Reed (Illinois & UNC Chapel Hill) Peter Schröder (California Institute of Technology) Mark Swinson (U.S. Army Research Office) Sponsored by ACM SIGGRAPH Supported by Army Research Office, ATI Technologies, NVIDIA, PEO STRI, RDECOM, 3Dlabs, OpenGL ARB, and University of North Carolina at Chapel Hill i The materials included in this book comprise the proceedings of the meeting mentioned on the title page. They reflect the author’s opinions. Their inclusion does not necessarily constitute endorsement by the editors or the workshop sponsors, including the Army Research Office, ATI Technologies, NVIDIA, PEO STRI, RDECOM, 3Dlabs, OpenGL ARB, and the University of North Carolina at Chapel Hill. Published by The Organizing Committee of the 2004 ACM Workshop on General-Purpose Computing on Graphics Processors Copyright and Reprint Permissions: Abstracting is permitted with credit to the source. For other copying, reprint, or republication permission, please contact one of the members of the Workshop Organizing Committee at the address below. The Copyright © 2004 of each individual article published in this volume belongs to the authors listed on that article’s title page. All rights reserved. Additional copy may be obtained by contacting: Anselmo Lastra, Ming C. Lin, Dinesh Manocha Department of Computer Science University of North Carolina Chapel Hill, NC 27599-3175 {lastra,lin,dm}@cs.unc.edu ii Foreword For years the performance and functionality of graphics processors (GPUs) has been increasing at a pace faster than Moore’s Law. Recently, the major graphics chip manufacturers have added support for floating-point computation and have released compilers for high-level languages. The primary application of GPUs has been fast rendering of anti-aliased, textured and shaded geometric primitives (e.g. polygons). Their main market has been mostly computer games and entertainment business. The performance and functionality of today’s GPUs make them attractive as co-processors for general-purpose computations. Over the last few years, many new algorithms and applications that exploit the inherent parallelism and vector processing capabilities of GPUs have been proposed. These include: • Scientific computation including FFTs, linear algebra solvers, differential equation solvers, multi-grid solvers and applications to fluid dynamics, visual simulation, ice crystal growth, etc. • Geometric computations including Voronoi diagrams, distance computation, motion planning, collision detection, object reconstruction, visibility, etc. • Advanced rendering including ray-tracing, radiosity, photon mapping, sub-surface scattering, shadows, etc. • Database operations including aggregates, predicates, Boolean combinations, selection queries, etc. on large databases. Given the increasing power and usage of commodity GPUs, the 2004 ACM Workshop on General- Purpose Computing on Graphics Processors (GP2), to be held in Los Angeles, California on the 7th and the 8th of August, will explore general-purpose computing using graphics hardware. Some of the issues include: • Do GPUs have the potential of being a useful co-processor for a wide variety of applications? What are their algorithmic and architectural niches and can these be broadened? • What are the major issues in terms of programmability, language and compiler support and software environments for GPUs? • What are some of the future technology trends that can lead to more widespread use of GPUs? With these goals in mind, this workshop will bring together leading researchers and practitioners from academia, research labs and industry working in computer graphics, scientific computation, high performance computing, computer architecture, software systems, and related areas. We hope that this workshop will lead to more inter-disciplinary collaboration among different research communities, as well as exploring the possibilities of using GPUs for general-purpose computing. We would like to thank Mark Harris for setting up the workshop website, Missy Wood for helping with workshop arrangements, and the Steering Committee on providing valuable suggestions in shaping the workshop program. We would also like to acknowledge the generous support of the Army Research iii Office, ATI Technologies, NVIDIA, PEO STRI, RDECOM, 3Dlabs, and OpenGL ARB. Finally, we would like to thank all the invited speakers, panelists, contributors and attendees for their participation. Anselmo Lastra, Ming C. Lin and Dinesh Manocha 2004 GP2 Workshop Co-Chairs University of North Carolina at Chapel Hill July 2004 iv Table of Contents Foreword............................................................................................................................................ iii Part A: Invited Presentations ................................................................. A-1 On the Power of Streaming Table-Lookup....................................................................................... A-3 Frederick P. Brooks, Jr. Stream Programming Environments.................................................................................................. A-4 Pat Hanrahan On Support for GPUs: Challenges, Obstacles, and Opportunities..................................................... A-5 Keith Cooper GPUs: Economic Attraction and Performance Challenges ............................................................... A-6 Dan Reed GPU Requirements for Large Scale Scientific Applications............................................................. A-7 Mark Seager Using GPUs as CPUs for Engineering Applications: Challenges and Issues.................................... A-8 Michael Heroux Utilizing Commercial Graphics Processors in the real-time Geo-Registration of Streaming High-Resolution Imagery................................................................................................................... A-9 Laurence Flath, Michael Kartz, and Randy Frank Graphics Memory for General Applications...................................................................................... A-10 Turner Whitted The Case for Asymmetric Multiprocessor Architecture ................................................................... A-11 Kai Li The All-Purpose Unit (APU) based on tiled-processor architecture: A Logical Successor to the CPU, GPU, and NPU? ........................................................................................................... A-12 Anant Agarwal Stream Processors vs. GPUs ............................................................................................................. A-13 Bill Dally Part B: Invited Panel Discussion............................................................ B-1 Overview and Bios ........................................................................................................................... B-3 v Part C: Contributed Poster Presentations............................................................. C-1 9:25am – 10:55am on Saturday, August 7, 2004 Accelerated 2-D and 3-D Digital Image Processing on a GPU ...................................................... C-3 Bryson R. Payne (Georgia College & State University), G. Scott Owen, Saeid O. Belkasim, and Patrick Flynn (Georgia State University) Accelerating Morphable 3D Model Fitting with Graphics Hardware............................................ C-4 Kazuhiro Hiwada (Toshiba Corporation) Brook for GPUs: Stream Computing on Graphics Hardware ........................................................ C-5 Ian Buck, Tim Foley, Daniel Horn, Jeremy Sugerman, Kayvon Fatahalian, Mike Houston, and Pat Hanrahan (Stanford) GPU Acceleration of Iterative Clustering………………............................................................... C-6 Jesse D. Hall and J. C. Hart (Univ. of Illinois at Urbana Champaign) GPU-Based Voxelization and its Application in Flow Modeling .................................................... C-7 Zhe Fan, Wei Li, Xiaoming Wei, and Arie Kaufman (SUNY Stony Brook) GPU Floating Point Paranoia ........................................................................................................... C-8 Karl Hillesland and Anselmo Lastra (UNC Chapel Hill) Fast Computation of Database Operations using Graphics Processors......................................... C-9 Naga K. Govindaraju, Brandon Lloyd, Wei Wang, Ming Lin, and Dinesh Manocha (UNC Chapel Hill) Mio: An Instruction Scheduling Approach to Fast Multipass Partitioning..................................
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