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Demonstrating the Scalability of a Molecular Dynamics Application on a Petaflops Computer

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Demonstrating the Scalability of a Molecular Dynamics Application on a Petaflops Computer International Journal of Parallel Programming, Vol. 30, No. 4, August 2002 (© 2002) Demonstrating the Scalability of a Molecular Dynamics Application on a Petaflops Computer George S. Almasi, Ca˘ lin Cas¸caval, José G. Castan˜ os, Monty Denneau,1,2 Wilm Donath,1 Maria Eleftheriou,1 Mark Giampapa,1 Howard Ho,1 Derek Lieber,1 José E. Moreira,1, 2 Dennis Newns,1 Marc Snir,1, 2 and Henry S. Warren, Jr.1 Received March 15, 2002; revised April 15, 2002 The IBM Blue Gene/C parallel computer aims to demonstrate the feasibility of a cellular architecture computer with millions of concurrent threads of execu- tion. One of the major challenges in this project is showing that applications can successfully scale to this massive amount of parallelism. In this paper we dem- onstrate that the simulation of protein folding using classical molecular dynam- ics falls in this category. Starting from the sequential version of a well known molecular dynamics code, we developed a new parallel implementation that exploited the multiple levels of parallelism present in the Blue Gene/C cellular architecture. We performed both analytical and simulation studies of the behavior of this application when executed on a very large number of threads. As a result, we demonstrate that this class of applications can execute efficiently on a large cellular machine. KEY WORDS: Massively parallel computing; molecular dynamics; performance evaluation; cellular architecture. 1 IBM Thomas J. Watson Research Center, Yorktown Heights, New York 10598-0218. E-mail: {denneau,jmoreira}@us.ibm.com; [email protected] 2 To whom correspondence should be addrressed. 317 0885-7458/02/0800-0317/0 © 2002 Plenum Publishing Corporation 318 Almasi et al. 1. INTRODUCTION Now that several Teraflops-scale machines have been deployed in various industrial, governmental, and academic sites, the high performance com- puting community is starting to look for the next big step: Petaflops-scale machines. At least two very different approaches have been advocated for developing the first generation of such machines. On one hand, projects like HTMT(1) propose the use of thousands of very high speed processors (hundreds of gigahertz). On the other hand, projects like IBM’s Blue Gene/C(2, 3) advance the idea of using a very large number (millions) of modest speed processors (hundreds of megahertz). These two approaches can be seen as the extremes of a wide spectrum of choices. We are particu- larly interested in analyzing the feasibility of the latter, Blue Gene/C style, approach. Massively parallel machines can be built today, in a relatively straight- forward way, by adopting a cellular architecture: a basic building-block containing processors, memory, and interconnect (preferably implemented on a single silicon chip) is replicated many times following a regular pattern. Combined logic-memory microelectronics processes will soon deliver chips with hundreds of millions of transistors. Several research groups have advanced processor-in-memory designs that rely on that technology, and can be used as building blocks for cellular machines. Examples include the Illinois FlexRAM,(4, 5) USC DIVA,(6) and Berkeley IRAM(7) projects. Nevertheless, because of sheer size, building a cellular machine to deliver a Petaflops—or 1015 floating-point operations per second—is quite a challenge. This enterprise can only be justified if it can be demonstrated that applications can execute efficiently on such a machine. In this paper, we report on the results of analytical- and simulation- based studies of the behavior of a computational molecular dynamics application. We analyze the behavior of this application on a cellular architecture with millions of concurrent threads of execution, which is a design for IBM’s Blue Gene/C project. This is one example of a class of applications that can indeed exploit the massive parallelism offered by a Petaflops-scale cellular machine, as discussed by Taylor et al.(8) This paral- lel application was derived from the serial version of a molecular dynamics code developed at the University of Pennsylvania.(9) The application was rewritten with new partitioning techniques to take advantage of multiple levels of parallelism in our architecture. We developed an analytical model for the performance of this appli- cation and compared it with direct simulation measurements. The quanti- tative results for our molecular dynamics code demonstrate that this class of applications can successfully exploit a Petaflops-scale cellular machine. Scalability of a Molecular Dynamics Application on a Petaflops Computer 319 We simulated a system consisting of 32,768 compute nodes, with a peak performance of 1 Petaflops and 8 Petaops. In terms of absolute perfor- mance, simulations indicate that we can achieve 0.14 Petaflops and 0.87 Petaops of sustained performance. The ratio between peak performance and effective performance is in line with ratios observed on more conven- tional systems; it is surprisingly high, given that high utilization of the floating point units was not a key design criterion for Blue Gene/C. In terms of speed of molecular dynamics computation, we integrate the equa- tions of motion for a typical problem with 32,000 atoms at the rate of one time-step every 375 ms. The same problem, using the sequential version of the code, can be solved on a Power 3 workstation with peak performance of 800 Mflops in 140 sec per time step. Thus, on a machine with 1,250,000 times the total peak floating-point performance of a uniprocessor, we achieve a speedup of 368,000. The rest of this paper is organized as follows: Section 2 gives a brief overview of the cellular machine considered, at the level necessary to understand how the molecular dynamics application can be parallelized for efficient execution. Section 3 introduces the parallel molecular dynamics algorithm we used. It also presents an analytical performance model for the execution of that algorithm on our cellular architecture. Section 4 describes the simulation and experimental infrastructure. We use this infrastructure in deriving experimental performance results which are presented, together with the results from the analytical model, in Section 5. Section 6 discusses some of the changes to the Blue Gene/C architecture that were motivated by this work and Section 7 compares our design against related architec- tures. Finally, Section 8 presents our conclusions. 2. A PETAFLOPS CELLULAR MACHINE The Blue Gene/C architecture studied in this paper incorporates several fundamental principles that significantly differentiate it from more conventional computer designs. These changes enable it to achieve Petaflops level performance with current silicon technology, in a system with a total physical size and power consumption that compares favorably with current Teraflops class supercomputers. A fundamental premise in the architecture of Blue Gene/C is that performance is obtained by exploiting massive amounts of parallelism, rather than the very fast execution of any particular thread of control. This premise has significant technological and architectural impacts. First, individual processors are kept simple, to facilitate design and large scale replication in a single silicon chip. Instead of spending transistors and Watts to enhance single-thread performance, the real estate and power 320 Almasi et al. budgets are used to add more processors. This choice pays off for applica- tions that have no sequential bottlenecks, so that massive parallelism can be exploited efficiently. The current paper demonstrates that molecular dynamics applications are in this category. The architecture can also be characterized as memory centric. The system uses a Processor in Memory (PIM) design in which DRAM memory and processor logic are combined in one chip. This enables memory access at a much higher bandwidth and lower latency than with a conventional design where memory and logic are on separate chips. Enough threads of execution are provided in order to fully consume all the memory bandwidth while tolerating the latency of individual load/store operations. The silicon area occupied by logic is relatively modest compared to the area occupied by memory. Thus, the total system size is largely determined by the amount of memory required by the computation. The result of such an approach is a system with significantly higher ratio of computation power to memory than conventional systems: the Blue Gene/C design presented here balances 1 byte of memory with 2 Kflops of compute power—three orders of magni- tude more compute power per memory unit than a conventional design. The building block of our cellular architecture is a node, implemented in a single silicon chip that contains memory, processing elements, and interconnection elements. A node can be viewed as a single-chip shared- memory multiprocessor. The architecture itself does not specify the exact number of components in a chip. In this section we describe a possible implementation of the Blue Gene/C architecture with components deter- mined by silicon area constraints and most common instruction type per- centages. We expect these numbers to change as manufacturing technology improves. Also, the balance between different resources might change as a consequence of particular target applications and as our understanding of the different trade-offs improves. In the design considered in this paper, a node contains 16 MB of shared memory and 256 thread units. Each thread unit is associated with one thread of execution, giving 256 simultaneous threads of execution in one node. The thread units are very simple compute processors that execute instructions in program order (completion may be out-of-order). Each thread unit contains its own register file (64 32-bit single precision registers, that can be paired for double precision operations), a program counter, a fixed point ALU, and a sequencer. Groups of 8 threads share one data cache and one floating-point unit. The data cache configuration for Blue Gene/C is 16 KB, 8-way set associative.
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