Dense and Sparse Parallel Linear Algebra Algorithms on Graphics Processing Units
Total Page:16
File Type:pdf, Size:1020Kb
Load more
Recommended publications
-
NVIDIA Opengl in 2012 Mark Kilgard
NVIDIA OpenGL in 2012 Mark Kilgard • Principal System Software Engineer – OpenGL driver and API evolution – Cg (“C for graphics”) shading language – GPU-accelerated path rendering • OpenGL Utility Toolkit (GLUT) implementer • Author of OpenGL for the X Window System • Co-author of Cg Tutorial Outline • OpenGL’s importance to NVIDIA • OpenGL API improvements & new features – OpenGL 4.2 – Direct3D interoperability – GPU-accelerated path rendering – Kepler Improvements • Bindless Textures • Linux improvements & new features • Cg 3.1 update NVIDIA’s OpenGL Leverage Cg GeForce Parallel Nsight Tegra Quadro OptiX Example of Hybrid Rendering with OptiX OpenGL (Rasterization) OptiX (Ray tracing) Parallel Nsight Provides OpenGL Profiling Configure Application Trace Settings Parallel Nsight Provides OpenGL Profiling Magnified trace options shows specific OpenGL (and Cg) tracing options Parallel Nsight Provides OpenGL Profiling Parallel Nsight Provides OpenGL Profiling Trace of mix of OpenGL and CUDA shows glFinish & OpenGL draw calls Only Cross Platform 3D API OpenGL 3D Graphics API • cross-platform • most functional • peak performance • open standard • inter-operable • well specified & documented • 20 years of compatibility OpenGL Spawns Closely Related Standards Congratulations: WebGL officially approved, February 2012 “The web is now 3D enabled” Buffer and OpenGL 4 – DirectX 11 Superset Event Interop • Interop with a complete compute solution – OpenGL is for graphics – CUDA / OpenCL is for compute • Shaders can be saved to and loaded from binary -
Enhanced Capabilities of the Spike Algorithm and a New Spike- Openmp Solver
University of Massachusetts Amherst ScholarWorks@UMass Amherst Masters Theses Dissertations and Theses November 2014 Enhanced Capabilities of the Spike Algorithm and a New Spike- OpenMP Solver Braegan S. Spring University of Massachusetts Amherst Follow this and additional works at: https://scholarworks.umass.edu/masters_theses_2 Recommended Citation Spring, Braegan S., "Enhanced Capabilities of the Spike Algorithm and a New Spike-OpenMP Solver" (2014). Masters Theses. 116. https://doi.org/10.7275/5912243 https://scholarworks.umass.edu/masters_theses_2/116 This Open Access Thesis is brought to you for free and open access by the Dissertations and Theses at ScholarWorks@UMass Amherst. It has been accepted for inclusion in Masters Theses by an authorized administrator of ScholarWorks@UMass Amherst. For more information, please contact [email protected]. ENHANCED CAPABILITIES OF THE SPIKE ALGORITHM AND A NEW SPIKE-OPENMP SOLVER A Thesis Presented by BRAEGAN SPRING Submitted to the Graduate School of the University of Massachusetts Amherst in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE IN ELECTRICAL AND COMPUTER ENGINEERING September 2014 Electrical and Computer Engineering ENHANCED CAPABILITIES OF THE SPIKE ALGORITHM AND A NEW SPIKE-OPENMP SOLVER A Thesis Presented by BRAEGAN SPRING Approved as to style and content by: Eric Polizzi, Chair Zlatan Aksamija, Member Hans Johnston, Member Christopher V. Hollot , Department Chair Electrical and Computer Engineering ACKNOWLEDGMENTS I would like to thank Dr. Zlatan Aksamija & Dr. Hans Johnston for assisting me in this project, Dr. Polizzi for guiding me through it, and Dr. Anderson for his help beforehand. iii ABSTRACT ENHANCED CAPABILITIES OF THE SPIKE ALGORITHM AND A NEW SPIKE-OPENMP SOLVER SEPTEMBER 2014 BRAEGAN SPRING B.Sc., UNIVERSITY MASSACHUSETTS AMHERST M.S.E.C.E., UNIVERSITY OF MASSACHUSETTS AMHERST Directed by: Professor Eric Polizzi SPIKE is a parallel algorithm to solve block tridiagonal matrices. -
Developer Tools Showcase
Developer Tools Showcase Randy Fernando Developer Tools Product Manager NVISION 2008 Software Content Creation Performance Education Development FX Composer Shader PerfKit Conference Presentations Debugger mental mill PerfHUD Whitepapers Artist Edition Direct3D SDK PerfSDK GPU Programming Guide NVIDIA OpenGL SDK Shader Library GLExpert Videos CUDA SDK NV PIX Plug‐in Photoshop Plug‐ins Books Cg Toolkit gDEBugger GPU Gems 3 Texture Tools NVSG GPU Gems 2 Melody PhysX SDK ShaderPerf GPU Gems PhysX Plug‐Ins PhysX VRD PhysX Tools The Cg Tutorial NVIDIA FX Composer 2.5 The World’s Most Advanced Shader Authoring Environment DirectX 10 Support NVIDIA Shader Debugger Support ShaderPerf 2.0 Integration Visual Models & Styles Particle Systems Improved User Interface Particle Systems All-New Start Page 350Z Sample Project Visual Models & Styles Other Major Features Shader Creation Wizard Code Editor Quickly create common shaders Full editor with assisted Shader Library code generation Hundreds of samples Properties Panel Texture Viewer HDR Color Picker Materials Panel View, organize, and apply textures Even More Features Automatic Light Binding Complete Scripting Support Support for DirectX 10 (Geometry Shaders, Stream Out, Texture Arrays) Support for COLLADA, .FBX, .OBJ, .3DS, .X Extensible Plug‐in Architecture with SDK Customizable Layouts Semantic and Annotation Remapping Vertex Attribute Packing Remote Control Capability New Sample Projects 350Z Visual Styles Atmospheric Scattering DirectX 10 PCSS Soft Shadows Materials Post‐Processing Simple Shadows -
Manycore GPU Architectures and Programming, Part 1
Lecture 19: Manycore GPU Architectures and Programming, Part 1 Concurrent and Mul=core Programming CSE 436/536, [email protected] www.secs.oakland.edu/~yan 1 Topics (Part 2) • Parallel architectures and hardware – Parallel computer architectures – Memory hierarchy and cache coherency • Manycore GPU architectures and programming – GPUs architectures – CUDA programming – Introduc?on to offloading model in OpenMP and OpenACC • Programming on large scale systems (Chapter 6) – MPI (point to point and collec=ves) – Introduc?on to PGAS languages, UPC and Chapel • Parallel algorithms (Chapter 8,9 &10) – Dense matrix, and sorng 2 Manycore GPU Architectures and Programming: Outline • Introduc?on – GPU architectures, GPGPUs, and CUDA • GPU Execuon model • CUDA Programming model • Working with Memory in CUDA – Global memory, shared and constant memory • Streams and concurrency • CUDA instruc?on intrinsic and library • Performance, profiling, debugging, and error handling • Direc?ve-based high-level programming model – OpenACC and OpenMP 3 Computer Graphics GPU: Graphics Processing Unit 4 Graphics Processing Unit (GPU) Image: h[p://www.ntu.edu.sg/home/ehchua/programming/opengl/CG_BasicsTheory.html 5 Graphics Processing Unit (GPU) • Enriching user visual experience • Delivering energy-efficient compung • Unlocking poten?als of complex apps • Enabling Deeper scien?fic discovery 6 What is GPU Today? • It is a processor op?mized for 2D/3D graphics, video, visual compu?ng, and display. • It is highly parallel, highly multhreaded mulprocessor op?mized for visual -
A Parallel Solver for Incompressible Fluid Flows
Available online at www.sciencedirect.com Procedia Computer Science 00 (2013) 000–000 International Conference on Computational Science, ICCS 2013 A parallel solver for incompressible fluid flows Yushan Wanga,∗, Marc Baboulina,b, Jack Dongarrac,d,e, Joel¨ Falcoua, Yann Fraigneauf, Olivier Le Maˆıtref aLRI, Universit´eParis-Sud, France bInria Saclay Ile-de-France,ˆ France cUniversity of Tennessee, USA dOak Ridge National Laboratory, USA eUniversity of Manchester, United Kingdom fLIMSI-CNRS, France Abstract The Navier-Stokes equations describe a large class of fluid flows but are difficult to solve analytically because of their nonlin- earity. We present in this paper a parallel solver for the 3-D Navier-Stokes equations of incompressible unsteady flows with constant coefficients, discretized by the finite difference method. We apply a prediction-projection method that transforms the Navier-Stokes equations into three Helmholtz equations and one Poisson equation. For each Helmholtz system, we ap- ply the Alternating Direction Implicit (ADI) method resulting in three tridiagonal systems. The Poisson equation is solved using partial diagonalization which transforms the Laplacian operator into a tridiagonal one. We present an implementation based on MPI where the computations are performed on each subdomain and information is exchanged at the interfaces be- tween subdomains. We describe in particular how the solution of tridiagonal systems can be accelerated using vectorization techniques. Keywords: Navier-Stokes equations ; prediction-projection method; ADI method; partial diagonalization; SIMD ; parallel computing, tridiagonal systems. 1. Introduction The incompressible Navier-Stokes (NS) equations express the Newton’s second law applied to fluid motion, with the assumptions that the fluid density is constant and the fluid stress is the sum of a viscous term (proportional to the gradient of the velocity) and an isotropic pressure term. -
PSPIKE: a Parallel Hybrid Sparse Linear System Solver *
PSPIKE: A Parallel Hybrid Sparse Linear System Solver ? Murat Manguoglu1, Ahmed H. Sameh1, and Olaf Schenk2 1 Department of Computer Science,Purdue University, West Lafayette IN 47907 2 Computer Science Department,University of Basel,Klingelbergstrasse 50,CH-4056 Basel Abstract. The availability of large-scale computing platforms comprised of tens of thousands of multicore processors motivates the need for the next generation of highly scalable sparse linear system solvers. These solvers must optimize parallel performance, processor (serial) perfor- mance, as well as memory requirements, while being robust across broad classes of applications and systems. In this paper, we present a new parallel solver that combines the desirable characteristics of direct meth- ods (robustness) and effective iterative solvers (low computational cost), while alleviating their drawbacks (memory requirements, lack of robust- ness). Our proposed hybrid solver is based on the general sparse solver PARDISO, and the “Spike” family of hybrid solvers. The resulting algo- rithm, called PSPIKE, is as robust as direct solvers, more reliable than classical preconditioned Krylov subspace methods, and much more scal- able than direct sparse solvers. We support our performance and parallel scalability claims using detailed experimental studies and comparison with direct solvers, as well as classical preconditioned Krylov methods. Key words: Hybrid Solvers, Direct Solvers, Krylov Subspace Methods, Sparse Linear Systems 1 Introduction The emergence of extreme-scale parallel platforms, along with increasing number of cores available in conventional processors pose significant challenges for algo- rithm and software development. Machines with tens of thousands of processors and beyond place tremendous constraints on the communication requirements of algorithms. -
1.2 Molecular Dynamics Simulations
Accelerator-based Look-up Table for Coarse-grained Molecular Dynamics Computations Prepared by: Town Ananya Gangopadhyay GNGANA001 Scientific Computing Research Unit Department of ChemistryCape University of Cape Town of Supervised by: Prof. Kevin J. Naidoo Scientific Computing Research Unit Department of Chemistry University of Cape Town UniversityDr. Simon Winberg Scientific Computing Research Unit Department of Electrical Engineering University of Cape Town July 2018 Dissertation presented to the University of Cape Town in fulfilment of the academic requirements for a Master of Science degree in Computational Science. Key Words: Molecular Dynamics, Parallel Computing, Coarse-grained, GPU, LUT. The copyright of this thesis vests in the author. No quotation from it or information derivedTown from it is to be published without full acknowledgement of the source. The thesis is to be used for private study or non- commercial research purposes Capeonly. of Published by the University of Cape Town (UCT) in terms of the non-exclusive license granted to UCT by the author. University Declaration I declare that this dissertation titles ACCELERATOR-BASED LOOK-UP TABLE FOR COARSE- GRAINED MOLECULAR DYNAMICS COMPUTATIONS, is a presentation of my original research work done at the Scientific Computing Research Unit, Department of Chemistry, University of Cape Town, South Africa. No part of this thesis has been submitted elsewhere for any other degree of qualification. Whenever contributions of others are involved, every effort is made to indicate this clearly, with due reference to the literature, and acknowledgment of collaborative research and discussions. Name: Ananya Gangopadhyay Signature: Date: 9 July 2018 i Abstract Molecular Dynamics (MD) is a simulation technique widely used by computational chemists and biologists to simulate and observe the physical properties of a system of particles or molecules. -
A Banded Spike Algorithm and Solver for Shared Memory Architectures Karan Mendiratta University of Massachusetts Amherst
University of Massachusetts Amherst ScholarWorks@UMass Amherst Masters Theses 1911 - February 2014 2011 A Banded Spike Algorithm and Solver for Shared Memory Architectures Karan Mendiratta University of Massachusetts Amherst Follow this and additional works at: https://scholarworks.umass.edu/theses Mendiratta, Karan, "A Banded Spike Algorithm and Solver for Shared Memory Architectures" (2011). Masters Theses 1911 - February 2014. 699. Retrieved from https://scholarworks.umass.edu/theses/699 This thesis is brought to you for free and open access by ScholarWorks@UMass Amherst. It has been accepted for inclusion in Masters Theses 1911 - February 2014 by an authorized administrator of ScholarWorks@UMass Amherst. For more information, please contact [email protected]. A BANDED SPIKE ALGORITHM AND SOLVER FOR SHARED MEMORY ARCHITECTURES A Thesis Presented by KARAN MENDIRATTA Submitted to the Graduate School of the University of Massachusetts Amherst in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE IN ELECTRICAL AND COMPUTER ENGINEERING September 2011 Electrical & Computer Engineering A BANDED SPIKE ALGORITHM AND SOLVER FOR SHARED MEMORY ARCHITECTURES A Thesis Presented by KARAN MENDIRATTA Approved as to style and content by: Eric Polizzi, Chair David P Schmidt, Member Michael Zink, Member Christopher V Hollot, Department Chair Electrical & Computer Engineering For Krishna Babbar, and Baldev Raj Mendiratta ACKNOWLEDGMENTS I would like to thank my advisor and mentor Prof. Eric Polizzi for his guidance, patience and support. I would also like to thank Prof. David P Schmidt and Prof. Michael Zink for agreeing to be a part of my thesis committee. Last but not the least, I am grateful to my family and friends for always encouraging and supporting me in all my endeavors. -
Reviewer's Guide
Reviewer’s Guide NVIDIA® GeForce® GTX 280 GeForce® GTX 260 Graphics Processing Units TABLE OF CONTENTS NVIDIA GEFORCE GTX 200 GPUS.....................................................................3 Two Personalities, One GPU ........................................................................................................ 3 Beyond Gaming ............................................................................................................................. 3 GPU-Powered Video Transcoding............................................................................................... 3 GPU Powered Folding@Home..................................................................................................... 4 Industry wide support for CUDA.................................................................................................. 4 Gaming Beyond ............................................................................................................................. 5 Dynamic Realism.......................................................................................................................... 5 Introducing GeForce GTX 200 GPUs ........................................................................................... 9 Optimized PC and Heterogeneous Computing.......................................................................... 9 GeForce GTX 200 GPUs – Architectural Improvements.......................................................... 10 Power Management Enhancements......................................................................................... -
Lecture: Manycore GPU Architectures and Programming, Part 1
Lecture: Manycore GPU Architectures and Programming, Part 1 CSCE 569 Parallel Computing Department of Computer Science and Engineering Yonghong Yan [email protected] https://passlab.github.io/CSCE569/ 1 Manycore GPU Architectures and Programming: Outline • Introduction – GPU architectures, GPGPUs, and CUDA • GPU Execution model • CUDA Programming model • Working with Memory in CUDA – Global memory, shared and constant memory • Streams and concurrency • CUDA instruction intrinsic and library • Performance, profiling, debugging, and error handling • Directive-based high-level programming model – OpenACC and OpenMP 2 Computer Graphics GPU: Graphics Processing Unit 3 Graphics Processing Unit (GPU) Image: http://www.ntu.edu.sg/home/ehchua/programming/opengl/CG_BasicsTheory.html 4 Graphics Processing Unit (GPU) • Enriching user visual experience • Delivering energy-efficient computing • Unlocking potentials of complex apps • Enabling Deeper scientific discovery 5 What is GPU Today? • It is a processor optimized for 2D/3D graphics, video, visual computing, and display. • It is highly parallel, highly multithreaded multiprocessor optimized for visual computing. • It provide real-time visual interaction with computed objects via graphics images, and video. • It serves as both a programmable graphics processor and a scalable parallel computing platform. – Heterogeneous systems: combine a GPU with a CPU • It is called as Many-core 6 Graphics Processing Units (GPUs): Brief History GPU Computing General-purpose computing on graphics processing units (GPGPUs) GPUs with programmable shading Nvidia GeForce GE 3 (2001) with programmable shading DirectX graphics API OpenGL graphics API Hardware-accelerated 3D graphics S3 graphics cards- single chip 2D accelerator Atari 8-bit computer IBM PC Professional Playstation text/graphics chip Graphics Controller card 1970 1980 1990 2000 2010 Source of information http://en.wikipedia.org/wiki/Graphics_Processing_Unit 7 NVIDIA Products • NVIDIA Corp. -
PC Hardware Contents
PC Hardware Contents 1 Computer hardware 1 1.1 Von Neumann architecture ...................................... 1 1.2 Sales .................................................. 1 1.3 Different systems ........................................... 2 1.3.1 Personal computer ...................................... 2 1.3.2 Mainframe computer ..................................... 3 1.3.3 Departmental computing ................................... 4 1.3.4 Supercomputer ........................................ 4 1.4 See also ................................................ 4 1.5 References ............................................... 4 1.6 External links ............................................. 4 2 Central processing unit 5 2.1 History ................................................. 5 2.1.1 Transistor and integrated circuit CPUs ............................ 6 2.1.2 Microprocessors ....................................... 7 2.2 Operation ............................................... 8 2.2.1 Fetch ............................................. 8 2.2.2 Decode ............................................ 8 2.2.3 Execute ............................................ 9 2.3 Design and implementation ...................................... 9 2.3.1 Control unit .......................................... 9 2.3.2 Arithmetic logic unit ..................................... 9 2.3.3 Integer range ......................................... 10 2.3.4 Clock rate ........................................... 10 2.3.5 Parallelism ......................................... -
View Annual Report
ar5182 Electronic EDGAR Proof Job Number: -NOT DEFINED- Filer: -NOT DEFINED- Form Type: 10-K Reporting Period / Event Date: 01/25/09 Customer Service Representative: -NOT DEFINED- Revision Number: -NOT DEFINED- This proof may not fit on letter-sized (8.5 x 11 inch) paper. If copy is cut off, please print to a larger format, e.g., legal- sized (8.5 x 14 inch) paper or oversized (11 x 17 inch) paper. Accuracy of proof is guaranteed ONLY if printed to a PostScript printer using the correct PostScript driver for that printer make and model. (this header is not part of the document) EDGAR Submission Header Summary Submission Type 10-K Live File on Return Copy on Submission Contact Aarti Ratnam Submission Contact Phone Number 408-566-5163 Exchange NASD Confirming Copy off Filer CIK 0001045810 Filer CCC xxxxxxxx Period of Report 01/25/09 Smaller Reporting Company off Shell Company No Voluntary Filer No Well-Known Seasoned Issuer Yes Notify via Filing website Only off Emails [email protected] Documents 10-K fy2009form10k.htm FISCAL YEAR 2009 FORM 10-K EX-21.1 fy2009subsidiaries.htm LISTING OF SUBSIDIARIES EX-23.1 fy2009pwcconsent.htm CONSENT OF INDEPENDENT REGISTERED PUBLIC ACCOUNTING FIRM EX-31.1 fy2009cert302ceo.htm 302 CERTIFICATION OF CEO EX-31.2 fy2009cert302cfo.htm 302 CERTIFICATION OF CFO EX-32.1 fy2009906certceo.htm 906 CERTIFICATION OF CEO EX-32.2 fy2009906certcfo.htm 906 CERTIFICATION OF CFO GRAPHIC fiveyearsperfstockgraph.jpg FIVE YEARS STOCK PERFORMANCE GRAPH GRAPHIC tenyearsperfstockgraph.jpg TEN YEARS STOCK PERFORMANCE GRAPH Module