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Coordinated Power Management in Heterogeneous Processors

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Coordinated Power Management in Heterogeneous Processors COORDINATED POWER MANAGEMENT IN HETEROGENEOUS PROCESSORS A Thesis Presented to The Academic Faculty by Indrani Paul In Partial Fulfillment of the Requirements for the Degree Doctor of Philosophy in the School of Electrical and Computer Engineering Georgia Institute of Technology May 2015 COPYRIGHT © 2015 BY INDRANI PAUL COORDINATED POWER MANAGEMENT IN HETEROGENEOUS PROCESSORS Approved by: Dr. Sudhakar Yalamanchili, Advisor Dr. Karsten Schawn School of Electrical and Computer School of Computer Science Engineering Georgia Institute of Technology Georgia Institute of Technology Dr. Saibal Mukhopadhyay Dr. Lizy K. John School of Electrical and Computer Electrical and Computer Engineering Engineering University of Texas, Austin Georgia Institute of Technology Dr. Hyesoon Kim School of Computer Science Georgia Institute of Technology Date Approved: [Mar 23, 2015] To my parents, husband, and children ACKNOWLEDGEMENTS This thesis would not have been possible without the assistance, guidance and constant inspiration of many individuals. First of all, I would like to express my deepest appreciation and thanks to my advisor Dr. Sudhakar Yalamanchili for his valuable guidance, insights, immense knowledge, patience and flexibility which made this a thoughtful and rewarding journey. His technical, editorial and general advice and mentoring was essential to the completion of this dissertation and has taught me innumerable lessons and insights on the workings of academic research in general. Although my doctoral studies have come to an end, I look forward to continue our relationship through many collaborations in future. I would also like to thank my dissertation committee members Dr. Saibal Mukhopadhyay, Dr. Hyesoon Kim, Dr. Karsten Schawn and Dr. Lizy K. John for their support and guidance as this dissertation moved from a proposal to a complete study. Their suggestions and feedback helped me in shaping up my final thesis and develop the big picture behind all the individual pieces of work in this thesis. I would like to thank my lab members at the Computer Architecture and Systems Laboratory at Georgia Tech, Minhaz Hassan, Nawaf Almoosa, and Jeffrey Young for our discussions and talks over the last few years. Although being a remote part-time student did not allow me to spend a lot of time in the lab, I am grateful for the support they have provided both technically and logistically. Words cannot express my gratefulness to Advanced Micro Devices (AMD) for the immense support and flexibility it has provided to pursue and complete my PhD. Thanks iv to Srilatha (Bobbie) Manne and Mike Schulte for convincing me to join AMD Research to work on the Exascale supercomputing project while pursuing my PhD. Special thanks to John Keaty for his strong support and encouragement and for being very flexible so that I could balance my work, PhD and family. Working at AMD Research has allowed me to amortize the considerable efforts required for doctoral research with fulfilling employment. Thanks to all my colleagues, Mike Schulte, Bobbie Manne, Manish Arora, Wei Huang, Wayne Burleson and Joseph Greathouse to name a few, for the endless interesting discussions and insights on a variety of topics ranging from power, architecture, microarchitecture, thermals, datacenters, software to general philosophies of life. Most importantly, none of this would have been possible without the love, support, encouragement and patience from my family as I undertook this long journey. I am indebted to my parents who provided me the strong education foundation to begin with, motivated me to pursue PhD and taught me to believe in myself even through failures and setbacks. Thanks to my two beautiful daughters, one of which came along the way in the final leg of my PhD journey, who allowed me to put things in perspective through their bright little smiles, and made this journey meaningful. Finally, thanks to my best friend and my husband Sarat, who actually underwent this journey all along with me by my side, and sometimes was part of this even more than me. He not only encouraged me to get into the PhD program to fulfill my dreams as I was nervous about undertaking this big commitment while having a full-time family and a full-time job, he stayed committed to this process with me till the end by putting up with my countless work-hours and keeping me focused on my priorities when I had too many things to deal with. v TABLE OF CONTENTS ACKNOWLEDGMENTS……………………………………………………………....iv LIST OF TABLES ……………………………………………………………………...xi LIST OF FIGURES ……………………………………………………………………xii SUMMARY ……………………………………………………………………………xvi INTRODUCTION............................................................................................................. 1 1.1 THESIS STATEMENT ................................................................................................. 3 1.2 THESIS CONTRIBUTIONS .......................................................................................... 4 1.3 THESIS ORGANIZATION ............................................................................................ 7 ORIGIN OF THE PROBLEM AND RELATED WORK .......................................... 10 2.1 SHIFT IN COMPUTE PARADIGM............................................................................... 10 2.1.1 End of Dennard Scaling ................................................................................ 10 2.1.2 Multi-core and Many-core Architectures ...................................................... 11 2.1.3 Path to Heterogeneous Computing ............................................................... 12 2.2 RESEARCH EFFORTS IN HETEROGENEOUS ARCHITECTURE .................................... 14 2.2.1 Workload Driven Optimizations ................................................................... 14 2.2.2 Integration Driven Optimizations ................................................................. 15 2.2.3 Physical Constraint Driven Optimizations.................................................... 16 2.3 SUMMARY .............................................................................................................. 20 BACKGROUND ............................................................................................................. 21 3.1 GPU/APU PROGRAMMING MODEL ....................................................................... 21 3.2 GPU HARDWARE DESIGN ...................................................................................... 22 3.3 HETEROGENEOUS ARCHITECTURE OVERVIEW ....................................................... 25 3.3.1 Trinity Accelerated Processing Unit ............................................................. 26 vi 3.3.2 Tahiti Discrete GPU ...................................................................................... 27 3.4 POWER MANAGEMENT IN HETEROGENEOUS PROCESSORS ..................................... 28 3.4.1 Trinity Power Management .......................................................................... 30 3.4.2 Tahiti Power Management ............................................................................ 32 3.4.3 Memory Power Management ........................................................................ 33 3.5 SUMMARY .............................................................................................................. 33 NEW MANAGEMENT CHALLENGES IN HETEROGENEOUS PROCESSORS ........................................................................................................................................... 34 4.1 THERMAL COUPLING AND THERMAL SIGNATURES ................................................ 35 4.1.1 Thermal Coupling ......................................................................................... 35 4.1.2 Thermal Signatures ....................................................................................... 38 4.1.3 Summary ....................................................................................................... 41 4.2 PERFORMANCE COUPLING ..................................................................................... 42 4.2.1 Performance Coupling between Heterogeneous Compute Elements ........... 43 4.2.2 Performance Coupling between Compute and Memory Elements ............... 47 4.3 SUMMARY OF KEY MANAGEMENT CHALLENGES .................................................. 62 THERMAL COUPLING MANAGEMENT ................................................................ 65 5.1 OVERVIEW ............................................................................................................. 65 5.2 GREEDY VS. NEEDY POWER MANAGEMENT: INTERACTIONS BETWEEN THERMAL COUPLING AND PERFORMANCE COUPLING .................................................................... 67 5.3 RUN-TIME METRICS ............................................................................................... 73 5.4 COOPERATIVE BOOSTING (CB) .............................................................................. 73 5.4.1 Structure ........................................................................................................ 73 5.4.2 Algorithm ...................................................................................................... 76 5.5 EXPERIMENTAL SET-UP ......................................................................................... 78 5.6 RESULTS ................................................................................................................ 80 vii 5.6.1 Performance .................................................................................................
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